From nobody Thu Sep 11 12:48:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 630C3C001DF for ; Wed, 2 Aug 2023 10:25:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231206AbjHBKZJ (ORCPT ); Wed, 2 Aug 2023 06:25:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232829AbjHBKYK (ORCPT ); Wed, 2 Aug 2023 06:24:10 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 305FF30EB for ; Wed, 2 Aug 2023 03:22:24 -0700 (PDT) Message-ID: <20230802101934.981826753@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690971721; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=y/zw4jIEoXHpKelNkwXOESHKGmmFcaqzgwgGslsADMM=; b=RSZtmFFhNHNFj1zXzqnUtmaSstQ/ZlnmyJ1H27QGXck6sDA+Y8Q5Ynf+Fn9JR2n7fbvg6R 4XWpQ9wCIgHlq25B8KpYDPAl0P7FSszu/hQF0vEQAhSrHE+/crj68OzkRilSt13Owsq8yq 3Hg/sx60C2/PBPVZqXdBhowN1d+cLrnZu7axIR6f5zuRPfvVC7X7gV01IcbGxev1sxQB2D wDntLXLwkB7OvwUE3rRSKbRresbkveMhW+1zW7o2mwZH5Elx3ITe8FXcwXVOetQA1u8H9H BAF+5JLTl01rbCBRDuD+wmNzW3EUuLaoNhCSKY6EMkX6XDcti0w/yCICZH8RHQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690971721; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=y/zw4jIEoXHpKelNkwXOESHKGmmFcaqzgwgGslsADMM=; b=SXRN6j03xvwSK8gaUFGtwggHDPgt0kdu5OPWLKi5rTi38FJLmHOSCLCVu8/i2jKomGsNgB DXuk6wgnoKISyYCg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Tom Lendacky , Andrew Cooper , Arjan van de Ven , Huang Rui , Juergen Gross , Dimitri Sivanich , Michael Kelley , Wei Liu , Steve Wahl , Mike Travis , Russ Anderson Subject: [patch V3 40/40] x86/apic/uv: Remove the private leaf 0xb parser References: <20230802101635.459108805@linutronix.de> MIME-Version: 1.0 Date: Wed, 2 Aug 2023 12:22:00 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The package shift has been already evaluated by the early CPU init. Put the mindless copy right next to the original leaf 0xb parser. Signed-off-by: Thomas Gleixner Cc: Steve Wahl Cc: Mike Travis Cc: Dimitri Sivanich Cc: Russ Anderson --- arch/x86/include/asm/topology.h | 5 +++ arch/x86/kernel/apic/x2apic_uv_x.c | 52 ++++++--------------------------= ----- 2 files changed, 14 insertions(+), 43 deletions(-) --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -126,6 +126,11 @@ static inline unsigned int topology_get_ return x86_topo_system.dom_size[dom]; } =20 +static inline unsigned int topology_get_domain_shift(enum x86_topology_dom= ains dom) +{ + return dom =3D=3D TOPO_SMT_DOMAIN ? 0 : x86_topo_system.dom_shifts[dom - = 1]; +} + extern const struct cpumask *cpu_coregroup_mask(int cpu); extern const struct cpumask *cpu_clustergroup_mask(int cpu); =20 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -241,54 +241,20 @@ static void __init uv_tsc_check_sync(voi is_uv(UV3) ? sname.s3.field : \ undef) =20 -/* [Copied from arch/x86/kernel/cpu/topology.c:detect_extended_topology()]= */ - -#define SMT_LEVEL 0 /* Leaf 0xb SMT level */ -#define INVALID_TYPE 0 /* Leaf 0xb sub-leaf types */ -#define SMT_TYPE 1 -#define CORE_TYPE 2 -#define LEAFB_SUBTYPE(ecx) (((ecx) >> 8) & 0xff) -#define BITS_SHIFT_NEXT_LEVEL(eax) ((eax) & 0x1f) - -static void set_x2apic_bits(void) -{ - unsigned int eax, ebx, ecx, edx, sub_index; - unsigned int sid_shift; - - cpuid(0, &eax, &ebx, &ecx, &edx); - if (eax < 0xb) { - pr_info("UV: CPU does not have CPUID.11\n"); - return; - } - - cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx); - if (ebx =3D=3D 0 || (LEAFB_SUBTYPE(ecx) !=3D SMT_TYPE)) { - pr_info("UV: CPUID.11 not implemented\n"); - return; - } - - sid_shift =3D BITS_SHIFT_NEXT_LEVEL(eax); - sub_index =3D 1; - do { - cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx); - if (LEAFB_SUBTYPE(ecx) =3D=3D CORE_TYPE) { - sid_shift =3D BITS_SHIFT_NEXT_LEVEL(eax); - break; - } - sub_index++; - } while (LEAFB_SUBTYPE(ecx) !=3D INVALID_TYPE); - - uv_cpuid.apicid_shift =3D 0; - uv_cpuid.apicid_mask =3D (~(-1 << sid_shift)); - uv_cpuid.socketid_shift =3D sid_shift; -} - static void __init early_get_apic_socketid_shift(void) { + unsigned int sid_shift =3D topology_get_domain_shift(TOPO_ROOT_DOMAIN); + if (is_uv2_hub() || is_uv3_hub()) uvh_apicid.v =3D uv_early_read_mmr(UVH_APICID); =20 - set_x2apic_bits(); + if (sid_shift) { + uv_cpuid.apicid_shift =3D 0; + uv_cpuid.apicid_mask =3D (~(-1 << sid_shift)); + uv_cpuid.socketid_shift =3D sid_shift; + } else { + pr_info("UV: CPU does not have valid CPUID.11\n"); + } =20 pr_info("UV: apicid_shift:%d apicid_mask:0x%x\n", uv_cpuid.apicid_shift, = uv_cpuid.apicid_mask); pr_info("UV: socketid_shift:%d pnode_mask:0x%x\n", uv_cpuid.socketid_shif= t, uv_cpuid.pnode_mask);