From nobody Thu Sep 11 12:46:50 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3247C001DF for ; Wed, 2 Aug 2023 10:24:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233828AbjHBKYW (ORCPT ); Wed, 2 Aug 2023 06:24:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233816AbjHBKXa (ORCPT ); Wed, 2 Aug 2023 06:23:30 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2605F2D59 for ; Wed, 2 Aug 2023 03:22:03 -0700 (PDT) Message-ID: <20230802101934.139170304@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690971697; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=YFWH8dTR2xSRS7NPCdsZGcZyQvJ9Kg7XAQ98q63+xHA=; b=RHs548FElj20FeJnST7hz2P3LyXh35d/aO4izl6/OKISWGkhnSHoMN9ko0e9LkHarxZNgU aHgPCZGtGkPp46CNLzAsuMFkXXu/LbQjUjNMnE9YYt8QRipFCO0fzKOdJ6TnnLPwjxSMms QY4Jfx30TZbIEVT395pgKC/qwGNhwprCVopzbzc/ytVMYAiDAmFYCOPyMbYF+gTLsO0lTl 2ARMXRCxfAXbgP2p0BIi1f0hCAaaVKUR9CFlvSefSsxZS39VY17zdZgSY6nCU8HNufnQYP 6+OoRlf8j/FPFmgSpAJPw4Q184KzxhqCTDXo7QwOABglsbjZVM6lXIGAOjSqBg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690971697; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=YFWH8dTR2xSRS7NPCdsZGcZyQvJ9Kg7XAQ98q63+xHA=; b=CKMMSbJ8bIOizzwn/IPUkFEqMF/9s/x07fVLeLMYGQlevf7hAfCtGMjnhIhEH6OAq6IuW0 mN8IQo1bBvbXK3DQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Tom Lendacky , Andrew Cooper , Arjan van de Ven , Huang Rui , Juergen Gross , Dimitri Sivanich , Michael Kelley , Wei Liu Subject: [patch V3 25/40] x86/cpu: Use common topology code for Centaur and Zhaoxin References: <20230802101635.459108805@linutronix.de> MIME-Version: 1.0 Date: Wed, 2 Aug 2023 12:21:37 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Centaur and Zhaoxin CPUs use only the legacy SMP detection. Remove the invocations from their 32bit path and exempt them from the call 64bit. No functional change intended. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/centaur.c | 4 ---- arch/x86/kernel/cpu/topology_common.c | 11 ++++++++--- arch/x86/kernel/cpu/zhaoxin.c | 4 ---- 3 files changed, 8 insertions(+), 11 deletions(-) --- a/arch/x86/kernel/cpu/centaur.c +++ b/arch/x86/kernel/cpu/centaur.c @@ -128,10 +128,6 @@ static void init_centaur(struct cpuinfo_ #endif early_init_centaur(c); init_intel_cacheinfo(c); - detect_num_cpu_cores(c); -#ifdef CONFIG_X86_32 - detect_ht(c); -#endif =20 if (c->cpuid_level > 9) { unsigned int eax =3D cpuid_eax(10); --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -42,7 +42,7 @@ static unsigned int parse_num_cores(stru return eax.ncores + 1; } =20 -static void __maybe_unused parse_legacy(struct topo_scan *tscan) +static void parse_legacy(struct topo_scan *tscan) { unsigned int cores, core_shift, smt_shift =3D 0; struct cpuinfo_x86 *c =3D tscan->c; @@ -71,10 +71,8 @@ bool topo_is_converted(struct cpuinfo_x8 /* Temporary until everything is converted over. */ switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_AMD: - case X86_VENDOR_CENTAUR: case X86_VENDOR_INTEL: case X86_VENDOR_HYGON: - case X86_VENDOR_ZHAOXIN: return false; default: /* Let all UP systems use the below */ @@ -132,6 +130,13 @@ static void parse_topology(struct topo_s return; =20 tscan->ebx1_nproc_shift =3D get_count_order(ebx.nproc); + + switch (c->x86_vendor) { + case X86_VENDOR_CENTAUR: + case X86_VENDOR_ZHAOXIN: + parse_legacy(tscan); + break; + } } =20 static void topo_set_ids(struct topo_scan *tscan) --- a/arch/x86/kernel/cpu/zhaoxin.c +++ b/arch/x86/kernel/cpu/zhaoxin.c @@ -71,10 +71,6 @@ static void init_zhaoxin(struct cpuinfo_ { early_init_zhaoxin(c); init_intel_cacheinfo(c); - detect_num_cpu_cores(c); -#ifdef CONFIG_X86_32 - detect_ht(c); -#endif =20 if (c->cpuid_level > 9) { unsigned int eax =3D cpuid_eax(10);