From nobody Thu Sep 11 12:46:48 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0953C001DF for ; Wed, 2 Aug 2023 10:21:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233885AbjHBKVy (ORCPT ); Wed, 2 Aug 2023 06:21:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233516AbjHBKVS (ORCPT ); Wed, 2 Aug 2023 06:21:18 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69039272A for ; Wed, 2 Aug 2023 03:21:12 -0700 (PDT) Message-ID: <20230802101933.163405003@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690971670; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=H/RRg/Ng7gVCWf1JKUraosEsbY2lA8TZJktDOeNxV1s=; b=TJ/7ZHcOJFggz3LlpfZbR84BbOJ+23vEoTJLrQ0pJj6Bad+SbDQdQDzyyFENxnkh25tJiJ gZdFgikZ9SAKytBu96q06A/oIc449vqdpphHd7Pd3kGiqwHgQE0hE6bZ8ktkKANRwC6l66 l91c5j7BZUwfFfVhnwOgProJWDtyvNlDtLFZ8laFAa/CiQPiwycZO98TxQflRuVhsOEv9i edqllP4ngIdR3i02YxW4W7VoB5foe4OTaftj9lMpGW/uoLXEmK2rRiMyfwdfkFao49MRvg jfRYn5fC1xxva6TvlrW70SMpMIdRk3mcMEr6p2WGZcZCLZJy4fY+Z7M5eZTxxw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690971670; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=H/RRg/Ng7gVCWf1JKUraosEsbY2lA8TZJktDOeNxV1s=; b=XUh0UjUU+Xcz1r2Wm+ZxALKdd01NqN1Tmln/PQZjplHvxijxoc2W4wXdCI3WRgFdMZ9hZo vRis1BMEHpUV69Cw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Tom Lendacky , Andrew Cooper , Arjan van de Ven , Huang Rui , Juergen Gross , Dimitri Sivanich , Michael Kelley , Wei Liu Subject: [patch V3 08/40] x86/cpu: Move cpu_core_id into topology info References: <20230802101635.459108805@linutronix.de> MIME-Version: 1.0 Date: Wed, 2 Aug 2023 12:21:10 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename it to core_id and stick it to the other ID fields. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/processor.h | 4 +++- arch/x86/include/asm/topology.h | 2 +- arch/x86/kernel/amd_nb.c | 4 ++-- arch/x86/kernel/cpu/amd.c | 8 ++++---- arch/x86/kernel/cpu/common.c | 4 ++-- arch/x86/kernel/cpu/hygon.c | 4 ++-- arch/x86/kernel/cpu/proc.c | 2 +- arch/x86/kernel/cpu/topology.c | 2 +- arch/x86/kernel/smpboot.c | 6 +++--- 9 files changed, 19 insertions(+), 17 deletions(-) --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -88,6 +88,9 @@ struct cpuinfo_topology { =20 // Physical die ID on AMD, Relative on Intel u32 die_id; + + // Core ID relative to the package + u32 core_id; }; =20 struct cpuinfo_x86 { @@ -142,7 +145,6 @@ struct cpuinfo_x86 { /* Logical processor id: */ u16 logical_proc_id; /* Core id: */ - u16 cpu_core_id; u16 logical_die_id; /* Index into per_cpu list: */ u16 cpu_index; --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -109,7 +109,7 @@ extern const struct cpumask *cpu_cluster #define topology_physical_package_id(cpu) (cpu_data(cpu).topo.pkg_id) #define topology_logical_die_id(cpu) (cpu_data(cpu).logical_die_id) #define topology_die_id(cpu) (cpu_data(cpu).topo.die_id) -#define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id) +#define topology_core_id(cpu) (cpu_data(cpu).topo.core_id) #define topology_ppin(cpu) (cpu_data(cpu).ppin) =20 extern unsigned int __max_die_per_package; --- a/arch/x86/kernel/amd_nb.c +++ b/arch/x86/kernel/amd_nb.c @@ -378,7 +378,7 @@ int amd_get_subcaches(int cpu) =20 pci_read_config_dword(link, 0x1d4, &mask); =20 - return (mask >> (4 * cpu_data(cpu).cpu_core_id)) & 0xf; + return (mask >> (4 * cpu_data(cpu).topo.core_id)) & 0xf; } =20 int amd_set_subcaches(int cpu, unsigned long mask) @@ -404,7 +404,7 @@ int amd_set_subcaches(int cpu, unsigned pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x180000); } =20 - cuid =3D cpu_data(cpu).cpu_core_id; + cuid =3D cpu_data(cpu).topo.core_id; mask <<=3D 4 * cuid; mask |=3D (0xf ^ (1 << cuid)) << 26; =20 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -306,7 +306,7 @@ static int nearby_node(int apicid) #endif =20 /* - * Fix up cpu_core_id for pre-F17h systems to be in the + * Fix up topo::core_id for pre-F17h systems to be in the * [0 .. cores_per_node - 1] range. Not really needed but * kept so as not to break existing setups. */ @@ -318,7 +318,7 @@ static void legacy_fixup_core_id(struct return; =20 cus_per_node =3D c->x86_max_cores / nodes_per_socket; - c->cpu_core_id %=3D cus_per_node; + c->topo.core_id %=3D cus_per_node; } =20 /* @@ -344,7 +344,7 @@ static void amd_get_topology(struct cpui c->cu_id =3D ebx & 0xff; =20 if (c->x86 >=3D 0x17) { - c->cpu_core_id =3D ebx & 0xff; + c->topo.core_id =3D ebx & 0xff; =20 if (smp_num_siblings > 1) c->x86_max_cores /=3D smp_num_siblings; @@ -387,7 +387,7 @@ static void amd_detect_cmp(struct cpuinf =20 bits =3D c->x86_coreid_bits; /* Low order bits define the core id (index of core in socket) */ - c->cpu_core_id =3D c->topo.initial_apicid & ((1 << bits)-1); + c->topo.core_id =3D c->topo.initial_apicid & ((1 << bits)-1); /* Convert the initial APIC ID into the socket ID */ c->topo.pkg_id =3D c->topo.initial_apicid >> bits; /* use socket ID also for last level cache */ --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -907,8 +907,8 @@ void detect_ht(struct cpuinfo_x86 *c) =20 core_bits =3D get_count_order(c->x86_max_cores); =20 - c->cpu_core_id =3D apic->phys_pkg_id(c->topo.initial_apicid, index_msb) & - ((1 << core_bits) - 1); + c->topo.core_id =3D apic->phys_pkg_id(c->topo.initial_apicid, index_msb) & + ((1 << core_bits) - 1); #endif } =20 --- a/arch/x86/kernel/cpu/hygon.c +++ b/arch/x86/kernel/cpu/hygon.c @@ -74,7 +74,7 @@ static void hygon_get_topology(struct cp =20 c->topo.die_id =3D ecx & 0xff; =20 - c->cpu_core_id =3D ebx & 0xff; + c->topo.core_id =3D ebx & 0xff; =20 if (smp_num_siblings > 1) c->x86_max_cores /=3D smp_num_siblings; @@ -116,7 +116,7 @@ static void hygon_detect_cmp(struct cpui =20 bits =3D c->x86_coreid_bits; /* Low order bits define the core id (index of core in socket) */ - c->cpu_core_id =3D c->topo.initial_apicid & ((1 << bits)-1); + c->topo.core_id =3D c->topo.initial_apicid & ((1 << bits)-1); /* Convert the initial APIC ID into the socket ID */ c->topo.pkg_id =3D c->topo.initial_apicid >> bits; /* use socket ID also for last level cache */ --- a/arch/x86/kernel/cpu/proc.c +++ b/arch/x86/kernel/cpu/proc.c @@ -21,7 +21,7 @@ static void show_cpuinfo_core(struct seq seq_printf(m, "physical id\t: %d\n", c->topo.pkg_id); seq_printf(m, "siblings\t: %d\n", cpumask_weight(topology_core_cpumask(cpu))); - seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); + seq_printf(m, "core id\t\t: %d\n", c->topo.core_id); seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); seq_printf(m, "apicid\t\t: %d\n", c->topo.apicid); seq_printf(m, "initial apicid\t: %d\n", c->topo.initial_apicid); --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -146,7 +146,7 @@ int detect_extended_topology(struct cpui die_select_mask =3D (~(-1 << die_plus_mask_width)) >> core_plus_mask_width; =20 - c->cpu_core_id =3D apic->phys_pkg_id(c->topo.initial_apicid, + c->topo.core_id =3D apic->phys_pkg_id(c->topo.initial_apicid, ht_mask_width) & core_select_mask; =20 if (die_level_present) { --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -487,7 +487,7 @@ static bool match_smt(struct cpuinfo_x86 if (c->topo.pkg_id =3D=3D o->topo.pkg_id && c->topo.die_id =3D=3D o->topo.die_id && per_cpu(cpu_llc_id, cpu1) =3D=3D per_cpu(cpu_llc_id, cpu2)) { - if (c->cpu_core_id =3D=3D o->cpu_core_id) + if (c->topo.core_id =3D=3D o->topo.core_id) return topology_sane(c, o, "smt"); =20 if ((c->cu_id !=3D 0xff) && @@ -498,7 +498,7 @@ static bool match_smt(struct cpuinfo_x86 =20 } else if (c->topo.pkg_id =3D=3D o->topo.pkg_id && c->topo.die_id =3D=3D o->topo.die_id && - c->cpu_core_id =3D=3D o->cpu_core_id) { + c->topo.core_id =3D=3D o->topo.core_id) { return topology_sane(c, o, "smt"); } =20 @@ -1439,7 +1439,7 @@ static void remove_siblinginfo(int cpu) cpumask_clear(topology_sibling_cpumask(cpu)); cpumask_clear(topology_core_cpumask(cpu)); cpumask_clear(topology_die_cpumask(cpu)); - c->cpu_core_id =3D 0; + c->topo.core_id =3D 0; c->booted_cores =3D 0; cpumask_clear_cpu(cpu, cpu_sibling_setup_mask); recompute_smt_state();