From nobody Thu Sep 11 12:54:39 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74968C001DF for ; Wed, 2 Aug 2023 10:21:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233329AbjHBKVM (ORCPT ); Wed, 2 Aug 2023 06:21:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41944 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230456AbjHBKVC (ORCPT ); Wed, 2 Aug 2023 06:21:02 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70F5E213D for ; Wed, 2 Aug 2023 03:21:01 -0700 (PDT) Message-ID: <20230802101932.758513086@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690971660; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ifKZU+jjVp506gXqEzVY99mBfb+xgbx4G16QrL/5KJI=; b=Bgi3c5jIXWreNy1JQ1MW9oDkILk7cgZUTKPxAO8T5MMvnv1n/GW3zEjKiDefWH5acpRFJ7 VrXd5+F/maZKCZcWS9+bjE/LZIrlfkO4cVVrURoQpB+h7ofDPfGhCgpA9TpINiLIFzYfll /Qiho4obvDD73/Bu05lzc7Cw/mkNuwwK7+2b8KD97pZ3Fc70chGo/WXvDjvS0ZEtxNO5Tq VCV4xhMUWq9qhAGAjXch0YicemdBAI9QRTfJX8eHkZh6no/IRsIanCUpIvLMEM+zPNkeTk KLDSJbeGvWYnPkeSIGAwkr5WpY8MaZT5Pa69RV19/RrGQOWAS6KYdrUvaOYcIg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690971660; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ifKZU+jjVp506gXqEzVY99mBfb+xgbx4G16QrL/5KJI=; b=SbMoLthrNU8kvnS9+wB47EzWogOFxHaYI+rsI/o92tIgkiI6+VdfYFcC/i7ukbdnahT2go Yky/aTE8jn1fIyCw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Tom Lendacky , Andrew Cooper , Arjan van de Ven , Huang Rui , Juergen Gross , Dimitri Sivanich , Michael Kelley , Wei Liu Subject: [patch V3 01/40] cpu/SMT: Make SMT control more robust against enumeration failures References: <20230802101635.459108805@linutronix.de> MIME-Version: 1.0 Date: Wed, 2 Aug 2023 12:20:59 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The SMT control mechanism got added as speculation attack vector mitigation. The implemented logic relies on the primary thread mask to be set up properly. This turns out to be an issue with XEN/PV guests because their CPU hotplug mechanics do not enumerate APICs and therefore the mask is never correctly populated. This went unnoticed so far because by chance XEN/PV ends up with smp_num_siblings =3D=3D 2. So smt_hotplug_control stays at its default value CPU_SMT_ENABLED and the primary thread mask is never evaluated in the context of CPU hotplug. This stopped "working" with the upcoming overhaul of the topology evaluation which legitimately provides a fake topology for XEN/PV. That sets smp_num_siblings to 1, which causes the core CPU hot-plug core to refuse to bring up the APs. This happens because smt_hotplug_control is set to CPU_SMT_NOT_SUPPORTED which causes cpu_smt_allowed() to evaluate the unpopulated primary thread mask with the conclusion that all non-boot CPUs are not valid to be plugged. Make cpu_smt_allowed() more robust and take CPU_SMT_NOT_SUPPORTED and CPU_SMT_NOT_IMPLEMENTED into account. The primary mask issue on x86 XEN/PV needs to be addressed separately as there are users outside of the CPU hotplug code too. Fixes: 05736e4ac13c ("cpu/hotplug: Provide knobs to control SMT") Reported-by: Juergen Gross Signed-off-by: Thomas Gleixner --- kernel/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+) --- a/kernel/cpu.c +++ b/kernel/cpu.c @@ -630,6 +630,12 @@ static inline bool cpu_smt_allowed(unsig if (cpu_smt_control =3D=3D CPU_SMT_ENABLED) return true; =20 + if (cpu_smt_control =3D=3D CPU_SMT_NOT_SUPPORTED) + return true; + + if (cpu_smt_control =3D=3D CPU_SMT_NOT_IMPLEMENTED) + return true; + if (topology_is_primary_thread(cpu)) return true;