From nobody Sat Feb 7 08:45:14 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DD7DC001DE for ; Wed, 2 Aug 2023 07:37:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233120AbjHBHhV (ORCPT ); Wed, 2 Aug 2023 03:37:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233050AbjHBHgu (ORCPT ); Wed, 2 Aug 2023 03:36:50 -0400 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BBD21BF0; Wed, 2 Aug 2023 00:36:43 -0700 (PDT) Received: from francesco-nb.pivistrello.it (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id AFF8F1F83F; Wed, 2 Aug 2023 09:36:39 +0200 (CEST) From: Francesco Dolcini To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Judith Mendez , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Francesco Dolcini Subject: [PATCH v2 1/2] arm64: dts: ti: k3-am62: Add MCU MCAN nodes Date: Wed, 2 Aug 2023 09:36:34 +0200 Message-Id: <20230802073635.11290-2-francesco@dolcini.it> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230802073635.11290-1-francesco@dolcini.it> References: <20230802073635.11290-1-francesco@dolcini.it> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Judith Mendez On AM62x there are no hardware interrupts routed to A53 GIC interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were omitted from MCU dtsi. Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes to the MCU dtsi for the Cortex A53. [1] commit b382380c0d2d ("can: m_can: Add hrtimer to generate software inte= rrupt") [2] commit bb410c03b999 ("dt-bindings: net: can: Remove interrupt propertie= s for MCAN") Signed-off-by: Judith Mendez [fd: fixed labels to match datasheet numbering, revised commit message, fixed reg/reg-names order] Signed-off-by: Francesco Dolcini --- v1..v2: - fixed can node name - added commit prefix before sha in commit message --- arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/= ti/k3-am62-mcu.dtsi index 19fc38157d94..80a3e1db26a9 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi @@ -147,4 +147,28 @@ mcu_rti0: watchdog@4880000 { /* Tightly coupled to M4F */ status =3D "reserved"; }; + + mcu_mcan0: can@4e08000 { + compatible =3D "bosch,m_can"; + reg =3D <0x00 0x4e08000 0x00 0x200>, + <0x00 0x4e00000 0x00 0x8000>; + reg-names =3D "m_can", "message_ram"; + power-domains =3D <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 188 6>, <&k3_clks 188 1>; + clock-names =3D "hclk", "cclk"; + bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; + }; + + mcu_mcan1: can@4e18000 { + compatible =3D "bosch,m_can"; + reg =3D <0x00 0x4e18000 0x00 0x200>, + <0x00 0x4e10000 0x00 0x8000>; + reg-names =3D "m_can", "message_ram"; + power-domains =3D <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 189 6>, <&k3_clks 189 1>; + clock-names =3D "hclk", "cclk"; + bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; + status =3D "disabled"; + }; }; --=20 2.25.1 From nobody Sat Feb 7 08:45:14 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98E22C001DE for ; Wed, 2 Aug 2023 07:37:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233133AbjHBHhe (ORCPT ); Wed, 2 Aug 2023 03:37:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233117AbjHBHgu (ORCPT ); Wed, 2 Aug 2023 03:36:50 -0400 Received: from mail11.truemail.it (mail11.truemail.it [IPv6:2001:4b7e:0:8::81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8CA133585; Wed, 2 Aug 2023 00:36:43 -0700 (PDT) Received: from francesco-nb.pivistrello.it (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id 579F920389; Wed, 2 Aug 2023 09:36:40 +0200 (CEST) From: Francesco Dolcini To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Hiago De Franco , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Francesco Dolcini Subject: [PATCH v2 2/2] arm64: dts: ti: k3-am625-verdin: enable CAN_2 Date: Wed, 2 Aug 2023 09:36:35 +0200 Message-Id: <20230802073635.11290-3-francesco@dolcini.it> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230802073635.11290-1-francesco@dolcini.it> References: <20230802073635.11290-1-francesco@dolcini.it> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Hiago De Franco Add Verdin CAN_2 (TI AM62 MCU_MCAN0) and enable it on the Yavia, Dahlia and Verdin Development board. Signed-off-by: Hiago De Franco Signed-off-by: Francesco Dolcini --- .../boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 5 +++++ .../arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi | 5 +++++ .../boot/dts/ti/k3-am62-verdin-yavia.dtsi | 5 +++++ arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 19 +++++++++++++++++-- 4 files changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi b/arch/arm64= /boot/dts/ti/k3-am62-verdin-dahlia.dtsi index 3abd8d1d6761..33c8f6ffaa30 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi @@ -115,6 +115,11 @@ &mcu_i2c0 { status =3D "okay"; }; =20 +/* Verdin CAN_2 */ +&mcu_mcan0 { + status =3D "okay"; +}; + /* Verdin UART_4 */ &mcu_uart0 { status =3D "okay"; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi b/arch/arm64/bo= ot/dts/ti/k3-am62-verdin-dev.dtsi index 846caee7dfa4..8205081fda33 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi @@ -144,6 +144,11 @@ &mcu_i2c0 { status =3D "okay"; }; =20 +/* Verdin CAN_2 */ +&mcu_mcan0 { + status =3D "okay"; +}; + /* Verdin UART_4 */ &mcu_uart0 { status =3D "okay"; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi b/arch/arm64/= boot/dts/ti/k3-am62-verdin-yavia.dtsi index cb11d6e7f525..c685df7deaee 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi @@ -167,6 +167,11 @@ &mcu_i2c0 { status =3D "okay"; }; =20 +/* Verdin CAN_2 */ +&mcu_mcan0 { + status =3D "okay"; +}; + /* Verdin UART_4 */ &mcu_uart0 { status =3D "okay"; diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/d= ts/ti/k3-am62-verdin.dtsi index 57dd061911ab..12dd1d64eac9 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -19,6 +19,8 @@ chosen { }; =20 aliases { + can0 =3D &main_mcan0; + can1 =3D &mcu_mcan0; ethernet0 =3D &cpsw_port1; ethernet1 =3D &cpsw_port2; i2c0 =3D &main_i2c0; @@ -732,6 +734,14 @@ AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C= 0_SDA */ /* SODIMM 57 */ >; }; =20 + /* Verdin CAN_2 */ + pinctrl_mcu_mcan0: mcu-mcan0-default-pins { + pinctrl-single,pins =3D < + AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIM= M 26 */ + AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIM= M 24 */ + >; + }; + /* Verdin UART_4 - Reserved to Cortex-M4 */ pinctrl_mcu_uart0: mcu-uart0-default-pins { pinctrl-single,pins =3D < @@ -1238,8 +1248,6 @@ &main_mcan0 { status =3D "disabled"; }; =20 -/* Verdin CAN_2 - Reserved to Cortex-M4 */ - /* Verdin SPI_1 */ &main_spi1 { pinctrl-names =3D "default"; @@ -1333,6 +1341,13 @@ &mcu_gpio0 { ""; }; =20 +/* Verdin CAN_2 */ +&mcu_mcan0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_mcu_mcan0>; + status =3D "disabled"; +}; + /* Verdin UART_4 - Cortex-M4 UART */ &mcu_uart0 { pinctrl-names =3D "default"; --=20 2.25.1