From nobody Mon Feb 9 16:12:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5831FC04A6A for ; Tue, 1 Aug 2023 18:39:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231354AbjHASjm (ORCPT ); Tue, 1 Aug 2023 14:39:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230418AbjHASjd (ORCPT ); Tue, 1 Aug 2023 14:39:33 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1F57269E for ; Tue, 1 Aug 2023 11:39:20 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-c647150c254so188437276.1 for ; Tue, 01 Aug 2023 11:39:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690915160; x=1691519960; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=+4BLZZeGhG40EcbLuFOBYtdkNq0Rnp36mGGQJXKhqHg=; b=giB1hGxDlMSE5unC+CgFqybePP3FRLQ3UTMIB/Lm9Au07qT5AJnLiDgMQro9DByt7H H9hkyrUp7SAxF04p+3pIrtSkoOg90qLXfLooiJG0HgGocxJZUMAcJ/JacG4hXgLjizx7 akACRhjWunOio6OLZsR/9Wih0Y45Tk6Orv4jJLCZvVKyjDjFkHFfl7tCRO8LLcH1xdMv 8Xk0T2hj41QDoxlDYIWw+J3hnweUqpeu8l/I2YW/TGMqfUbS++J5kRl5Y1rHzLlsifU3 XaYMK8WiQsu14t+4wWZWDt5E+zm1ESd/v39kvrd08xmqr4a65ilNzqc9BSzbALTDHPmv gWeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690915160; x=1691519960; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=+4BLZZeGhG40EcbLuFOBYtdkNq0Rnp36mGGQJXKhqHg=; b=KKQonq425NsknZw7wdyf2LmJZQJv2ABHZzNHIYyybt7iPWDRigYBVIROiQm4ZPHFZZ bTfNEP6ZyKRHDMAsdCzrV2Sa8ZzG1dtvbj/ElLnnYMr20LphV0wTa1Vx8ptHSitzbRNG js/bwaiSdJWhM/eHoj3z+St7SW8mj86UqiCUyiOjA9Rha1+ru5tgygFMSfz2uPZKfHoR eUxa9ttCqv8bcjbJS92XXLRCV3GyOore/4LP/27D5MbbJgaqzKwpJ4oMY7UF06Ja8JMJ xo0fPWIoB6asHeeXKK6WIS7upCjxOli9ofMIVHxAwL+lVHdICGTQa0pPkpaN9/Jnw3mB xBFA== X-Gm-Message-State: ABy/qLZNfO4lrQG8r74lx+mzjGRYhzx+XPyCMY8vI9p9XGgzYVcbvX2p /E8GvGxvzNgekSY20rLVlUzadXYUufwA X-Google-Smtp-Source: APBJJlF1fqQecIcDPlsgvc3fvbv+86ydAutfRz0YQYPV0qbDrPfVZ9ahNyS3E9NkY1dnqq62bKNmKaGPtm5R X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:a54:d53d:50e4:b5b8]) (user=mshavit job=sendgmr) by 2002:a05:6902:11cb:b0:d16:7ccc:b406 with SMTP id n11-20020a05690211cb00b00d167cccb406mr154700ybu.5.1690915159874; Tue, 01 Aug 2023 11:39:19 -0700 (PDT) Date: Wed, 2 Aug 2023 02:35:23 +0800 In-Reply-To: <20230801183845.4026101-1-mshavit@google.com> Mime-Version: 1.0 References: <20230801183845.4026101-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230802023524.v3.6.Ice063dcf87d1b777a72e008d9e3406d2bcf6d876@changeid> Subject: [PATCH v3 6/8] iommu/arm-smmu-v3: Move CD table to arm_smmu_master From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: robin.murphy@arm.com, will@kernel.org, jean-philippe@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, Michael Shavit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" With this change, each master will now own its own CD table instead of sharing one with other masters attached to the same domain. Attaching a stage 1 domain installs CD entries into the master's CD table. SVA writes its CD entries into each master's CD table if the domain is shared across masters. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe --- (no changes since v2) Changes in v2: - Allocate CD table when it's first needed instead of on probe. Changes in v1: - The master's CD table allocation was previously split to a different commit. This change now atomically allocates the new CD table, uses it, and removes the old one. drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 65 +++++++++------------ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 6 +- 2 files changed, 31 insertions(+), 40 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 34bd7815aeb8e..b05963cd4e5b5 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1025,7 +1025,7 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_ma= ster *master, u32 ssid) unsigned int idx; struct arm_smmu_l1_ctx_desc *l1_desc; struct arm_smmu_device *smmu =3D master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg =3D &master->domain->cd_table; + struct arm_smmu_ctx_desc_cfg *cdcfg =3D &master->cd_table; =20 if (!cdcfg->l1_desc) return cdcfg->cdtab + ssid * CTXDESC_CD_DWORDS; @@ -1062,7 +1062,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *m= aster, int ssid, u64 val; bool cd_live; __le64 *cdptr; - struct arm_smmu_ctx_desc_cfg *cd_table =3D &master->domain->cd_table; + struct arm_smmu_ctx_desc_cfg *cd_table =3D &master->cd_table; =20 if (WARN_ON(ssid >=3D (1 << cd_table->max_cds_bits))) return -E2BIG; @@ -1125,14 +1125,13 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master = *master, int ssid, return 0; } =20 -static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, - struct arm_smmu_master *master) +static int arm_smmu_alloc_cd_tables(struct arm_smmu_master *master) { int ret; size_t l1size; size_t max_contexts; struct arm_smmu_device *smmu =3D master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg =3D &smmu_domain->cd_table; + struct arm_smmu_ctx_desc_cfg *cdcfg =3D &master->cd_table; =20 cdcfg->stall_enabled =3D master->stall_enabled; cdcfg->max_cds_bits =3D master->ssid_bits; @@ -1174,12 +1173,12 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu= _domain *smmu_domain, return ret; } =20 -static void arm_smmu_free_cd_tables(struct arm_smmu_domain *smmu_domain) +static void arm_smmu_free_cd_tables(struct arm_smmu_master *master) { int i; size_t size, l1size; - struct arm_smmu_device *smmu =3D smmu_domain->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg =3D &smmu_domain->cd_table; + struct arm_smmu_device *smmu =3D master->smmu; + struct arm_smmu_ctx_desc_cfg *cdcfg =3D &master->cd_table; =20 if (cdcfg->l1_desc) { size =3D CTXDESC_L2_ENTRIES * (CTXDESC_CD_DWORDS << 3); @@ -1287,7 +1286,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu= _master *master, u32 sid, if (smmu_domain) { switch (smmu_domain->stage) { case ARM_SMMU_DOMAIN_S1: - cd_table =3D &smmu_domain->cd_table; + cd_table =3D &master->cd_table; break; case ARM_SMMU_DOMAIN_S2: case ARM_SMMU_DOMAIN_NESTED: @@ -2077,14 +2076,10 @@ static void arm_smmu_domain_free(struct iommu_domai= n *domain) =20 free_io_pgtable_ops(smmu_domain->pgtbl_ops); =20 - /* Free the CD and ASID, if we allocated them */ + /* Free the ASID or VMID */ if (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1) { - struct arm_smmu_ctx_desc_cfg *cd_table =3D &smmu_domain->cd_table; - /* Prevent SVA from touching the CD while we're freeing it */ mutex_lock(&arm_smmu_asid_lock); - if (cd_table->cdtab) - arm_smmu_free_cd_tables(smmu_domain); arm_smmu_free_asid(&smmu_domain->cd); mutex_unlock(&arm_smmu_asid_lock); } else { @@ -2096,7 +2091,7 @@ static void arm_smmu_domain_free(struct iommu_domain = *domain) kfree(smmu_domain); } =20 -static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, +static int arm_smmu_domain_finalise_cd(struct arm_smmu_domain *smmu_domain, struct arm_smmu_master *master, struct io_pgtable_cfg *pgtbl_cfg) { @@ -2115,10 +2110,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_sm= mu_domain *smmu_domain, if (ret) goto out_unlock; =20 - ret =3D arm_smmu_alloc_cd_tables(smmu_domain, master); - if (ret) - goto out_free_asid; - cd->asid =3D (u16)asid; cd->ttbr =3D pgtbl_cfg->arm_lpae_s1_cfg.ttbr; cd->tcr =3D FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) | @@ -2130,17 +2121,9 @@ static int arm_smmu_domain_finalise_s1(struct arm_sm= mu_domain *smmu_domain, CTXDESC_CD_0_TCR_EPD1 | CTXDESC_CD_0_AA64; cd->mair =3D pgtbl_cfg->arm_lpae_s1_cfg.mair; =20 - ret =3D arm_smmu_write_ctx_desc(master, 0, cd); - if (ret) - goto out_free_cd_tables; - mutex_unlock(&arm_smmu_asid_lock); return 0; =20 -out_free_cd_tables: - arm_smmu_free_cd_tables(smmu_domain); -out_free_asid: - arm_smmu_free_asid(cd); out_unlock: mutex_unlock(&arm_smmu_asid_lock); return ret; @@ -2203,7 +2186,7 @@ static int arm_smmu_domain_finalise(struct iommu_doma= in *domain, ias =3D min_t(unsigned long, ias, VA_BITS); oas =3D smmu->ias; fmt =3D ARM_64_LPAE_S1; - finalise_stage_fn =3D arm_smmu_domain_finalise_s1; + finalise_stage_fn =3D arm_smmu_domain_finalise_cd; break; case ARM_SMMU_DOMAIN_NESTED: case ARM_SMMU_DOMAIN_S2: @@ -2443,14 +2426,6 @@ static int arm_smmu_attach_dev(struct iommu_domain *= domain, struct device *dev) } else if (smmu_domain->smmu !=3D smmu) { ret =3D -EINVAL; goto out_unlock; - } else if (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1 && - master->ssid_bits !=3D smmu_domain->cd_table.max_cds_bits) { - ret =3D -EINVAL; - goto out_unlock; - } else if (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1 && - smmu_domain->cd_table.stall_enabled !=3D master->stall_enabled) { - ret =3D -EINVAL; - goto out_unlock; } =20 master->domain =3D smmu_domain; @@ -2465,6 +2440,22 @@ static int arm_smmu_attach_dev(struct iommu_domain *= domain, struct device *dev) if (smmu_domain->stage !=3D ARM_SMMU_DOMAIN_BYPASS) master->ats_enabled =3D arm_smmu_ats_supported(master); =20 + if (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1) { + if (!master->cd_table.cdtab) { + ret =3D arm_smmu_alloc_cd_tables(master); + if (ret) { + master->domain =3D NULL; + goto out_unlock; + } + } + + ret =3D arm_smmu_write_ctx_desc(master, 0, &smmu_domain->cd); + if (ret) { + master->domain =3D NULL; + goto out_unlock; + } + } + arm_smmu_install_ste_for_dev(master); =20 spin_lock_irqsave(&smmu_domain->devices_lock, flags); @@ -2719,6 +2710,8 @@ static void arm_smmu_release_device(struct device *de= v) arm_smmu_detach_dev(master); arm_smmu_disable_pasid(master); arm_smmu_remove_master(master); + if (master->cd_table.cdtab_dma) + arm_smmu_free_cd_tables(master); kfree(master); } =20 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index 6066a09c01996..f2acfcc1af925 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -694,6 +694,7 @@ struct arm_smmu_master { struct arm_smmu_domain *domain; struct list_head domain_head; struct arm_smmu_stream *streams; + struct arm_smmu_ctx_desc_cfg cd_table; unsigned int num_streams; bool ats_enabled; bool stall_enabled; @@ -720,11 +721,8 @@ struct arm_smmu_domain { =20 enum arm_smmu_domain_stage stage; union { - struct { struct arm_smmu_ctx_desc cd; - struct arm_smmu_ctx_desc_cfg cd_table; - }; - struct arm_smmu_s2_cfg s2_cfg; + struct arm_smmu_s2_cfg s2_cfg; }; =20 struct iommu_domain domain; --=20 2.41.0.585.gd2178a4bd4-goog