From nobody Sun Feb 8 11:05:58 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92AE9EB64DD for ; Wed, 2 Aug 2023 02:09:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230228AbjHBCJz (ORCPT ); Tue, 1 Aug 2023 22:09:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229606AbjHBCJx (ORCPT ); Tue, 1 Aug 2023 22:09:53 -0400 Received: from out28-112.mail.aliyun.com (out28-112.mail.aliyun.com [115.124.28.112]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5573319A0 for ; Tue, 1 Aug 2023 19:09:51 -0700 (PDT) X-Alimail-AntiSpam: AC=CONTINUE;BC=0.07440748|-1;CH=blue;DM=|OVERLOAD|false|;DS=CONTINUE|ham_system_inform|0.0531706-0.0119323-0.934897;FP=0|0|0|0|0|-1|-1|-1;HT=ay29a033018047192;MF=sunran001@208suo.com;NM=1;PH=DS;RN=5;RT=5;SR=0;TI=SMTPD_---.U6LRrkh_1690942184; Received: from localhost.localdomain(mailfrom:sunran001@208suo.com fp:SMTPD_---.U6LRrkh_1690942184) by smtp.aliyun-inc.com; Wed, 02 Aug 2023 10:09:45 +0800 From: Ran Sun To: alexander.deucher@amd.com Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ran Sun Subject: [PATCH] drivers/amd/pm: Clean up errors in smu8_smumgr.h Date: Wed, 2 Aug 2023 02:09:43 +0000 Message-Id: <20230802020943.9322-1-sunran001@208suo.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Fix the following errors reported by checkpatch: ERROR: that open brace { should be on the previous line ERROR: space prohibited before that ',' (ctx:WxW) Signed-off-by: Ran Sun --- drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c | 48 ++++++++-------------- 1 file changed, 17 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c b/drivers/gpu/drm/a= md/pm/legacy-dpm/kv_dpm.c index 36c831b280ed..5d28c951a319 100644 --- a/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c +++ b/drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c @@ -191,8 +191,7 @@ static void sumo_construct_vid_mapping_table(struct amd= gpu_device *adev, } =20 #if 0 -static const struct kv_lcac_config_values sx_local_cac_cfg_kv[] =3D -{ +static const struct kv_lcac_config_values sx_local_cac_cfg_kv[] =3D { { 0, 4, 1 }, { 1, 4, 1 }, { 2, 5, 1 }, @@ -204,32 +203,27 @@ static const struct kv_lcac_config_values sx_local_ca= c_cfg_kv[] =3D { 0xffffffff } }; =20 -static const struct kv_lcac_config_values mc0_local_cac_cfg_kv[] =3D -{ +static const struct kv_lcac_config_values mc0_local_cac_cfg_kv[] =3D { { 0, 4, 1 }, { 0xffffffff } }; =20 -static const struct kv_lcac_config_values mc1_local_cac_cfg_kv[] =3D -{ +static const struct kv_lcac_config_values mc1_local_cac_cfg_kv[] =3D { { 0, 4, 1 }, { 0xffffffff } }; =20 -static const struct kv_lcac_config_values mc2_local_cac_cfg_kv[] =3D -{ +static const struct kv_lcac_config_values mc2_local_cac_cfg_kv[] =3D { { 0, 4, 1 }, { 0xffffffff } }; =20 -static const struct kv_lcac_config_values mc3_local_cac_cfg_kv[] =3D -{ +static const struct kv_lcac_config_values mc3_local_cac_cfg_kv[] =3D { { 0, 4, 1 }, { 0xffffffff } }; =20 -static const struct kv_lcac_config_values cpl_local_cac_cfg_kv[] =3D -{ +static const struct kv_lcac_config_values cpl_local_cac_cfg_kv[] =3D { { 0, 4, 1 }, { 1, 4, 1 }, { 2, 5, 1 }, @@ -260,39 +254,32 @@ static const struct kv_lcac_config_values cpl_local_c= ac_cfg_kv[] =3D { 0xffffffff } }; =20 -static const struct kv_lcac_config_reg sx0_cac_config_reg[] =3D -{ +static const struct kv_lcac_config_reg sx0_cac_config_reg[] =3D { { 0xc0400d00, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, = 0 } }; =20 -static const struct kv_lcac_config_reg mc0_cac_config_reg[] =3D -{ +static const struct kv_lcac_config_reg mc0_cac_config_reg[] =3D { { 0xc0400d30, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, = 0 } }; =20 -static const struct kv_lcac_config_reg mc1_cac_config_reg[] =3D -{ +static const struct kv_lcac_config_reg mc1_cac_config_reg[] =3D { { 0xc0400d3c, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, = 0 } }; =20 -static const struct kv_lcac_config_reg mc2_cac_config_reg[] =3D -{ +static const struct kv_lcac_config_reg mc2_cac_config_reg[] =3D { { 0xc0400d48, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, = 0 } }; =20 -static const struct kv_lcac_config_reg mc3_cac_config_reg[] =3D -{ +static const struct kv_lcac_config_reg mc3_cac_config_reg[] =3D { { 0xc0400d54, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, = 0 } }; =20 -static const struct kv_lcac_config_reg cpl_cac_config_reg[] =3D -{ +static const struct kv_lcac_config_reg cpl_cac_config_reg[] =3D { { 0xc0400d80, 0x003e0000, 17, 0x3fc00000, 22, 0x0001fffe, 1, 0x00000001, = 0 } }; #endif =20 -static const struct kv_pt_config_reg didt_config_kv[] =3D -{ +static const struct kv_pt_config_reg didt_config_kv[] =3D { { 0x10, 0x000000ff, 0, 0x0, KV_CONFIGREG_DIDT_IND }, { 0x10, 0x0000ff00, 8, 0x0, KV_CONFIGREG_DIDT_IND }, { 0x10, 0x00ff0000, 16, 0x0, KV_CONFIGREG_DIDT_IND }, @@ -1173,9 +1160,9 @@ static void kv_calculate_dfs_bypass_settings(struct a= mdgpu_device *adev) pi->graphics_level[i].ClkBypassCntl =3D 2; else if (kv_get_clock_difference(table->entries[i].clk, 26600) < 200) pi->graphics_level[i].ClkBypassCntl =3D 7; - else if (kv_get_clock_difference(table->entries[i].clk , 20000) < 200) + else if (kv_get_clock_difference(table->entries[i].clk, 20000) < 200) pi->graphics_level[i].ClkBypassCntl =3D 6; - else if (kv_get_clock_difference(table->entries[i].clk , 10000) < 200) + else if (kv_get_clock_difference(table->entries[i].clk, 10000) < 200) pi->graphics_level[i].ClkBypassCntl =3D 8; else pi->graphics_level[i].ClkBypassCntl =3D 0; @@ -1825,7 +1812,7 @@ static void kv_set_valid_clock_range(struct amdgpu_de= vice *adev, if ((new_ps->levels[0].sclk - table->entries[pi->highest_valid].sclk_frequency) > (table->entries[pi->lowest_valid].sclk_frequency - - new_ps->levels[new_ps->num_levels -1].sclk)) + new_ps->levels[new_ps->num_levels - 1].sclk)) pi->highest_valid =3D pi->lowest_valid; else pi->lowest_valid =3D pi->highest_valid; @@ -3333,8 +3320,7 @@ static const struct amd_ip_funcs kv_dpm_ip_funcs =3D { .set_powergating_state =3D kv_dpm_set_powergating_state, }; =20 -const struct amdgpu_ip_block_version kv_smu_ip_block =3D -{ +const struct amdgpu_ip_block_version kv_smu_ip_block =3D { .type =3D AMD_IP_BLOCK_TYPE_SMC, .major =3D 1, .minor =3D 0, --=20 2.17.1