From nobody Wed Sep 10 02:52:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84B79C001DF for ; Wed, 2 Aug 2023 01:29:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230343AbjHBB3P (ORCPT ); Tue, 1 Aug 2023 21:29:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229727AbjHBB3N (ORCPT ); Tue, 1 Aug 2023 21:29:13 -0400 Received: from out28-90.mail.aliyun.com (out28-90.mail.aliyun.com [115.124.28.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B46B52102 for ; Tue, 1 Aug 2023 18:29:12 -0700 (PDT) X-Alimail-AntiSpam: AC=CONTINUE;BC=0.0743626|-1;CH=blue;DM=|OVERLOAD|false|;DS=CONTINUE|ham_system_inform|0.0504505-0.0256508-0.923899;FP=0|0|0|0|0|-1|-1|-1;HT=ay29a033018047202;MF=sunran001@208suo.com;NM=1;PH=DS;RN=5;RT=5;SR=0;TI=SMTPD_---.U6J0HG2_1690939745; Received: from localhost.localdomain(mailfrom:sunran001@208suo.com fp:SMTPD_---.U6J0HG2_1690939745) by smtp.aliyun-inc.com; Wed, 02 Aug 2023 09:29:07 +0800 From: Ran Sun To: alexander.deucher@amd.com Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ran Sun Subject: [PATCH] drm/amd/pm: Clean up errors in smu7_fusion.h Date: Wed, 2 Aug 2023 01:29:03 +0000 Message-Id: <20230802012903.8589-1-sunran001@208suo.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Fix the following errors reported by checkpatch: ERROR: open brace '{' following struct go on the same line ERROR: space prohibited before open square bracket '[' Signed-off-by: Ran Sun --- .../drm/amd/pm/powerplay/inc/smu7_fusion.h | 42 +++++++------------ 1 file changed, 16 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/powerplay/inc/smu7_fusion.h b/drivers/g= pu/drm/amd/pm/powerplay/inc/smu7_fusion.h index 78ada9ffd508..e130f52fe8d6 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/inc/smu7_fusion.h +++ b/drivers/gpu/drm/amd/pm/powerplay/inc/smu7_fusion.h @@ -36,8 +36,7 @@ #define SMU7_NUM_NON_TES 2 =20 // All 'soft registers' should be uint32_t. -struct SMU7_SoftRegisters -{ +struct SMU7_SoftRegisters { uint32_t RefClockFrequency; uint32_t PmTimerP; uint32_t FeatureEnables; @@ -80,8 +79,7 @@ struct SMU7_SoftRegisters =20 typedef struct SMU7_SoftRegisters SMU7_SoftRegisters; =20 -struct SMU7_Fusion_GraphicsLevel -{ +struct SMU7_Fusion_GraphicsLevel { uint32_t MinVddNb; =20 uint32_t SclkFrequency; @@ -111,8 +109,7 @@ struct SMU7_Fusion_GraphicsLevel =20 typedef struct SMU7_Fusion_GraphicsLevel SMU7_Fusion_GraphicsLevel; =20 -struct SMU7_Fusion_GIOLevel -{ +struct SMU7_Fusion_GIOLevel { uint8_t EnabledForActivity; uint8_t LclkDid; uint8_t Vid; @@ -137,8 +134,7 @@ struct SMU7_Fusion_GIOLevel typedef struct SMU7_Fusion_GIOLevel SMU7_Fusion_GIOLevel; =20 // UVD VCLK/DCLK state (level) definition. -struct SMU7_Fusion_UvdLevel -{ +struct SMU7_Fusion_UvdLevel { uint32_t VclkFrequency; uint32_t DclkFrequency; uint16_t MinVddNb; @@ -155,8 +151,7 @@ struct SMU7_Fusion_UvdLevel typedef struct SMU7_Fusion_UvdLevel SMU7_Fusion_UvdLevel; =20 // Clocks for other external blocks (VCE, ACP, SAMU). -struct SMU7_Fusion_ExtClkLevel -{ +struct SMU7_Fusion_ExtClkLevel { uint32_t Frequency; uint16_t MinVoltage; uint8_t Divider; @@ -166,8 +161,7 @@ struct SMU7_Fusion_ExtClkLevel }; typedef struct SMU7_Fusion_ExtClkLevel SMU7_Fusion_ExtClkLevel; =20 -struct SMU7_Fusion_ACPILevel -{ +struct SMU7_Fusion_ACPILevel { uint32_t Flags; uint32_t MinVddNb; uint32_t SclkFrequency; @@ -181,8 +175,7 @@ struct SMU7_Fusion_ACPILevel =20 typedef struct SMU7_Fusion_ACPILevel SMU7_Fusion_ACPILevel; =20 -struct SMU7_Fusion_NbDpm -{ +struct SMU7_Fusion_NbDpm { uint8_t DpmXNbPsHi; uint8_t DpmXNbPsLo; uint8_t Dpm0PgNbPsHi; @@ -197,8 +190,7 @@ struct SMU7_Fusion_NbDpm =20 typedef struct SMU7_Fusion_NbDpm SMU7_Fusion_NbDpm; =20 -struct SMU7_Fusion_StateInfo -{ +struct SMU7_Fusion_StateInfo { uint32_t SclkFrequency; uint32_t LclkFrequency; uint32_t VclkFrequency; @@ -214,8 +206,7 @@ struct SMU7_Fusion_StateInfo =20 typedef struct SMU7_Fusion_StateInfo SMU7_Fusion_StateInfo; =20 -struct SMU7_Fusion_DpmTable -{ +struct SMU7_Fusion_DpmTable { uint32_t SystemFlags; =20 SMU7_PIDController GraphicsPIDController; @@ -230,12 +221,12 @@ struct SMU7_Fusion_DpmTable uint8_t SamuLevelCount; uint16_t FpsHighT; =20 - SMU7_Fusion_GraphicsLevel GraphicsLevel [SMU__NUM_SC= LK_DPM_STATE]; + SMU7_Fusion_GraphicsLevel GraphicsLevel[SMU__NUM_SCLK_DPM_STAT= E]; SMU7_Fusion_ACPILevel ACPILevel; - SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LE= VELS_UVD]; - SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LE= VELS_VCE]; - SMU7_Fusion_ExtClkLevel AcpLevel [SMU7_MAX_LE= VELS_ACP]; - SMU7_Fusion_ExtClkLevel SamuLevel [SMU7_MAX_LE= VELS_SAMU]; + SMU7_Fusion_UvdLevel UvdLevel[SMU7_MAX_LEVELS_UVD]; + SMU7_Fusion_ExtClkLevel VceLevel[SMU7_MAX_LEVELS_VCE]; + SMU7_Fusion_ExtClkLevel AcpLevel[SMU7_MAX_LEVELS_ACP]; + SMU7_Fusion_ExtClkLevel SamuLevel[SMU7_MAX_LEVELS_SAMU]; =20 uint8_t UvdBootLevel; uint8_t VceBootLevel; @@ -266,10 +257,9 @@ struct SMU7_Fusion_DpmTable =20 }; =20 -struct SMU7_Fusion_GIODpmTable -{ +struct SMU7_Fusion_GIODpmTable { =20 - SMU7_Fusion_GIOLevel GIOLevel [SMU7_MAX_LE= VELS_GIO]; + SMU7_Fusion_GIOLevel GIOLevel[SMU7_MAX_LEVELS_GIO]; =20 SMU7_PIDController GioPIDController; =20 --=20 2.17.1