From nobody Wed Sep 10 09:35:39 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D1F2C00528 for ; Tue, 1 Aug 2023 22:12:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232850AbjHAWMJ (ORCPT ); Tue, 1 Aug 2023 18:12:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232590AbjHAWMG (ORCPT ); Tue, 1 Aug 2023 18:12:06 -0400 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D442C1BC3 for ; Tue, 1 Aug 2023 15:11:55 -0700 (PDT) Received: by mail-pj1-x1032.google.com with SMTP id 98e67ed59e1d1-26871992645so3993706a91.0 for ; Tue, 01 Aug 2023 15:11:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690927915; x=1691532715; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K7ci3vRgnbD84Ma3Cd7Iy4r3YW2QkAQDRD/x7G43pvo=; b=gOMKnOXNzf7AA96lVbcztTsuRNhShGOCdRvVNQy+bbxH0GqduvCtT/B7lF87kH3rzY srYY6Q6fmPS6qJAQ8QDlDRUe3w2JjTaJ7/f+vk38aS8+nKohlVy6M+5JKfbOgpcrqBDZ DB/a/eDNUpOS7wLL/buqpH8B44gxwyP5UvDJBY+o1gEt9xzXXq9qIQlR/Rl6VjT7Hzrg C0epnUhkrdkiSMuFjDDwPZpS8XMxdpDA2VC9LOZiCBIyzvdJpxZi4Yt6kuM1pP+mKL3R Xc6WhRQVpziWy+7jdpMX9fJvZFQUazu3meXw1qaCVAOHJz2DrkMxcfYASb17fB6YWZzI Bakg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690927915; x=1691532715; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K7ci3vRgnbD84Ma3Cd7Iy4r3YW2QkAQDRD/x7G43pvo=; b=I1qRG/rrJIEv/a9Mgr7ynge3Ta/kvI1I9nA8tQauU4D0Kf5RAt57FWvJs/7+8Cqx5U y5ie12KtJLsmKWsr299HFDge1QlCnFrRalkPMVnajgnA6U53+NZGVf1D4EHmXtKTws0x 1agpTJC8yfYH9c4dGOKfLGsrR76sOfdiEZ/FpGGarY/b/WLLM/w+++8XxvOmYRaazz+Q zpvzAb9ij9HUA3+RFMFD70InsrRYrY2ypYKW6st1vGrP71eYwobWrNFCnreiTFgjGnVA vlFA5gbR13RmJmnBZ9TMI7BE/EobeOA6Fzl2I3UbJ7tYbsmuZJ+RCs9bC1iS9MfwMYWT U1dA== X-Gm-Message-State: ABy/qLZDX7PtGyhCuPSHspvm1H8vMJlO9mgjMzJzpcF8t63rWjXEoi8O 9O+lkV+FONIAZUkBH3QOS4gRPA== X-Google-Smtp-Source: APBJJlFcPFA4P+ZESm1FZRyQQpgvV0FcW4HtRh9tvhjwClE/ay+JFSui9ahA3y2SduCvnAZ2Xq3znw== X-Received: by 2002:a17:90b:897:b0:261:685:95b6 with SMTP id bj23-20020a17090b089700b00261068595b6mr13540693pjb.13.1690927915372; Tue, 01 Aug 2023 15:11:55 -0700 (PDT) Received: from evan.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id u9-20020a17090a410900b00268dac826d4sm19586pjf.0.2023.08.01.15.11.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Aug 2023 15:11:55 -0700 (PDT) From: Evan Green To: Palmer Dabbelt Cc: David Laight , Simon Hosie , Evan Green , Conor Dooley , Albert Ou , Andrew Jones , Anup Patel , Greentime Hu , Guo Ren , Heiko Stuebner , Jisheng Zhang , Ley Foon Tan , Marc Zyngier , Palmer Dabbelt , Paul Walmsley , Randy Dunlap , Samuel Holland , Sunil V L , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v3 2/2] RISC-V: alternative: Remove feature_probe_func Date: Tue, 1 Aug 2023 15:11:37 -0700 Message-Id: <20230801221138.2086734-3-evan@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230801221138.2086734-1-evan@rivosinc.com> References: <20230801221138.2086734-1-evan@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that we're testing unaligned memory copy and making that determination generically, there are no more users of the vendor feature_probe_func(). While I think it's probably going to need to come back, there are no users right now, so let's remove it until it's needed. Signed-off-by: Evan Green Reviewed-by: Conor Dooley --- (no changes since v1) arch/riscv/errata/thead/errata.c | 8 -------- arch/riscv/include/asm/alternative.h | 5 ----- arch/riscv/kernel/alternative.c | 19 ------------------- arch/riscv/kernel/smpboot.c | 1 - 4 files changed, 33 deletions(-) diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/err= ata.c index be84b14f0118..0554ed4bf087 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -120,11 +120,3 @@ void thead_errata_patch_func(struct alt_entry *begin, = struct alt_entry *end, if (stage =3D=3D RISCV_ALTERNATIVES_EARLY_BOOT) local_flush_icache_all(); } - -void thead_feature_probe_func(unsigned int cpu, - unsigned long archid, - unsigned long impid) -{ - if ((archid =3D=3D 0) && (impid =3D=3D 0)) - per_cpu(misaligned_access_speed, cpu) =3D RISCV_HWPROBE_MISALIGNED_FAST; -} diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/= alternative.h index 6a41537826a7..58ccd2f8cab7 100644 --- a/arch/riscv/include/asm/alternative.h +++ b/arch/riscv/include/asm/alternative.h @@ -30,7 +30,6 @@ #define ALT_OLD_PTR(a) __ALT_PTR(a, old_offset) #define ALT_ALT_PTR(a) __ALT_PTR(a, alt_offset) =20 -void probe_vendor_features(unsigned int cpu); void __init apply_boot_alternatives(void); void __init apply_early_boot_alternatives(void); void apply_module_alternatives(void *start, size_t length); @@ -53,15 +52,11 @@ void thead_errata_patch_func(struct alt_entry *begin, s= truct alt_entry *end, unsigned long archid, unsigned long impid, unsigned int stage); =20 -void thead_feature_probe_func(unsigned int cpu, unsigned long archid, - unsigned long impid); - void riscv_cpufeature_patch_func(struct alt_entry *begin, struct alt_entry= *end, unsigned int stage); =20 #else /* CONFIG_RISCV_ALTERNATIVE */ =20 -static inline void probe_vendor_features(unsigned int cpu) { } static inline void apply_boot_alternatives(void) { } static inline void apply_early_boot_alternatives(void) { } static inline void apply_module_alternatives(void *start, size_t length) {= } diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternativ= e.c index 6b75788c18e6..85056153fa23 100644 --- a/arch/riscv/kernel/alternative.c +++ b/arch/riscv/kernel/alternative.c @@ -27,8 +27,6 @@ struct cpu_manufacturer_info_t { void (*patch_func)(struct alt_entry *begin, struct alt_entry *end, unsigned long archid, unsigned long impid, unsigned int stage); - void (*feature_probe_func)(unsigned int cpu, unsigned long archid, - unsigned long impid); }; =20 static void riscv_fill_cpu_mfr_info(struct cpu_manufacturer_info_t *cpu_mf= r_info) @@ -43,7 +41,6 @@ static void riscv_fill_cpu_mfr_info(struct cpu_manufactur= er_info_t *cpu_mfr_info cpu_mfr_info->imp_id =3D sbi_get_mimpid(); #endif =20 - cpu_mfr_info->feature_probe_func =3D NULL; switch (cpu_mfr_info->vendor_id) { #ifdef CONFIG_ERRATA_SIFIVE case SIFIVE_VENDOR_ID: @@ -53,7 +50,6 @@ static void riscv_fill_cpu_mfr_info(struct cpu_manufactur= er_info_t *cpu_mfr_info #ifdef CONFIG_ERRATA_THEAD case THEAD_VENDOR_ID: cpu_mfr_info->patch_func =3D thead_errata_patch_func; - cpu_mfr_info->feature_probe_func =3D thead_feature_probe_func; break; #endif default: @@ -143,20 +139,6 @@ void riscv_alternative_fix_offsets(void *alt_ptr, unsi= gned int len, } } =20 -/* Called on each CPU as it starts */ -void probe_vendor_features(unsigned int cpu) -{ - struct cpu_manufacturer_info_t cpu_mfr_info; - - riscv_fill_cpu_mfr_info(&cpu_mfr_info); - if (!cpu_mfr_info.feature_probe_func) - return; - - cpu_mfr_info.feature_probe_func(cpu, - cpu_mfr_info.arch_id, - cpu_mfr_info.imp_id); -} - /* * This is called very early in the boot process (directly after we run * a feature detect on the boot CPU). No need to worry about other CPUs @@ -211,7 +193,6 @@ void __init apply_boot_alternatives(void) /* If called on non-boot cpu things could go wrong */ WARN_ON(smp_processor_id() !=3D 0); =20 - probe_vendor_features(0); _apply_alternatives((struct alt_entry *)__alt_start, (struct alt_entry *)__alt_end, RISCV_ALTERNATIVES_BOOT); diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 00ddbd2364dc..1b8da4e40a4d 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -247,7 +247,6 @@ asmlinkage __visible void smp_callin(void) numa_add_cpu(curr_cpuid); set_cpu_online(curr_cpuid, 1); check_unaligned_access(curr_cpuid); - probe_vendor_features(curr_cpuid); =20 if (has_vector()) { if (riscv_v_setup_vsize()) --=20 2.34.1