From nobody Mon Feb 9 13:03:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FDAAC001DC for ; Mon, 31 Jul 2023 09:11:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231214AbjGaJLZ (ORCPT ); Mon, 31 Jul 2023 05:11:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42164 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229479AbjGaJLW (ORCPT ); Mon, 31 Jul 2023 05:11:22 -0400 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 369E4102; Mon, 31 Jul 2023 02:11:20 -0700 (PDT) Received: from loongson.cn (unknown [10.20.42.201]) by gateway (Coremail) with SMTP id _____8Bx5fC1esdkRCINAA--.31526S3; Mon, 31 Jul 2023 17:11:17 +0800 (CST) Received: from localhost.localdomain (unknown [10.20.42.201]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxriOkesdk1DFCAA--.2097S3; Mon, 31 Jul 2023 17:11:17 +0800 (CST) From: Yinbo Zhu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jianmin Lv , wanghongliang@loongson.cn, Liu Peibao , loongson-kernel@lists.loongnix.cn, Yinbo Zhu Subject: [PATCH v2 1/2] gpio: dt-bindings: add parsing of loongson gpio offset Date: Mon, 31 Jul 2023 17:10:58 +0800 Message-Id: <20230731091059.17323-2-zhuyinbo@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230731091059.17323-1-zhuyinbo@loongson.cn> References: <20230731091059.17323-1-zhuyinbo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8CxriOkesdk1DFCAA--.2097S3 X-CM-SenderInfo: 52kx5xhqerqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add parsing GPIO configure, input, output, interrupt register offset address and GPIO control mode support. Signed-off-by: Yinbo Zhu --- .../bindings/gpio/loongson,ls-gpio.yaml | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml b= /Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml index fb86e8ce6349..cad67f8bfe6e 100644 --- a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml @@ -29,6 +29,33 @@ properties: =20 gpio-ranges: true =20 + loongson,gpio-conf-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO configuration register offset address. + + loongson,gpio-out-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO output register offset address. + + loongson,gpio-in-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO input register offset address. + + loongson,gpio-ctrl-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO control mode, where '0' represents + bit control mode and '1' represents byte control mode. + + loongson,gpio-inten-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + This option indicate this GPIO interrupt enable register offset + address. + interrupts: minItems: 1 maxItems: 64 @@ -39,6 +66,11 @@ required: - ngpios - "#gpio-cells" - gpio-controller + - loongson,gpio-conf-offset + - loongson,gpio-in-offset + - loongson,gpio-out-offset + - loongson,gpio-ctrl-mode + - loongson,gpio-inten-offset - gpio-ranges - interrupts =20 @@ -54,6 +86,11 @@ examples: ngpios =3D <64>; #gpio-cells =3D <2>; gpio-controller; + loongson,gpio-conf-offset =3D <0>; + loongson,gpio-in-offset =3D <0x20>; + loongson,gpio-out-offset =3D <0x10>; + loongson,gpio-ctrl-mode =3D <0>; + loongson,gpio-inten-offset =3D <0x30>; gpio-ranges =3D <&pctrl 0 0 15>, <&pctrl 16 16 15>, <&pctrl 32 32 10>, --=20 2.20.1 From nobody Mon Feb 9 13:03:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78615C001DC for ; Mon, 31 Jul 2023 09:11:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231633AbjGaJLb (ORCPT ); Mon, 31 Jul 2023 05:11:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230057AbjGaJLX (ORCPT ); Mon, 31 Jul 2023 05:11:23 -0400 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 38672103; Mon, 31 Jul 2023 02:11:20 -0700 (PDT) Received: from loongson.cn (unknown [10.20.42.201]) by gateway (Coremail) with SMTP id _____8BxJvG2esdkSSINAA--.31625S3; Mon, 31 Jul 2023 17:11:18 +0800 (CST) Received: from localhost.localdomain (unknown [10.20.42.201]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxriOkesdk1DFCAA--.2097S4; Mon, 31 Jul 2023 17:11:17 +0800 (CST) From: Yinbo Zhu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jianmin Lv , wanghongliang@loongson.cn, Liu Peibao , loongson-kernel@lists.loongnix.cn, Yinbo Zhu Subject: [PATCH v2 2/2] gpio: loongson: add firmware offset parse support Date: Mon, 31 Jul 2023 17:10:59 +0800 Message-Id: <20230731091059.17323-3-zhuyinbo@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230731091059.17323-1-zhuyinbo@loongson.cn> References: <20230731091059.17323-1-zhuyinbo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8CxriOkesdk1DFCAA--.2097S4 X-CM-SenderInfo: 52kx5xhqerqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Loongson GPIO controllers come in multiple variants that are compatible except for certain register offset values. Add support for device properties allowing to specify them in ACPI or DT. Signed-off-by: Yinbo Zhu --- drivers/gpio/gpio-loongson-64bit.c | 71 +++++++++++++++++++++++++++--- 1 file changed, 64 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-loongson-64bit.c b/drivers/gpio/gpio-loongso= n-64bit.c index 06213bbfabdd..7f92cb6205b2 100644 --- a/drivers/gpio/gpio-loongson-64bit.c +++ b/drivers/gpio/gpio-loongson-64bit.c @@ -26,6 +26,7 @@ struct loongson_gpio_chip_data { unsigned int conf_offset; unsigned int out_offset; unsigned int in_offset; + unsigned int inten_offset; }; =20 struct loongson_gpio_chip { @@ -117,7 +118,17 @@ static void loongson_gpio_set(struct gpio_chip *chip, = unsigned int pin, int valu =20 static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offse= t) { + unsigned int u; struct platform_device *pdev =3D to_platform_device(chip->parent); + struct loongson_gpio_chip *lgpio =3D to_loongson_gpio_chip(chip); + + if (lgpio->chip_data->mode =3D=3D BIT_CTRL_MODE) { + u =3D readl(lgpio->reg_base + lgpio->chip_data->inten_offset + offset / = 32 * 4); + u |=3D BIT(offset % 32); + writel(u, lgpio->reg_base + lgpio->chip_data->inten_offset + offset / 32= * 4); + } else { + writeb(1, lgpio->reg_base + lgpio->chip_data->inten_offset + offset); + } =20 return platform_get_irq(pdev, offset); } @@ -127,11 +138,30 @@ static int loongson_gpio_init(struct device *dev, str= uct loongson_gpio_chip *lgp { int ret; u32 ngpios; + unsigned int io_width; =20 lgpio->reg_base =3D reg_base; + if (device_property_read_u32(dev, "ngpios", &ngpios) || !ngpios) + return -EINVAL; + + ret =3D DIV_ROUND_UP(ngpios, 8); + switch (ret) { + case 1 ... 2: + io_width =3D ret; + break; + case 3 ... 4: + io_width =3D 0x4; + break; + case 5 ... 8: + io_width =3D 0x8; + break; + default: + dev_err(dev, "unsupported io width\n"); + return -EINVAL; + } =20 if (lgpio->chip_data->mode =3D=3D BIT_CTRL_MODE) { - ret =3D bgpio_init(&lgpio->chip, dev, 8, + ret =3D bgpio_init(&lgpio->chip, dev, io_width, lgpio->reg_base + lgpio->chip_data->in_offset, lgpio->reg_base + lgpio->chip_data->out_offset, NULL, NULL, @@ -151,16 +181,35 @@ static int loongson_gpio_init(struct device *dev, str= uct loongson_gpio_chip *lgp spin_lock_init(&lgpio->lock); } =20 - device_property_read_u32(dev, "ngpios", &ngpios); - - lgpio->chip.can_sleep =3D 0; lgpio->chip.ngpio =3D ngpios; - lgpio->chip.label =3D lgpio->chip_data->label; - lgpio->chip.to_irq =3D loongson_gpio_to_irq; + lgpio->chip.can_sleep =3D 0; + if (lgpio->chip_data->label) + lgpio->chip.label =3D lgpio->chip_data->label; + else + lgpio->chip.label =3D kstrdup(to_platform_device(dev)->name, GFP_KERNEL); + + if (lgpio->chip_data->inten_offset) + lgpio->chip.to_irq =3D loongson_gpio_to_irq; =20 return devm_gpiochip_add_data(dev, &lgpio->chip, lgpio); } =20 +static int loongson_gpio_get_props(struct device *dev, + struct loongson_gpio_chip *lgpio) +{ + const struct loongson_gpio_chip_data *d =3D lgpio->chip_data; + + if (device_property_read_u32(dev, "loongson,gpio-conf-offset", (u32 *)&d-= >conf_offset) + || device_property_read_u32(dev, "loongson,gpio-in-offset", (u32 *)&d= ->in_offset) + || device_property_read_u32(dev, "loongson,gpio-out-offset", (u32 *)&= d->out_offset) + || device_property_read_u32(dev, "loongson,gpio-ctrl-mode", (u32 *)&d= ->mode)) + return -EINVAL; + + device_property_read_u32(dev, "loongson,gpio-inten-offset", (u32 *)&d->in= ten_offset); + + return 0; +} + static int loongson_gpio_probe(struct platform_device *pdev) { void __iomem *reg_base; @@ -172,7 +221,12 @@ static int loongson_gpio_probe(struct platform_device = *pdev) if (!lgpio) return -ENOMEM; =20 - lgpio->chip_data =3D device_get_match_data(dev); + lgpio->chip_data =3D devm_kzalloc(dev, sizeof(*lgpio->chip_data), GFP_KER= NEL); + if (!lgpio->chip_data) + return -ENOMEM; + + if (loongson_gpio_get_props(dev, lgpio)) + lgpio->chip_data =3D device_get_match_data(dev); =20 reg_base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(reg_base)) @@ -215,6 +269,9 @@ static const struct acpi_device_id loongson_gpio_acpi_m= atch[] =3D { .id =3D "LOON0002", .driver_data =3D (kernel_ulong_t)&loongson_gpio_ls7a_data, }, + { + .id =3D "LOON0007", + }, {} }; MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match); --=20 2.20.1