From nobody Mon Feb 9 07:05:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03158C001E0 for ; Mon, 31 Jul 2023 02:37:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229714AbjGaChc (ORCPT ); Sun, 30 Jul 2023 22:37:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229541AbjGaChb (ORCPT ); Sun, 30 Jul 2023 22:37:31 -0400 Received: from out-120.mta1.migadu.com (out-120.mta1.migadu.com [IPv6:2001:41d0:203:375::78]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2EB9A12E for ; Sun, 30 Jul 2023 19:37:30 -0700 (PDT) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1690771046; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=YGR95yRmO0NXcTKJauK/6i2H1oijVAsHSX5nYFdazBc=; b=y7HgKG+7rXDVvsXLOtTK3gUkLL9pojDYe2EIkTioUg9aJ++0jNY+cqS8szvjRCFr6nHIW/ vbqgd9yWjb3/Cpf+XbKHMIoBeYm5nFbGDsswyNFtYj+3qm4gl+iW1+cWcZdkDvV+dnS4l4 w07+fv3tQn2y/bfWm7P58PLUYNJ9OnC8Wr5k4++4ytaf6Er/gNVXiqJaWYh4TAwVVcVa6q yXH7KehaoRVpsOYt3X3ZbszDzQFVusO8jjCKTQNIobenGbTUHqIpSXPUnnTMKs5gZ/rci3 UV51aD7vttu3otTGMjHmhqWN2AYeTPkzK7g1AE8NhXpkdy4MRj+dIRjgTx6VnA== From: John Watts To: linux-sunxi@lists.linux.dev Cc: John Watts , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Cristian Ciocaltea , Maksim Kiselev , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] riscv: dts: allwinner: d1: Specify default CAN pins Date: Mon, 31 Jul 2023 12:36:59 +1000 Message-ID: <20230731023701.2581713-1-contact@jookia.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" There are only one set of CAN pins available on these chips. Specify these as the default to avoid redundancy in board device trees. Signed-off-by: John Watts Acked-by: Jernej Skrabec --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv= /boot/dts/allwinner/sunxi-d1s-t113.dtsi index 4086c0cc0f9d..b27c3fc13b0d 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -898,6 +898,8 @@ can0: can@2504000 { interrupts =3D ; clocks =3D <&ccu CLK_BUS_CAN0>; resets =3D <&ccu RST_BUS_CAN0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&can0_pins>; status =3D "disabled"; }; =20 @@ -907,6 +909,8 @@ can1: can@2504400 { interrupts =3D ; clocks =3D <&ccu CLK_BUS_CAN1>; resets =3D <&ccu RST_BUS_CAN1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&can1_pins>; status =3D "disabled"; }; }; --=20 2.41.0