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[95.232.62.70]) by smtp.gmail.com with ESMTPSA id n21-20020aa7d055000000b0051e26c7a154sm1425057edo.18.2023.07.27.23.34.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jul 2023 23:34:22 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Philippe Cornu , Raphael Gallais-Pou , Amarula patchwork , Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v7 1/3] ARM: dts: stm32: add ltdc support on stm32f746 MCU Date: Fri, 28 Jul 2023 08:34:14 +0200 Message-Id: <20230728063417.2980091-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728063417.2980091-1-dario.binacchi@amarulasolutions.com> References: <20230728063417.2980091-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add LTDC (Lcd-tft Display Controller) support. Signed-off-by: Dario Binacchi Reviewed-by: Rapha=C3=ABl Gallais-Pou --- Changes in v7: - Add 'Reviewed-by' tag I forgot in v6. https://lore.kernel.org/linux-arm-kernel/20230629083726.84910-1-dario.bin= acchi@amarulasolutions.com/T/ arch/arm/boot/dts/st/stm32f746.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm= 32f746.dtsi index d1802efd067c..36eda1562e83 100644 --- a/arch/arm/boot/dts/st/stm32f746.dtsi +++ b/arch/arm/boot/dts/st/stm32f746.dtsi @@ -507,6 +507,16 @@ pwm { }; }; =20 + ltdc: display-controller@40016800 { + compatible =3D "st,stm32-ltdc"; + reg =3D <0x40016800 0x200>; + interrupts =3D <88>, <89>; + resets =3D <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks =3D <&rcc 1 CLK_LCD>; + clock-names =3D "lcd"; + status =3D "disabled"; + }; + pwrcfg: power-config@40007000 { compatible =3D "st,stm32-power-config", "syscon"; reg =3D <0x40007000 0x400>; --=20 2.34.1 From nobody Sun Feb 8 12:19:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B4F3C001DE for ; Fri, 28 Jul 2023 06:35:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232809AbjG1GfH (ORCPT ); Fri, 28 Jul 2023 02:35:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232807AbjG1Gey (ORCPT ); Fri, 28 Jul 2023 02:34:54 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF8184216 for ; Thu, 27 Jul 2023 23:34:26 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-5227799c224so2235477a12.0 for ; Thu, 27 Jul 2023 23:34:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1690526064; x=1691130864; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PU0Mm1LqR6Sd23PVyNdW/l5iyuu7GETQ6ileDMCjS3c=; b=MAL6quypMmxcdDXDyIfmE1EcLbwuJ+ytTfEPqf4tf2CkR3L1x2Woz+D5VrdldmYxab K5cbUlRFdGK3UNWSFMG21W8lQWJkXn8OZB+xIR+7JvpjEFm2CCerjyrRKZAuWh/GWcPo cvtF2r+VnMGdKDo5iNmJYwGOrAG2JRigeXFfI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690526064; x=1691130864; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PU0Mm1LqR6Sd23PVyNdW/l5iyuu7GETQ6ileDMCjS3c=; b=iY1X3lBsDlEZNzN/s+0q974/DI+3bohRauWibn7a/wc0w/HrSz3hC2d099FCnnm3Z9 F8j6FQ5jNeCZ6cxuA3kfFu5v7+HoP/ztfxA1rKCJ43tdLulgNb7jwVyEHylTjJ8xwV1i VSXJrtVJ9PuTE42FrDIwGsISFufIgzXNNO+MxZAMoZG/d3/HXSSFcVfli2znjq4XDiWD SpzHZvzjO5aXxGuWuF1Zc3uRwCEzNJZiBRFZZ0G0T22PiWDv/4ZDBX21qc6ewHuWqv2k aPkqMBKuj54zrbOHVzdu81G+QOm/GaLlChbE+YTFE0Zvi/3dqpuc2D3u1kkdlBJ9zyys fs7A== X-Gm-Message-State: ABy/qLbC8XA7wSBLoJx0cUeyhZ8hlr1BhgbeK3j4VaTrIdl22VXZy2h9 L364BTyAJkcVKyVw8Mzuw3dXMAHPCzGUTMt6YJU= X-Google-Smtp-Source: APBJJlEwVS10HgWPALySQfhw1BUCzGHABzjXnfKJaWlGokty4ZOXpOwaA7BlcsIIEnAynXI76Qm70g== X-Received: by 2002:a05:6402:296:b0:51e:34d5:a23f with SMTP id l22-20020a056402029600b0051e34d5a23fmr1074950edv.23.1690526064620; Thu, 27 Jul 2023 23:34:24 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-95-232-62-70.retail.telecomitalia.it. [95.232.62.70]) by smtp.gmail.com with ESMTPSA id n21-20020aa7d055000000b0051e26c7a154sm1425057edo.18.2023.07.27.23.34.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jul 2023 23:34:24 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Philippe Cornu , Raphael Gallais-Pou , Amarula patchwork , Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v7 2/3] ARM: dts: stm32: add pin map for LTDC on stm32f7 Date: Fri, 28 Jul 2023 08:34:15 +0200 Message-Id: <20230728063417.2980091-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728063417.2980091-1-dario.binacchi@amarulasolutions.com> References: <20230728063417.2980091-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board. Signed-off-by: Dario Binacchi Reviewed-by: Rapha=C3=ABl Gallais-Pou --- Changes in v7: - Add 'Reviewed-by' tag I forgot in v6. https://lore.kernel.org/linux-arm-kernel/20230629083726.84910-1-dario.bin= acchi@amarulasolutions.com/T/ Changes in v3: - rename ltdc-pins-a-0 to ltdc-0. arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/= st/stm32f7-pinctrl.dtsi index 9f65403295ca..36dad40dd0c7 100644 --- a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi @@ -365,6 +365,41 @@ pins2 { bias-pull-up; }; }; + + + ltdc_pins_a: ltdc-0 { + pins { + pinmux =3D , /* LCD_B0 */ + , /* LCD_B4 */ + , /* LCD_VSYNC */ + , /* LCD_HSYNC */ + , /* LCD_CLK */ + , /* LCD_R0 */ + , /* LCD_R1 */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G0 */ + , /* LCD_G1 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_B1 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + , /* LCD_B7 */ + ; /* LCD_DE */ + slew-rate =3D <2>; + }; + }; }; }; }; --=20 2.34.1 From nobody Sun Feb 8 12:19:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84263EB64DD for ; Fri, 28 Jul 2023 06:35:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233193AbjG1GfT (ORCPT ); Fri, 28 Jul 2023 02:35:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50600 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231135AbjG1GfA (ORCPT ); Fri, 28 Jul 2023 02:35:00 -0400 Received: from mail-ed1-x531.google.com (mail-ed1-x531.google.com [IPv6:2a00:1450:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F8963A90 for ; Thu, 27 Jul 2023 23:34:28 -0700 (PDT) Received: by mail-ed1-x531.google.com with SMTP id 4fb4d7f45d1cf-51de9c2bc77so2212776a12.3 for ; Thu, 27 Jul 2023 23:34:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1690526066; x=1691130866; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x4zfk9+w42D4Vl03+U/DigAoB0zXZh0Gh/1uuAJ0hLQ=; b=coD2+ErD1H/tMiWFxYbwD3Apev1+9aIZlthe+ztq56bfnfXpmVs8LMwr64b3MY2U1a oF6wJrG/o0Eduv4oKOZywDGBQ4zqrofs0hX5dNl/+y9TezfNxlLuAFhIv4lGE+W+MRBV sYoj8QzbajZeb5hGULBH0zSd2zcTAzjPUN8FE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690526066; x=1691130866; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=x4zfk9+w42D4Vl03+U/DigAoB0zXZh0Gh/1uuAJ0hLQ=; b=bBEcbQLl4UDN4dTRCCkDnDL/wO0gqnXzusQfA3lEzYwPz+sZ+GjAKC5aW4AbsFAelC idaUfC04eEYFJZqtME0VfLD0nU8M/aCh8igZqr1BqchphBCneBH1+S+tV7LnzznfMcFP yh8wxJKKjAZQnHq7eSGktz/+RWgj6MzKZskyZcjoStF9ngSH0K+6fcnkK69naCoMrMhp QUL9Bei1dvUQv6IMw6S3iY3EQyCnDS7rzbPtpRDF2pnHKp2uMJp368wRw4LZds2XbOcn M4G3FFBZKXJ1E6hQSagpVUkt5p09lW6pKRHa5xfi9XhUf5DSWv+BKE31n/MLijYYilFU eiyg== X-Gm-Message-State: ABy/qLZmcB+r+2autMFT7i7eHEodTmc4t0xLKhHYMZj/4fIMgR/PHd+h EyhhsfDhE95ylzpfeH/gZnoE8RndpwhUK8/SwZs= X-Google-Smtp-Source: APBJJlExcM9nsUMinTrlbRyT2/HWEEoSamyFcmaPaQEvX5nWwoO/D+suXZBHBjXeV/Vd57iiM5ytww== X-Received: by 2002:aa7:d847:0:b0:520:f5dd:3335 with SMTP id f7-20020aa7d847000000b00520f5dd3335mr928262eds.41.1690526066222; Thu, 27 Jul 2023 23:34:26 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-95-232-62-70.retail.telecomitalia.it. [95.232.62.70]) by smtp.gmail.com with ESMTPSA id n21-20020aa7d055000000b0051e26c7a154sm1425057edo.18.2023.07.27.23.34.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jul 2023 23:34:25 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Philippe Cornu , Raphael Gallais-Pou , Amarula patchwork , Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v7 3/3] ARM: dts: stm32: support display on stm32f746-disco board Date: Fri, 28 Jul 2023 08:34:16 +0200 Message-Id: <20230728063417.2980091-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728063417.2980091-1-dario.binacchi@amarulasolutions.com> References: <20230728063417.2980091-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support to Rocktech RK043FN48H display on stm32f746-disco board. Signed-off-by: Dario Binacchi Reviewed-by: Rapha=C3=ABl Gallais-Pou --- Changes in v7: - Add 'Reviewed-by' tag I forgot in v6. https://lore.kernel.org/linux-arm-kernel/20230629083726.84910-1-dario.bin= acchi@amarulasolutions.com/T/ Changes in v6: - Remove dma nodes from stm32f746-disco.dts, they are not used by LTDC, so there is no need to enable them. Changes in v5: I am confident that framebuffer sizing is a real requirement for STM32 boar= ds, but I need some time to understand if and how to introduce this functionali= ty. Therefore, I drop the following patches to allow the series to be fully mer= ged: - [4/6] dt-bindings: display: stm32-ltdc: add optional st,fb-bpp property - [5/6] ARM: dts: stm32: set framebuffer bit depth on stm32f746-disco - [6/6] drm/stm: set framebuffer bit depth through DTS property Changes in v4: - Use DTS property instead of module parameter to set the framebuffer bit d= epth. Changes in v3: - drop [4/6] dt-bindings: display: simple: add Rocktech RK043FN48H Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc= -next): https://cgit.freedesktop.org/drm/drm-misc/commit/?id=3Dc42a37a27c777d6396= 1dd634a30f7c887949491a - drop [5/6] drm/panel: simple: add support for Rocktech RK043FN48H panel Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc= -next) https://cgit.freedesktop.org/drm/drm-misc/commit/?id=3D13cdd12a9f934158f4= ec817cf048fcb4384aa9dc arch/arm/boot/dts/st/stm32f746-disco.dts | 43 ++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f746-disco.dts b/arch/arm/boot/dts/s= t/stm32f746-disco.dts index c11616ed5fc6..c00d34179e2e 100644 --- a/arch/arm/boot/dts/st/stm32f746-disco.dts +++ b/arch/arm/boot/dts/st/stm32f746-disco.dts @@ -60,10 +60,41 @@ memory@c0000000 { reg =3D <0xC0000000 0x800000>; }; =20 + reserved-memory { + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + linux,cma { + compatible =3D "shared-dma-pool"; + no-map; + size =3D <0x80000>; + linux,dma-default; + }; + }; + aliases { serial0 =3D &usart1; }; =20 + backlight: backlight { + compatible =3D "gpio-backlight"; + gpios =3D <&gpiok 3 GPIO_ACTIVE_HIGH>; + status =3D "okay"; + }; + + panel_rgb: panel-rgb { + compatible =3D "rocktech,rk043fn48h"; + backlight =3D <&backlight>; + enable-gpios =3D <&gpioi 12 GPIO_ACTIVE_HIGH>; + status =3D "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint =3D <<dc_out_rgb>; + }; + }; + }; + usbotg_hs_phy: usb-phy { #phy-cells =3D <0>; compatible =3D "usb-nop-xceiv"; @@ -99,6 +130,18 @@ &i2c1 { status =3D "okay"; }; =20 +<dc { + pinctrl-0 =3D <<dc_pins_a>; + pinctrl-names =3D "default"; + status =3D "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint =3D <&panel_in_rgb>; + }; + }; +}; + &sdio1 { status =3D "okay"; vmmc-supply =3D <&mmc_vcard>; --=20 2.34.1