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([79.115.63.48]) by smtp.gmail.com with ESMTPSA id h14-20020a05600c260e00b003fbca942499sm1264346wma.14.2023.07.26.00.53.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Jul 2023 00:53:11 -0700 (PDT) From: Tudor Ambarus To: tkuw584924@gmail.com, takahiro.kuwano@infineon.com, michael@walle.cc Cc: pratyush@kernel.org, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, bacem.daassi@infineon.com, miquel.raynal@bootlin.com, richard@nod.at, Takahiro Kuwano Subject: [PATCH v4 06/11] mtd: spi-nor: spansion: add MCP support in set_octal_dtr() Date: Wed, 26 Jul 2023 10:52:52 +0300 Message-Id: <20230726075257.12985-7-tudor.ambarus@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230726075257.12985-1-tudor.ambarus@linaro.org> References: <20230726075257.12985-1-tudor.ambarus@linaro.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2370; i=tudor.ambarus@linaro.org; h=from:subject; bh=doE8v18UAwCgNrGgR/vrxrYb2ko5JOoI6sQ8dWotQW4=; b=owEBbQGS/pANAwAKAUtVT0eljRTpAcsmYgBkwNDY3mqSfchKqowpgyrLyI3ImYTReUH+R5oS1 Y/KJTj+vbGJATMEAAEKAB0WIQQdQirKzw7IbV4d/t9LVU9HpY0U6QUCZMDQ2AAKCRBLVU9HpY0U 6QyfB/4uuxOaTt48p7ouhOQz71ZZ+86XFAaMCYdjr/yy1lCkCARo5ETZ9JZ0HbsUws1oCCZHr4Z GlQwhLqcDzWomLtFap317Njk3lJcTDVeREJsrGWfd0qajoSDhy67NX6PYbH+Bn43T+uOeWcRqku zrFsnnCnBVxYGQrQNOheDB/9SmWrrb6oGw8wuVKAW5dW9+ch9a1pdqADs7P/9Z58v417M+pDLRA +T5IB2oQjksf0J22I1sDE5L1YhcbDiuejBj426V/iljSonJd2pIv1qLK8pwaLsBgvTKxEGOF5pH eqDOSq3HYievyFVpU7XAejWrJhAovmJIfM8pEIt5ha3ifHJu X-Developer-Key: i=tudor.ambarus@linaro.org; a=openpgp; fpr=280B06FD4CAAD2980C46DDDF4DB1B079AD29CF3D Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Takahiro Kuwano Infineon multi-chip package (MCP) devices require the Octal DTR configuraion to be set on each die. We can access to configuration registers in each die by using params->n_dice and params->vreg_offset[] populated from SFDP. Add MCP support in set_octal_dtr(). Signed-off-by: Takahiro Kuwano --- drivers/mtd/spi-nor/spansion.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 6d8dd800ba65..b3a710985f84 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -204,17 +204,19 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *n= or) const struct spi_nor_flash_parameter *params =3D nor->params; u8 *buf =3D nor->bouncebuf; u64 addr; - int ret; + int i, ret; =20 - addr =3D params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR2; - ret =3D cypress_nor_set_memlat(nor, addr); - if (ret) - return ret; + for (i =3D 0; i < params->n_dice; i++) { + addr =3D params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR2; + ret =3D cypress_nor_set_memlat(nor, addr); + if (ret) + return ret; =20 - addr =3D params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR5; - ret =3D cypress_nor_set_octal_dtr_bits(nor, addr); - if (ret) - return ret; + addr =3D params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR5; + ret =3D cypress_nor_set_octal_dtr_bits(nor, addr); + if (ret) + return ret; + } =20 /* Read flash ID to make sure the switch was successful. */ ret =3D spi_nor_read_id(nor, nor->addr_nbytes, 3, buf, @@ -249,14 +251,17 @@ static int cypress_nor_set_single_spi_bits(struct spi= _nor *nor, u64 addr) =20 static int cypress_nor_octal_dtr_dis(struct spi_nor *nor) { + const struct spi_nor_flash_parameter *params =3D nor->params; u8 *buf =3D nor->bouncebuf; u64 addr; - int ret; + int i, ret; =20 - addr =3D nor->params->vreg_offset[0] + SPINOR_REG_CYPRESS_CFR5; - ret =3D cypress_nor_set_single_spi_bits(nor, addr); - if (ret) - return ret; + for (i =3D 0; i < params->n_dice; i++) { + addr =3D params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR5; + ret =3D cypress_nor_set_single_spi_bits(nor, addr); + if (ret) + return ret; + } =20 /* Read flash ID to make sure the switch was successful. */ ret =3D spi_nor_read_id(nor, 0, 0, buf, SNOR_PROTO_1_1_1); --=20 2.34.1