From nobody Fri Dec 19 07:46:20 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 168E5C001DE for ; Mon, 24 Jul 2023 13:34:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230509AbjGXNeA (ORCPT ); Mon, 24 Jul 2023 09:34:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229899AbjGXNdw (ORCPT ); Mon, 24 Jul 2023 09:33:52 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8534490 for ; Mon, 24 Jul 2023 06:33:51 -0700 (PDT) Message-ID: <20230724132044.765449490@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1690205630; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=N2qRiZb8v2jTNGf2U89OytfeZ4DEwa0WFTfs8zeFafY=; b=ZtCMDmh9Xsk2egFLNUn2vGgbVEk/Yifal/hrz/ZQoSBuyqsKUfXL0lBATBBZ43hVRCILtp LTRILAYcJgVxctNEZJwdn9unA6++BoXwVgBS90KOxEsJ9/eOJIN3H+FgapGy2coCq74Iei JsJC7k/V9IYFJNHKrv6d8Jm6Aj8vAlRH+TklooBm+DUZKZrqHXAamZ+G6ebirULgG5d+rD JDiLgGOoA7MlftuQ9rU1ICe7AzYwp3X+QZZPP6dRGukUgsYsgOB3XFXSYZgaccag6TCi+N YBVTILKqc6/7C4nEGflDhp6YPxphPPL4du3dGcLEcePMn3ulJj2UJhUrtKP7gA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1690205630; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=N2qRiZb8v2jTNGf2U89OytfeZ4DEwa0WFTfs8zeFafY=; b=mgh5cr12/Iufcc5mWikiuWj8o/ih+wsAA2d5lhFpZdcvNINw6wVHXKRh1RNs9xMRZ7M+FV NMBBQx4e7KeOMlCA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Andrew Cooper , Tom Lendacky , Paolo Bonzini , Wei Liu , Arjan van de Ven , Juergen Gross , Michael Kelley , Peter Keresztes Schmidt , "Peter Zijlstra (Intel)" Subject: [patch V2 03/58] x86/apic: Rename disable_apic References: <20230724131206.500814398@linutronix.de> MIME-Version: 1.0 Date: Mon, 24 Jul 2023 15:33:49 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" It reflects a state and not a command. Make it bool while at it. Signed-off-by: Thomas Gleixner Acked-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/apic.h | 4 ++-- arch/x86/kernel/apic/apic.c | 22 +++++++++++----------- arch/x86/kernel/apic/apic_noop.c | 6 +++--- arch/x86/kernel/apic/msi.c | 2 +- arch/x86/kernel/apic/vector.c | 2 +- arch/x86/kernel/setup.c | 2 +- arch/x86/pci/xen.c | 2 +- 7 files changed, 20 insertions(+), 20 deletions(-) --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -52,7 +52,7 @@ static inline void generic_apic_probe(vo extern int apic_verbosity; extern int local_apic_timer_c2_ok; =20 -extern int disable_apic; +extern bool apic_is_disabled; extern unsigned int lapic_timer_period; =20 extern int cpuid_to_apicid[]; @@ -90,7 +90,7 @@ static inline void default_inquire_remot */ static inline bool apic_from_smp_config(void) { - return smp_found_config && !disable_apic; + return smp_found_config && !apic_is_disabled; } =20 /* --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -180,7 +180,7 @@ static __init int setup_apicpmtimer(char #endif =20 unsigned long mp_lapic_addr __ro_after_init; -int disable_apic __ro_after_init; +bool apic_is_disabled __ro_after_init; /* Disable local APIC timer from the kernel commandline or via dmi quirk */ static int disable_apic_timer __initdata; /* Local APIC timer works in C2 */ @@ -810,7 +810,7 @@ bool __init apic_needs_pit(void) return true; =20 /* Is there an APIC at all or is it disabled? */ - if (!boot_cpu_has(X86_FEATURE_APIC) || disable_apic) + if (!boot_cpu_has(X86_FEATURE_APIC) || apic_is_disabled) return true; =20 /* @@ -1299,7 +1299,7 @@ enum apic_intr_mode_id apic_intr_mode __ static int __init __apic_intr_mode_select(void) { /* Check kernel option */ - if (disable_apic) { + if (apic_is_disabled) { pr_info("APIC disabled via kernel command line\n"); return APIC_PIC; } @@ -1308,7 +1308,7 @@ static int __init __apic_intr_mode_selec #ifdef CONFIG_X86_64 /* On 64-bit, the APIC must be integrated, Check local APIC only */ if (!boot_cpu_has(X86_FEATURE_APIC)) { - disable_apic =3D 1; + apic_is_disabled =3D true; pr_info("APIC disabled by BIOS\n"); return APIC_PIC; } @@ -1317,14 +1317,14 @@ static int __init __apic_intr_mode_selec =20 /* Neither 82489DX nor integrated APIC ? */ if (!boot_cpu_has(X86_FEATURE_APIC) && !smp_found_config) { - disable_apic =3D 1; + apic_is_disabled =3D true; return APIC_PIC; } =20 /* If the BIOS pretends there is an integrated APIC ? */ if (!boot_cpu_has(X86_FEATURE_APIC) && APIC_INTEGRATED(boot_cpu_apic_version)) { - disable_apic =3D 1; + apic_is_disabled =3D true; pr_err(FW_BUG "Local APIC %d not detected, force emulation\n", boot_cpu_physical_apicid); return APIC_PIC; @@ -1567,7 +1567,7 @@ static void setup_local_APIC(void) int cpu =3D smp_processor_id(); unsigned int value; =20 - if (disable_apic) { + if (apic_is_disabled) { disable_ioapic_support(); return; } @@ -1943,7 +1943,7 @@ void __init check_x2apic(void) pr_err("Kernel does not support x2APIC, please recompile with CONFIG_X86_= X2APIC.\n"); pr_err("Disabling APIC, expect reduced performance and functionality.\n"); =20 - disable_apic =3D 1; + apic_is_disabled =3D true; setup_clear_cpu_cap(X86_FEATURE_APIC); } =20 @@ -2037,7 +2037,7 @@ int __init apic_force_enable(unsigned lo { u32 h, l; =20 - if (disable_apic) + if (apic_is_disabled) return -1; =20 /* @@ -2064,7 +2064,7 @@ int __init apic_force_enable(unsigned lo static int __init detect_init_APIC(void) { /* Disabled by kernel option? */ - if (disable_apic) + if (apic_is_disabled) return -1; =20 switch (boot_cpu_data.x86_vendor) { @@ -2919,7 +2919,7 @@ int apic_is_clustered_box(void) */ static int __init setup_disableapic(char *arg) { - disable_apic =3D 1; + apic_is_disabled =3D true; setup_clear_cpu_cap(X86_FEATURE_APIC); return 0; } --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -71,13 +71,13 @@ static int noop_apic_id_registered(void) =20 static u32 noop_apic_read(u32 reg) { - WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !disable_apic); + WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !apic_is_disabled); return 0; } =20 -static void noop_apic_write(u32 reg, u32 v) +static void noop_apic_write(u32 reg, u32 val) { - WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !disable_apic); + WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !apic_is_disabled); } =20 #ifdef CONFIG_X86_32 --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -269,7 +269,7 @@ static const struct msi_parent_ops x86_v =20 struct irq_domain * __init native_create_pci_msi_domain(void) { - if (disable_apic) + if (apic_is_disabled) return NULL; =20 x86_vector_domain->flags |=3D IRQ_DOMAIN_FLAG_MSI_PARENT; --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -536,7 +536,7 @@ static int x86_vector_alloc_irqs(struct struct irq_data *irqd; int i, err, node; =20 - if (disable_apic) + if (apic_is_disabled) return -ENXIO; =20 /* --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1020,7 +1020,7 @@ void __init setup_arch(char **cmdline_p) =20 if (acpi_mps_check()) { #ifdef CONFIG_X86_LOCAL_APIC - disable_apic =3D 1; + apic_is_disabled =3D true; #endif setup_clear_cpu_cap(X86_FEATURE_APIC); } --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -517,7 +517,7 @@ int __init pci_xen_init(void) #ifdef CONFIG_PCI_MSI static void __init xen_hvm_msi_init(void) { - if (!disable_apic) { + if (!apic_is_disabled) { /* * If hardware supports (x2)APIC virtualization (as indicated * by hypervisor's leaf 4) then we don't need to use pirqs/