From nobody Sun Feb 8 15:28:41 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8E53C001DE for ; Sun, 23 Jul 2023 16:25:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230006AbjGWQZM (ORCPT ); Sun, 23 Jul 2023 12:25:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46394 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230092AbjGWQZF (ORCPT ); Sun, 23 Jul 2023 12:25:05 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 728BD10CE; Sun, 23 Jul 2023 09:24:38 -0700 (PDT) Received: by mail-pf1-x42a.google.com with SMTP id d2e1a72fcca58-66f5faba829so2279865b3a.3; Sun, 23 Jul 2023 09:24:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690129469; x=1690734269; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0MuOuodU2lHTtwqoFZB85wA0J3lkhz0ajlvILK6N/z0=; b=Mj9QrBt0qWj/nc2LQ2BvIG+75xnYIQ6WMkQYJ9oW7LBVEGqml8ZQ3t80jf59Zp46Zp 02aCJ0Hj9KbRqL4YKbyQGiKk9yhpDL7ImRM2VWrhU8KQAfQkMnL06u2iZKbeEFAAvhjh Vo+dNDXntH10fm1YFY+3K1mXXW/GS4+f2VRFEJUBTClYJ4zirSAP0/74bjHilBvIWKOU wqanMWe1r0g3yMJUNa0A9qZfGloiSb5Z/jzlDMFJDLcMPj2fYakMIp4QxuhcX2/sqcvM r7wWH+YYTO+waGbBDoMrzN39o26CHK2GY7YergchcCm3ubefsB5S3z7PvjThOu8KO54T PFAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690129469; x=1690734269; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0MuOuodU2lHTtwqoFZB85wA0J3lkhz0ajlvILK6N/z0=; b=hMvECCvVF/Odxro+8k+7pzZ7fWLxIxICc22wR+5E4k7AqqWxtum4wry7LFGUyXDWEx PooehofQdfGrTA0StBTThYZhQ/dA/V1oNNjXKtJTVh2nBbzjuDTnYWL810quNYMmwK18 AcT5Uem3Qwmr4rHG1S2P6yNM/AI2f6WhYkzYcvxFF5fSn4KDxGUFpSqKMnAa5KS+4bPG XtX0QeLuFDNeZvayj1UyJ1mFUNFL8FtNiFVZjFyA/tKxjeyBLr2f+xvkL91zHeII8YGO 8RFbbMP2AwK5G7FaRnA7GER/JtNjrjXWLNp7t9JK1DoGj9Snj6czvGoQnRP/2lvefUfU VhsQ== X-Gm-Message-State: ABy/qLaYZG70BAaAm4+ocDuFB8ojxrm26S5Avd4chRyfsvN23/vJv5Xc lc0ItX1kSvTLmiuaPamJIfmX6Kgz0TJ7TRV7 X-Google-Smtp-Source: APBJJlEoVOxiHRal/V6RZanufCE/IIyNAsNbDcvpBbUsD8Nk+u05WdN4myXJo7KcqudxPtK/4Sel8w== X-Received: by 2002:a17:90a:d3c2:b0:267:f5d1:1dd3 with SMTP id d2-20020a17090ad3c200b00267f5d11dd3mr4564763pjw.11.1690129469017; Sun, 23 Jul 2023 09:24:29 -0700 (PDT) Received: from d.home.yangfl.dn42 ([104.28.245.199]) by smtp.gmail.com with ESMTPSA id u3-20020a17090aae8300b00265a7145fe5sm6883787pjq.41.2023.07.23.09.24.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Jul 2023 09:24:28 -0700 (PDT) From: David Yang To: linux-clk@vger.kernel.org Cc: David Yang , Michael Turquette , Stephen Boyd , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , linux-kernel@vger.kernel.org Subject: [PATCH v5 05/13] clk: hisilicon: hi3519: Use helper functions Date: Mon, 24 Jul 2023 00:22:30 +0800 Message-Id: <20230723162245.35033-6-mmyangfl@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230723162245.35033-1-mmyangfl@gmail.com> References: <20230723162245.35033-1-mmyangfl@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use common helper functions and register clks with a single of_device_id data. Signed-off-by: David Yang --- drivers/clk/hisilicon/clk-hi3519.c | 127 ++++------------------------- 1 file changed, 15 insertions(+), 112 deletions(-) diff --git a/drivers/clk/hisilicon/clk-hi3519.c b/drivers/clk/hisilicon/clk= -hi3519.c index b871872d9960..cb541de752da 100644 --- a/drivers/clk/hisilicon/clk-hi3519.c +++ b/drivers/clk/hisilicon/clk-hi3519.c @@ -10,7 +10,7 @@ #include #include #include "clk.h" -#include "reset.h" +#include "crg.h" =20 #define HI3519_INNER_CLK_OFFSET 64 #define HI3519_FIXED_24M 65 @@ -73,130 +73,33 @@ static const struct hisi_gate_clock hi3519_gate_clks[]= =3D { CLK_SET_RATE_PARENT, 0xe4, 18, 0, }, }; =20 -static struct hisi_clock_data *hi3519_clk_register(struct platform_device = *pdev) -{ - struct hisi_clock_data *clk_data; - int ret; - - clk_data =3D hisi_clk_alloc(pdev, HI3519_NR_CLKS); - if (!clk_data) - return ERR_PTR(-ENOMEM); - - ret =3D hisi_clk_register_fixed_rate(hi3519_fixed_rate_clks, - ARRAY_SIZE(hi3519_fixed_rate_clks), - clk_data); - if (ret) - return ERR_PTR(ret); - - ret =3D hisi_clk_register_mux(hi3519_mux_clks, - ARRAY_SIZE(hi3519_mux_clks), - clk_data); - if (ret) - goto unregister_fixed_rate; - - ret =3D hisi_clk_register_gate(hi3519_gate_clks, - ARRAY_SIZE(hi3519_gate_clks), - clk_data); - if (ret) - goto unregister_mux; - - ret =3D of_clk_add_provider(pdev->dev.of_node, - of_clk_src_onecell_get, &clk_data->clk_data); - if (ret) - goto unregister_gate; - - return clk_data; - -unregister_fixed_rate: - hisi_clk_unregister_fixed_rate(hi3519_fixed_rate_clks, - ARRAY_SIZE(hi3519_fixed_rate_clks), - clk_data); - -unregister_mux: - hisi_clk_unregister_mux(hi3519_mux_clks, - ARRAY_SIZE(hi3519_mux_clks), - clk_data); -unregister_gate: - hisi_clk_unregister_gate(hi3519_gate_clks, - ARRAY_SIZE(hi3519_gate_clks), - clk_data); - return ERR_PTR(ret); -} - -static void hi3519_clk_unregister(struct platform_device *pdev) -{ - struct hi3519_crg_data *crg =3D platform_get_drvdata(pdev); - - of_clk_del_provider(pdev->dev.of_node); - - hisi_clk_unregister_gate(hi3519_gate_clks, - ARRAY_SIZE(hi3519_mux_clks), - crg->clk_data); - hisi_clk_unregister_mux(hi3519_mux_clks, - ARRAY_SIZE(hi3519_mux_clks), - crg->clk_data); - hisi_clk_unregister_fixed_rate(hi3519_fixed_rate_clks, - ARRAY_SIZE(hi3519_fixed_rate_clks), - crg->clk_data); -} - -static int hi3519_clk_probe(struct platform_device *pdev) -{ - struct hi3519_crg_data *crg; - - crg =3D devm_kmalloc(&pdev->dev, sizeof(*crg), GFP_KERNEL); - if (!crg) - return -ENOMEM; - - crg->rstc =3D hisi_reset_init(pdev); - if (!crg->rstc) - return -ENOMEM; - - crg->clk_data =3D hi3519_clk_register(pdev); - if (IS_ERR(crg->clk_data)) { - hisi_reset_exit(crg->rstc); - return PTR_ERR(crg->clk_data); - } - - platform_set_drvdata(pdev, crg); - return 0; -} - -static void hi3519_clk_remove(struct platform_device *pdev) -{ - struct hi3519_crg_data *crg =3D platform_get_drvdata(pdev); - - hisi_reset_exit(crg->rstc); - hi3519_clk_unregister(pdev); -} - +static const struct hisi_clocks hi3519_crg_clks =3D { + .nr =3D HI3519_NR_CLKS, + .fixed_rate_clks =3D hi3519_fixed_rate_clks, + .fixed_rate_clks_num =3D ARRAY_SIZE(hi3519_fixed_rate_clks), + .mux_clks =3D hi3519_mux_clks, + .mux_clks_num =3D ARRAY_SIZE(hi3519_mux_clks), + .gate_clks =3D hi3519_gate_clks, + .gate_clks_num =3D ARRAY_SIZE(hi3519_gate_clks), +}; =20 static const struct of_device_id hi3519_clk_match_table[] =3D { - { .compatible =3D "hisilicon,hi3519-crg" }, + { .compatible =3D "hisilicon,hi3519-crg", + .data =3D &hi3519_crg_clks }, { } }; MODULE_DEVICE_TABLE(of, hi3519_clk_match_table); =20 static struct platform_driver hi3519_clk_driver =3D { - .probe =3D hi3519_clk_probe, - .remove_new =3D hi3519_clk_remove, + .probe =3D hisi_crg_probe, + .remove_new =3D hisi_crg_remove, .driver =3D { .name =3D "hi3519-clk", .of_match_table =3D hi3519_clk_match_table, }, }; =20 -static int __init hi3519_clk_init(void) -{ - return platform_driver_register(&hi3519_clk_driver); -} -core_initcall(hi3519_clk_init); - -static void __exit hi3519_clk_exit(void) -{ - platform_driver_unregister(&hi3519_clk_driver); -} -module_exit(hi3519_clk_exit); +module_platform_driver(hi3519_clk_driver); =20 MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("HiSilicon Hi3519 Clock Driver"); --=20 2.40.1