From nobody Sun Sep 7 14:40:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52284C001DC for ; Wed, 19 Jul 2023 03:26:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230168AbjGSD05 (ORCPT ); Tue, 18 Jul 2023 23:26:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49278 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230484AbjGSD0c (ORCPT ); Tue, 18 Jul 2023 23:26:32 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF86C2127; Tue, 18 Jul 2023 20:26:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1689737164; x=1721273164; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Zge9RC4suOhS4WSxzkRjdvntcW7BQ3V/JThuasqgeWI=; b=hntBO0iJTXHRRPb4sZZnGbjc6mvapaDkoLOVqumJkqT/rp2iGL4WXCB4 0+QQm1qyIeegy84thbCag9Tw8j4aGJ1/eO+rRzSSLWKrLMQ1GRnD1lKaw gicuHghPud5IjUa2qiIY+9vmLeG7vs0eagZWXKVT+biuwF0L4dvaxeLPn 1GjlqI2EbSoZt0lcWFggRRWvolgoon5nOilnMON6tW57Ylb00WFTEh+ZW /sVOM+Hc/U+hXzeMu9kyqP+FosvvN2NveVsD7dURXOhggIQyTguN2P2Gg T5B5o7daPiHTo2XuZl/ulVcSCkp3SNeuPAho2TFOI0SsguKP+GIQRrbn6 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10775"; a="346665874" X-IronPort-AV: E=Sophos;i="6.01,215,1684825200"; d="scan'208";a="346665874" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jul 2023 20:26:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10775"; a="813980290" X-IronPort-AV: E=Sophos;i="6.01,215,1684825200"; d="scan'208";a="813980290" Received: from arthur-vostro-3668.sh.intel.com ([10.238.200.123]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jul 2023 20:26:01 -0700 From: Zeng Guang To: Paolo Bonzini , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , H Peter Anvin , kvm@vger.kernel.org Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Zeng Guang Subject: [PATCH v2 7/8] KVM: x86: Virtualize CR4.LASS Date: Wed, 19 Jul 2023 10:45:57 +0800 Message-Id: <20230719024558.8539-8-guang.zeng@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230719024558.8539-1-guang.zeng@intel.com> References: <20230719024558.8539-1-guang.zeng@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Virtualize CR4.LASS[bit 27] under KVM control instead of being guest-owned as CR4.LASS generally set once for each vCPU at boot time and won't be toggled at runtime. Besides, only if VM has LASS capability enumerated with CPUID.(EAX=3D07H.ECX=3D1):EAX.LASS[bit 6], KVM allows guest software to be = able to set CR4.LASS. Updating cr4_fixed1 to set CR4.LASS bit in the emulated IA32_VMX_CR4_FIXED1 MSR for guests and allow guests to enable LASS in nested VMX operation as well. Notes: Setting CR4.LASS to 1 enable LASS in IA-32e mode. It doesn't take effect in legacy mode even if CR4.LASS is set. Signed-off-by: Zeng Guang Tested-by: Xuelian Guo --- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/vmx/vmx.c | 3 +++ arch/x86/kvm/x86.h | 2 ++ 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 791f0dd48cd9..a881b0518a18 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -125,7 +125,7 @@ | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ - | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) + | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP | X86_CR4_LASS)) =20 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) =20 diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 15a7c6e7a25d..e74991bed362 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7603,6 +7603,9 @@ static void nested_vmx_cr_fixed1_bits_update(struct k= vm_vcpu *vcpu) cr4_fixed1_update(X86_CR4_UMIP, ecx, feature_bit(UMIP)); cr4_fixed1_update(X86_CR4_LA57, ecx, feature_bit(LA57)); =20 + entry =3D kvm_find_cpuid_entry_index(vcpu, 0x7, 1); + cr4_fixed1_update(X86_CR4_LASS, eax, feature_bit(LASS)); + #undef cr4_fixed1_update } =20 diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index c544602d07a3..e1295f490308 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -529,6 +529,8 @@ bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, = u32 type); __reserved_bits |=3D X86_CR4_VMXE; \ if (!__cpu_has(__c, X86_FEATURE_PCID)) \ __reserved_bits |=3D X86_CR4_PCIDE; \ + if (!__cpu_has(__c, X86_FEATURE_LASS)) \ + __reserved_bits |=3D X86_CR4_LASS; \ __reserved_bits; \ }) =20 --=20 2.27.0