From nobody Sat Feb 7 10:07:56 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F368DEB64D9 for ; Wed, 12 Jul 2023 11:49:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233385AbjGLLtX (ORCPT ); Wed, 12 Jul 2023 07:49:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233266AbjGLLs7 (ORCPT ); Wed, 12 Jul 2023 07:48:59 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF8AA1BFB; Wed, 12 Jul 2023 04:48:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1689162489; x=1720698489; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OMEwk0X8NNrrJfGShu2S3rKH+WcQr9i/VJ2no0E2OfU=; b=SJBW9F8v+uAp/pG5A19UfaoeZPZvfZKNm57KRc6PGOJkNen+MegSbNQK TBINv575PuPMweUUT1iIMR5teEdFpQnd8/OevGhx09iaiHbuQR0lBHaG4 At4B6j40YZ9OL8AEjosXQSyaMOkBvpNJC52rBDIL6Vl7eeCz2gSDB1cDi hduTnlPlLHu/Z0iNn3YuknNErPwSYLLgvnoONbZR3jxxhov1aCoLaA8Y4 cQlsqkm2XTtPjFJDRSLceT2WPrX8s7RgsBzEAhX8z+BnuaoqV8k5fgP6D 6frPjY310HiHXx/FqAu2VS/vB83W/oKrNj1eC59eJFfalxoBFPh5Qm5TZ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10768"; a="344469113" X-IronPort-AV: E=Sophos;i="6.01,199,1684825200"; d="scan'208";a="344469113" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 04:46:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10768"; a="866094078" X-IronPort-AV: E=Sophos;i="6.01,199,1684825200"; d="scan'208";a="866094078" Received: from eamonnob-mobl1.ger.corp.intel.com (HELO localhost.localdomain) ([10.213.237.202]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 04:46:27 -0700 From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: cgroups@vger.kernel.org, linux-kernel@vger.kernel.org, Tejun Heo , Johannes Weiner , Zefan Li , Dave Airlie , Daniel Vetter , Rob Clark , =?UTF-8?q?St=C3=A9phane=20Marchesin?= , "T . J . Mercier" , Kenny.Ho@amd.com, =?UTF-8?q?Christian=20K=C3=B6nig?= , Brian Welty , Tvrtko Ursulin , Aravind Iddamsetty Subject: [PATCH 04/17] drm/i915: Account ring buffer and context state storage Date: Wed, 12 Jul 2023 12:45:52 +0100 Message-Id: <20230712114605.519432-5-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230712114605.519432-1-tvrtko.ursulin@linux.intel.com> References: <20230712114605.519432-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Tvrtko Ursulin Account ring buffers and logical context space against the owning client memory usage stats. Signed-off-by: Tvrtko Ursulin Reviewed-by: Aravind Iddamsetty --- drivers/gpu/drm/i915/gt/intel_context.c | 14 ++++++++++++++ drivers/gpu/drm/i915/i915_drm_client.c | 10 ++++++++++ drivers/gpu/drm/i915/i915_drm_client.h | 9 +++++++++ 3 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915= /gt/intel_context.c index a53b26178f0a..a2f1245741bb 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.c +++ b/drivers/gpu/drm/i915/gt/intel_context.c @@ -6,6 +6,7 @@ #include "gem/i915_gem_context.h" #include "gem/i915_gem_pm.h" =20 +#include "i915_drm_client.h" #include "i915_drv.h" #include "i915_trace.h" =20 @@ -50,6 +51,7 @@ intel_context_create(struct intel_engine_cs *engine) =20 int intel_context_alloc_state(struct intel_context *ce) { + struct i915_gem_context *ctx; int err =3D 0; =20 if (mutex_lock_interruptible(&ce->pin_mutex)) @@ -66,6 +68,18 @@ int intel_context_alloc_state(struct intel_context *ce) goto unlock; =20 set_bit(CONTEXT_ALLOC_BIT, &ce->flags); + + rcu_read_lock(); + ctx =3D rcu_dereference(ce->gem_context); + if (ctx && !kref_get_unless_zero(&ctx->ref)) + ctx =3D NULL; + rcu_read_unlock(); + if (ctx) { + if (ctx->client) + i915_drm_client_add_context_objects(ctx->client, + ce); + i915_gem_context_put(ctx); + } } =20 unlock: diff --git a/drivers/gpu/drm/i915/i915_drm_client.c b/drivers/gpu/drm/i915/= i915_drm_client.c index 2e5e69edc0f9..a61356012df8 100644 --- a/drivers/gpu/drm/i915/i915_drm_client.c +++ b/drivers/gpu/drm/i915/i915_drm_client.c @@ -144,4 +144,14 @@ bool i915_drm_client_remove_object(struct drm_i915_gem= _object *obj) =20 return true; } + +void i915_drm_client_add_context_objects(struct i915_drm_client *client, + struct intel_context *ce) +{ + if (ce->state) + i915_drm_client_add_object(client, ce->state->obj); + + if (ce->ring !=3D ce->engine->legacy.ring && ce->ring->vma) + i915_drm_client_add_object(client, ce->ring->vma->obj); +} #endif diff --git a/drivers/gpu/drm/i915/i915_drm_client.h b/drivers/gpu/drm/i915/= i915_drm_client.h index 5f58fdf7dcb8..69cedfcd3d69 100644 --- a/drivers/gpu/drm/i915/i915_drm_client.h +++ b/drivers/gpu/drm/i915/i915_drm_client.h @@ -14,6 +14,7 @@ =20 #include "i915_file_private.h" #include "gem/i915_gem_object_types.h" +#include "gt/intel_context_types.h" =20 #define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_COMPUTE =20 @@ -70,6 +71,8 @@ void i915_drm_client_fdinfo(struct drm_printer *p, struct= drm_file *file); void i915_drm_client_add_object(struct i915_drm_client *client, struct drm_i915_gem_object *obj); bool i915_drm_client_remove_object(struct drm_i915_gem_object *obj); +void i915_drm_client_add_context_objects(struct i915_drm_client *client, + struct intel_context *ce); #else static inline void i915_drm_client_add_object(struct i915_drm_client *clie= nt, struct drm_i915_gem_object *obj) @@ -79,6 +82,12 @@ static inline void i915_drm_client_add_object(struct i91= 5_drm_client *client, static inline bool i915_drm_client_remove_object(struct drm_i915_gem_objec= t *obj) { } + +static inline void +i915_drm_client_add_context_objects(struct i915_drm_client *client, + struct intel_context *ce) +{ +} #endif =20 #endif /* !__I915_DRM_CLIENT_H__ */ --=20 2.39.2