From nobody Sat Feb 7 17:20:00 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB56AEB64DA for ; Wed, 12 Jul 2023 11:51:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233532AbjGLLvg (ORCPT ); Wed, 12 Jul 2023 07:51:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233401AbjGLLvK (ORCPT ); Wed, 12 Jul 2023 07:51:10 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7EBEE1FF9; Wed, 12 Jul 2023 04:49:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1689162579; x=1720698579; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=r3UFb8OqF06fv2F6gJ/iTXwHgvZZy1ZJFg6pTLkEphg=; b=mc1eAQfQ7zKxjhkpQeIS/jtQkQiPVMO9gi+Khr8ON+FzxI2NfdVXa9L4 UuRy8vCQ6qEeT6PM7X03Zrp9vCtxPj3Acdk69D0bIxY4EnYRQZValnuCc vdbqNk+LERQoMZkKfHhswb5V7sAvsAFXX1ijUvf7tamoRu8nhLBFSJc52 L4dSBxQdwialKdvgApfyD3SnrbNV2G7RKqYqqqNhnuULMQXvu4K7+nFDK zjyfjlqIe3VclX+IqjUHB5wfuU+sxzJibZvGnEX9UxWODjsDVrf8UaU88 KNvrjqWG1wvQQ9B1mBjdrwOiWar0zvKM3hjuFKROHnXC/NuijQe6f2R3B A==; X-IronPort-AV: E=McAfee;i="6600,9927,10768"; a="344469398" X-IronPort-AV: E=Sophos;i="6.01,199,1684825200"; d="scan'208";a="344469398" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 04:47:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10768"; a="866094175" X-IronPort-AV: E=Sophos;i="6.01,199,1684825200"; d="scan'208";a="866094175" Received: from eamonnob-mobl1.ger.corp.intel.com (HELO localhost.localdomain) ([10.213.237.202]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 04:47:09 -0700 From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: cgroups@vger.kernel.org, linux-kernel@vger.kernel.org, Tejun Heo , Johannes Weiner , Zefan Li , Dave Airlie , Daniel Vetter , Rob Clark , =?UTF-8?q?St=C3=A9phane=20Marchesin?= , "T . J . Mercier" , Kenny.Ho@amd.com, =?UTF-8?q?Christian=20K=C3=B6nig?= , Brian Welty , Tvrtko Ursulin , Eero Tamminen Subject: [PATCH 15/17] cgroup/drm: Expose GPU utilisation Date: Wed, 12 Jul 2023 12:46:03 +0100 Message-Id: <20230712114605.519432-16-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230712114605.519432-1-tvrtko.ursulin@linux.intel.com> References: <20230712114605.519432-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Tvrtko Ursulin To support container use cases where external orchestrators want to make deployment and migration decisions based on GPU load and capacity, we can expose the GPU load as seen by the controller in a new drm.active_us field. This field contains a monotonic cumulative time cgroup has spent executing GPU loads, as reported by the DRM drivers being used by group members. Signed-off-by: Tvrtko Ursulin Cc: Tejun Heo Cc: Eero Tamminen --- Documentation/admin-guide/cgroup-v2.rst | 3 +++ kernel/cgroup/drm.c | 26 ++++++++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-= guide/cgroup-v2.rst index da350858c59f..bbe986366f4a 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -2445,6 +2445,9 @@ will be respected. DRM scheduling soft limits interface files ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ =20 + drm.active_us + GPU time used by the group recursively including all child groups. + drm.weight Standard cgroup weight based control [1, 10000] used to configure the relative distributing of GPU time between the sibling groups. diff --git a/kernel/cgroup/drm.c b/kernel/cgroup/drm.c index b244e3d828cc..7c20d4ebc634 100644 --- a/kernel/cgroup/drm.c +++ b/kernel/cgroup/drm.c @@ -25,6 +25,8 @@ struct drm_cgroup_state { bool over; bool over_budget; =20 + u64 total_us; + u64 per_s_budget_us; u64 prev_active_us; u64 active_us; @@ -117,6 +119,20 @@ drmcs_write_weight(struct cgroup_subsys_state *css, st= ruct cftype *cftype, return 0; } =20 +static u64 +drmcs_read_total_us(struct cgroup_subsys_state *css, struct cftype *cft) +{ + struct drm_cgroup_state *drmcs =3D css_to_drmcs(css); + u64 val; + + /* Mutex being overkill unless arch cannot atomically read u64.. */ + mutex_lock(&drmcg_mutex); + val =3D drmcs->total_us; + mutex_unlock(&drmcg_mutex); + + return val; +} + static bool __start_scanning(unsigned int period_us) { struct drm_cgroup_state *root =3D &root_drmcs.drmcs; @@ -169,11 +185,14 @@ static bool __start_scanning(unsigned int period_us) parent =3D css_to_drmcs(node->parent); =20 active =3D drmcs_get_active_time_us(drmcs); - if (period_us && active > drmcs->prev_active_us) + if (period_us && active > drmcs->prev_active_us) { drmcs->active_us +=3D active - drmcs->prev_active_us; + drmcs->total_us +=3D drmcs->active_us; + } drmcs->prev_active_us =3D active; =20 parent->active_us +=3D drmcs->active_us; + parent->total_us +=3D drmcs->active_us; parent->sum_children_weights +=3D drmcs->weight; =20 css_put(node); @@ -551,6 +570,11 @@ struct cftype files[] =3D { .read_u64 =3D drmcs_read_weight, .write_u64 =3D drmcs_write_weight, }, + { + .name =3D "active_us", + .flags =3D CFTYPE_NOT_ON_ROOT, + .read_u64 =3D drmcs_read_total_us, + }, { } /* Zero entry terminates. */ }; =20 --=20 2.39.2