From nobody Tue Feb 10 11:14:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A076EB64D9 for ; Wed, 12 Jul 2023 10:35:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232292AbjGLKfe (ORCPT ); Wed, 12 Jul 2023 06:35:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50038 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232081AbjGLKf2 (ORCPT ); Wed, 12 Jul 2023 06:35:28 -0400 Received: from mail-pf1-x429.google.com (mail-pf1-x429.google.com [IPv6:2607:f8b0:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 420A91FCB for ; Wed, 12 Jul 2023 03:34:55 -0700 (PDT) Received: by mail-pf1-x429.google.com with SMTP id d2e1a72fcca58-666edfc50deso411551b3a.0 for ; Wed, 12 Jul 2023 03:34:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689158094; x=1691750094; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+PtBZ5U/uPeERQpI5byb7Cw2i1LitARzlq3AxNOTl7Y=; b=UcvrMOqD44a6oWGaldA9ZDq9L47XviiAcTCDMWN12cU3z+dz6lpKTrdWH1GyfO1DBM 3yzb3xBTiIvWHYOFCiY5ZhBJx5LCdnPtA6sBKusX0/2Dj7CkFDsPC/5eDYPK3J2qJgVs iLR3jASHUz73b/mDwxfsaavtVJZlufkYFEOuqXlC6iRO/Zqa9r47iHGN6v+aR3zdkrm3 4HMMibUVoZIK9agEKlwLA6t2yTlnanQsXcFnujgEE0cysgYQpq3EJgaLj4nNQI9eRh+5 W2A97em2isAvZK0PO633CDUhLgMBobwnMsBnr7/FplX/1Uw/XXIg+6BfJyDD0wvhQ48m I8KQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689158094; x=1691750094; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+PtBZ5U/uPeERQpI5byb7Cw2i1LitARzlq3AxNOTl7Y=; b=gzX/xaG+mvuM5niuLY7zUVDR5YzrGxub4pUVr1/+YVxT7d4dKZPR4SkQwif6Gs8YLb xfM3bTo3xIUgVFC/0CkeJ3UMhHLdf3odT7Q9gaUSpq96Ay/2M3pAm7wUtXS3/BqH5mLB kS3XWBBN5rW3QVac6iWuG/rW0OXSTxo3ZDtBIXUXTiOMsloWC/vc+iYBWdoSkWkKzthp uFKmP1ji+hr1beDD6LIzy5NjubJ9qPs6V6yEtlxuNn9DdibfBs989LkhGzHTqFH7JWIM lFr6DdmUQvqxbc6TrLQ5ZMl19Llf70xF/itDbzE7b4zKN4rmxGctbmlVWoBE0gN8+/OV MNHA== X-Gm-Message-State: ABy/qLY3Ljt1l09i+Tf0mHRRrKHqMLLlXs4UPT9ZtTuW5PsCjTpLlrq4 EB/GGvjU74/LziSmzglnhfGi X-Google-Smtp-Source: APBJJlHVqMInQEBerhca2pSVCTr7l7KhcpwqkHE7e5PLYOJuX+A2hzqOExPVGFQ0Mvhr8kyHqBz1fQ== X-Received: by 2002:a05:6a00:399f:b0:682:edbe:4cbd with SMTP id fi31-20020a056a00399f00b00682edbe4cbdmr1949033pfb.15.1689158094604; Wed, 12 Jul 2023 03:34:54 -0700 (PDT) Received: from localhost.localdomain ([117.207.27.131]) by smtp.gmail.com with ESMTPSA id k15-20020aa790cf000000b00666b3706be6sm3247860pfk.107.2023.07.12.03.34.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 03:34:54 -0700 (PDT) From: Manivannan Sadhasivam To: vireshk@kernel.org, nm@ti.com, sboyd@kernel.org, myungjoo.ham@samsung.com, kyungmin.park@samsung.com, cw00.choi@samsung.com, andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, quic_asutoshd@quicinc.com, quic_cang@quicinc.com, quic_nitirawa@quicinc.com, quic_narepall@quicinc.com, quic_bhaskarv@quicinc.com, quic_richardp@quicinc.com, quic_nguyenb@quicinc.com, quic_ziqichen@quicinc.com, bmasney@redhat.com, krzysztof.kozlowski@linaro.org, Manivannan Sadhasivam Subject: [PATCH 10/13] scsi: ufs: host: Add support for parsing OPP Date: Wed, 12 Jul 2023 16:02:06 +0530 Message-Id: <20230712103213.101770-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230712103213.101770-1-manivannan.sadhasivam@linaro.org> References: <20230712103213.101770-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" OPP framework can be used to scale the clocks along with other entities such as regulators, performance state etc... So let's add support for parsing OPP from devicetree. OPP support in devicetree is added through the "operating-points-v2" property which accepts the OPP table defining clock frequency, regulator voltage, power domain performance state etc... Since the UFS controller requires multiple clocks to be controlled for proper working, devm_pm_opp_set_config() has been used which supports scaling multiple clocks through custom ufshcd_opp_config_clks() callback. It should be noted that the OPP support is not compatible with the old "freq-table-hz" property. So only one can be used at a time even though the UFS core supports both. Co-developed-by: Krzysztof Kozlowski Signed-off-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufshcd-pltfrm.c | 116 +++++++++++++++++++++++++++++++ 1 file changed, 116 insertions(+) diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-plt= frm.c index 0b7430033047..068c22378c88 100644 --- a/drivers/ufs/host/ufshcd-pltfrm.c +++ b/drivers/ufs/host/ufshcd-pltfrm.c @@ -8,8 +8,10 @@ * Vinayak Holikatti */ =20 +#include #include #include +#include #include #include =20 @@ -17,6 +19,8 @@ #include "ufshcd-pltfrm.h" #include =20 +#include + #define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2 =20 static int ufshcd_parse_clock_info(struct ufs_hba *hba) @@ -205,6 +209,112 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba = *hba) } } =20 +static int ufshcd_opp_config_clks(struct device *dev, struct opp_table *op= p_table, + struct dev_pm_opp *opp, void *data, + bool scaling_down) +{ + struct ufs_hba *hba =3D dev_get_drvdata(dev); + struct list_head *head =3D &hba->clk_list_head; + struct ufs_clk_info *clki; + unsigned long freq; + u8 idx =3D 0; + int ret; + + list_for_each_entry(clki, head, list) { + if (!IS_ERR_OR_NULL(clki->clk)) { + freq =3D dev_pm_opp_get_freq_indexed(opp, idx++); + + /* Do not set rate for clocks having frequency as 0 */ + if (!freq) + continue; + + ret =3D clk_set_rate(clki->clk, freq); + if (ret) { + dev_err(dev, "%s: %s clk set rate(%ldHz) failed, %d\n", + __func__, clki->name, freq, ret); + return ret; + } + + trace_ufshcd_clk_scaling(dev_name(dev), + (scaling_down ? "scaled down" : "scaled up"), + clki->name, hba->clk_scaling.target_freq, freq); + } + } + + return 0; +} + +static int ufshcd_parse_operating_points(struct ufs_hba *hba) +{ + struct device *dev =3D hba->dev; + struct device_node *np =3D dev->of_node; + struct dev_pm_opp_config config =3D {}; + struct ufs_clk_info *clki; + const char **clk_names; + int cnt, i, ret; + + if (!of_find_property(np, "operating-points-v2", NULL)) + return 0; + + if (of_find_property(np, "freq-table-hz", NULL)) { + dev_err(dev, "%s: operating-points and freq-table-hz are incompatible\n", + __func__); + return -EINVAL; + } + + cnt =3D of_property_count_strings(np, "clock-names"); + if (cnt <=3D 0) { + dev_err(dev, "%s: Missing clock-names\n", __func__); + return -ENODEV; + } + + /* OPP expects clk_names to be NULL terminated */ + clk_names =3D devm_kcalloc(dev, cnt + 1, sizeof(*clk_names), GFP_KERNEL); + if (!clk_names) + return -ENOMEM; + + /* + * We still need to get reference to all clocks as the UFS core uses + * them separately. + */ + for (i =3D 0; i < cnt; i++) { + ret =3D of_property_read_string_index(np, "clock-names", i, + &clk_names[i]); + if (ret) + return ret; + + clki =3D devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL); + if (!clki) + return -ENOMEM; + + clki->name =3D devm_kstrdup(dev, clk_names[i], GFP_KERNEL); + if (!clki->name) + return -ENOMEM; + + if (!strcmp(clk_names[i], "ref_clk")) + clki->keep_link_active =3D true; + + list_add_tail(&clki->list, &hba->clk_list_head); + } + + config.clk_names =3D clk_names, + config.config_clks =3D ufshcd_opp_config_clks; + + ret =3D devm_pm_opp_set_config(dev, &config); + if (ret) + return ret; + + ret =3D devm_pm_opp_of_add_table(dev); + if (ret) { + dev_err(dev, "Failed to add OPP table: %d\n", ret); + return ret; + } + + hba->use_pm_opp =3D true; + + return 0; +} + /** * ufshcd_get_pwr_dev_param - get finally agreed attributes for * power mode change @@ -371,6 +481,12 @@ int ufshcd_pltfrm_init(struct platform_device *pdev, =20 ufshcd_init_lanes_per_dir(hba); =20 + err =3D ufshcd_parse_operating_points(hba); + if (err) { + dev_err(dev, "%s: OPP parse failed %d\n", __func__, err); + goto dealloc_host; + } + err =3D ufshcd_init(hba, mmio_base, irq); if (err) { dev_err(dev, "Initialization failed\n"); --=20 2.25.1