From nobody Mon Feb 9 19:38:04 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9097FC04FDF for ; Tue, 11 Jul 2023 15:09:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231308AbjGKPJB (ORCPT ); Tue, 11 Jul 2023 11:09:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230239AbjGKPIe (ORCPT ); Tue, 11 Jul 2023 11:08:34 -0400 Received: from hel-mailgw-01.vaisala.com (hel-mailgw-01.vaisala.com [193.143.230.17]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FCC010A; Tue, 11 Jul 2023 08:08:33 -0700 (PDT) Received: from HEL-SMTP.corp.vaisala.com (HEL-SMTP.corp.vaisala.com [172.24.1.225]) by hel-mailgw-01.vaisala.com (Postfix) with ESMTP id 1343F601F065; Tue, 11 Jul 2023 18:08:32 +0300 (EEST) Received: from yocto-vm.localdomain ([172.24.253.44]) by HEL-SMTP.corp.vaisala.com over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Tue, 11 Jul 2023 18:08:31 +0300 From: =?UTF-8?q?Vesa=20J=C3=A4=C3=A4skel=C3=A4inen?= Cc: vesa.jaaskelainen@vaisala.com, Wei Fang , Shenwei Wang , Clark Wang , NXP Linux Team , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] dt-bindings: net: fsl,fec: Add TX clock controls Date: Tue, 11 Jul 2023 18:08:04 +0300 Message-Id: <20230711150808.18714-2-vesa.jaaskelainen@vaisala.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230711150808.18714-1-vesa.jaaskelainen@vaisala.com> References: <20230711150808.18714-1-vesa.jaaskelainen@vaisala.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 11 Jul 2023 15:08:31.0713 (UTC) FILETIME=[8E2C8D10:01D9B409] To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With fsl,fec-tx-clock-output one can control if TX clock is routed outside of the chip. With fsl,fec-tx-clk-as-ref-clock one can select if external TX clock is as reference clock. Signed-off-by: Vesa J=C3=A4=C3=A4skel=C3=A4inen --- .../devicetree/bindings/net/fsl,fec.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documenta= tion/devicetree/bindings/net/fsl,fec.yaml index b494e009326e..c09105878bc6 100644 --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml @@ -166,6 +166,21 @@ properties: description: If present, indicates that the hardware supports waking up via magic= packet. =20 + fsl,fec-tx-clock-output: + $ref: /schemas/types.yaml#/definitions/flag + description: + If present, ENETx_TX_CLK output driver is enabled. + If not present, ENETx_TX_CLK output driver is disabled. + + fsl,fec-tx-clk-as-ref-clock: + $ref: /schemas/types.yaml#/definitions/flag + description: + If present, gets ENETx TX reference clk from the ENETx_TX_CLK pin. In + this use case, an external OSC provides the clock for both the exter= nal + PHY and the internal controller. + If not present, ENETx TX reference clock is driven by ref_enetpllx. = This + clock is also output to pins via the IOMUX.ENET_REF_CLKx function. + fsl,err006687-workaround-present: $ref: /schemas/types.yaml#/definitions/flag description: --=20 2.34.1