From nobody Fri Sep 20 13:22:37 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AB69C001B0 for ; Mon, 10 Jul 2023 02:58:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230161AbjGJC6t (ORCPT ); Sun, 9 Jul 2023 22:58:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229539AbjGJC6q (ORCPT ); Sun, 9 Jul 2023 22:58:46 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F24DF1; Sun, 9 Jul 2023 19:58:42 -0700 (PDT) X-UUID: aa8857e41ecd11ee9cb5633481061a41-20230710 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=fE00NnLQgBtiRlH8pNZTvBFtXrfctUjKvaoZn2+eQSU=; b=pHqxHFmYTg8UZscqq0xhoQCm4uOGIF2Q4s7idknb0Jl+3tpgAkLCYnGYyed0HVOo6Ae4jZ0NElMqM0kjLXrhbo9uGIc/TKRh9uAkd8O7kjpZit/+T0p+O7LVGkDKKEecVGDCQjMy/dFmzaHZ3lJ3WOAgHDEgZAtHAbbMyIirvNk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.27,REQID:a0074fd3-ad69-4618-9acb-a5fbd03a7e1e,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.27,REQID:a0074fd3-ad69-4618-9acb-a5fbd03a7e1e,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:01c9525,CLOUDID:bc8eceda-b4fa-43c8-9c3e-0d3fabd03ec0,B ulkID:230710105839Q2KVK0SQ,BulkQuantity:0,Recheck:0,SF:17|19|48|38|29|28,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_SDM,TF_CID_SPAM_ASC,TF_CID_SPAM_FAS, TF_CID_SPAM_FSD X-UUID: aa8857e41ecd11ee9cb5633481061a41-20230710 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1862014506; Mon, 10 Jul 2023 10:58:37 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Mon, 10 Jul 2023 10:58:35 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Mon, 10 Jul 2023 10:58:35 +0800 From: Allen-KH Cheng To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Conor Dooley CC: , , , , , , Allen-KH Cheng Subject: [PATCH] arm64: dts: mediatek: mt8192: Add SVS node Date: Mon, 10 Jul 2023 10:58:34 +0800 Message-ID: <20230710025834.20513-1-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add MediaTek Smart Voltage Scaling (SVS) node for MT8192 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 5e94cb4aeb44..0131cfefc0a1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -790,6 +790,18 @@ status =3D "disabled"; }; =20 + svs: svs@1100b000 { + compatible =3D "mediatek,mt8192-svs"; + reg =3D <0 0x1100b000 0 0x1000>; + interrupts =3D ; + clocks =3D <&infracfg CLK_INFRA_THERM>; + clock-names =3D "main"; + nvmem-cells =3D <&svs_calibration>, <&lvts_e_data1>; + nvmem-cell-names =3D "svs-calibration-data", "t-calibration-data"; + resets =3D <&infracfg MT8192_INFRA_RST3_THERM_CTRL_PTP_SWRST>; + reset-names =3D "svs_rst"; + }; + pwm0: pwm@1100e000 { compatible =3D "mediatek,mt8183-disp-pwm"; reg =3D <0 0x1100e000 0 0x1000>; --=20 2.18.0