From nobody Tue Feb 10 07:21:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04954EB64DC for ; Mon, 3 Jul 2023 15:27:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231157AbjGCP1r (ORCPT ); Mon, 3 Jul 2023 11:27:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57902 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230484AbjGCP1o (ORCPT ); Mon, 3 Jul 2023 11:27:44 -0400 X-Greylist: delayed 62 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Mon, 03 Jul 2023 08:27:42 PDT Received: from mta-65-225.siemens.flowmailer.net (mta-65-225.siemens.flowmailer.net [185.136.65.225]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54B1BE66 for ; Mon, 3 Jul 2023 08:27:42 -0700 (PDT) Received: by mta-65-225.siemens.flowmailer.net with ESMTPSA id 20230703152638bd31abf74635af848a for ; Mon, 03 Jul 2023 17:26:38 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=michael.haener@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=a5E01gIUkA26aGt9X7j9VPDWiRV+QjB9oiTC8u4s6Ao=; b=oJ0migxhMbedawTB702z3Van3Bb03KWJujtAQQ3pSsUzZM0Pva42oLJCKExrPh5WCyT5nK C3y03eT3uLgadcXrbfAoJPJ9+5IZryo/1lWhzyFVFKRmD9IZfftJR6VTAiL1CDs77NQ+p+UH mK2iTQvfgf+2hjX3SxAlu7c7VTrpE=; From: "M. Haener" To: netdev@vger.kernel.org Cc: Michael Haener , linux-kernel@vger.kernel.org, Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , Alexander Sverdlin Subject: [PATCH 2/3] net: dsa: mv88e632x: Refactor serdes write Date: Mon, 3 Jul 2023 17:26:08 +0200 Message-ID: <20230703152611.420381-3-michael.haener@siemens.com> In-Reply-To: <20230703152611.420381-1-michael.haener@siemens.com> References: <20230703152611.420381-1-michael.haener@siemens.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-664519:519-21489:flowmailer Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Michael Haener To avoid code duplication, the serdes write functions have been combined. Signed-off-by: Michael Haener --- drivers/net/dsa/mv88e6xxx/chip.c | 13 ++++++++ drivers/net/dsa/mv88e6xxx/chip.h | 2 ++ drivers/net/dsa/mv88e6xxx/serdes.c | 52 +++++++++++++++--------------- drivers/net/dsa/mv88e6xxx/serdes.h | 13 ++++++++ 4 files changed, 54 insertions(+), 26 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/c= hip.c index ddbc2be746bb..54e99cfb17c1 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -4431,6 +4431,7 @@ static const struct mv88e6xxx_ops mv88e6141_ops =3D { .serdes_get_regs_len =3D mv88e6390_serdes_get_regs_len, .serdes_get_regs =3D mv88e6390_serdes_get_regs, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, .phylink_get_caps =3D mv88e6341_phylink_get_caps, }; =20 @@ -4619,6 +4620,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops =3D { .serdes_pcs_link_up =3D mv88e6352_serdes_pcs_link_up, .serdes_power =3D mv88e6352_serdes_power, .serdes_read =3D mv88e6352_serdes_read, + .serdes_write =3D mv88e6352_serdes_write, .serdes_get_regs_len =3D mv88e6352_serdes_get_regs_len, .serdes_get_regs =3D mv88e6352_serdes_get_regs, .gpio_ops =3D &mv88e6352_gpio_ops, @@ -4725,6 +4727,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops =3D { .serdes_pcs_link_up =3D mv88e6352_serdes_pcs_link_up, .serdes_power =3D mv88e6352_serdes_power, .serdes_read =3D mv88e6352_serdes_read, + .serdes_write =3D mv88e6352_serdes_write, .serdes_irq_mapping =3D mv88e6352_serdes_irq_mapping, .serdes_irq_enable =3D mv88e6352_serdes_irq_enable, .serdes_irq_status =3D mv88e6352_serdes_irq_status, @@ -4837,6 +4840,7 @@ static const struct mv88e6xxx_ops mv88e6190_ops =3D { .serdes_get_regs_len =3D mv88e6390_serdes_get_regs_len, .serdes_get_regs =3D mv88e6390_serdes_get_regs, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, .gpio_ops =3D &mv88e6352_gpio_ops, .phylink_get_caps =3D mv88e6390_phylink_get_caps, }; @@ -4903,6 +4907,7 @@ static const struct mv88e6xxx_ops mv88e6190x_ops =3D { .serdes_get_regs_len =3D mv88e6390_serdes_get_regs_len, .serdes_get_regs =3D mv88e6390_serdes_get_regs, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, .gpio_ops =3D &mv88e6352_gpio_ops, .phylink_get_caps =3D mv88e6390x_phylink_get_caps, }; @@ -4967,6 +4972,7 @@ static const struct mv88e6xxx_ops mv88e6191_ops =3D { .serdes_get_regs_len =3D mv88e6390_serdes_get_regs_len, .serdes_get_regs =3D mv88e6390_serdes_get_regs, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, .avb_ops =3D &mv88e6390_avb_ops, .ptp_ops =3D &mv88e6352_ptp_ops, .phylink_get_caps =3D mv88e6390_phylink_get_caps, @@ -5026,6 +5032,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops =3D { .serdes_pcs_link_up =3D mv88e6352_serdes_pcs_link_up, .serdes_power =3D mv88e6352_serdes_power, .serdes_read =3D mv88e6352_serdes_read, + .serdes_write =3D mv88e6352_serdes_write, .serdes_irq_mapping =3D mv88e6352_serdes_irq_mapping, .serdes_irq_enable =3D mv88e6352_serdes_irq_enable, .serdes_irq_status =3D mv88e6352_serdes_irq_status, @@ -5142,6 +5149,7 @@ static const struct mv88e6xxx_ops mv88e6290_ops =3D { .serdes_get_regs_len =3D mv88e6390_serdes_get_regs_len, .serdes_get_regs =3D mv88e6390_serdes_get_regs, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, .gpio_ops =3D &mv88e6352_gpio_ops, .avb_ops =3D &mv88e6390_avb_ops, .ptp_ops =3D &mv88e6390_ptp_ops, @@ -5309,6 +5317,7 @@ static const struct mv88e6xxx_ops mv88e6341_ops =3D { .serdes_get_regs_len =3D mv88e6390_serdes_get_regs_len, .serdes_get_regs =3D mv88e6390_serdes_get_regs, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, .phylink_get_caps =3D mv88e6341_phylink_get_caps, }; =20 @@ -5460,6 +5469,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops =3D { .serdes_pcs_link_up =3D mv88e6352_serdes_pcs_link_up, .serdes_power =3D mv88e6352_serdes_power, .serdes_read =3D mv88e6352_serdes_read, + .serdes_write =3D mv88e6352_serdes_write, .serdes_irq_mapping =3D mv88e6352_serdes_irq_mapping, .serdes_irq_enable =3D mv88e6352_serdes_irq_enable, .serdes_irq_status =3D mv88e6352_serdes_irq_status, @@ -5542,6 +5552,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops =3D { .serdes_get_regs_len =3D mv88e6390_serdes_get_regs_len, .serdes_get_regs =3D mv88e6390_serdes_get_regs, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, .phylink_get_caps =3D mv88e6390_phylink_get_caps, }; =20 @@ -5608,6 +5619,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops =3D { .serdes_get_regs_len =3D mv88e6390_serdes_get_regs_len, .serdes_get_regs =3D mv88e6390_serdes_get_regs, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, .gpio_ops =3D &mv88e6352_gpio_ops, .avb_ops =3D &mv88e6390_avb_ops, .ptp_ops =3D &mv88e6390_ptp_ops, @@ -5676,6 +5688,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops =3D { .serdes_irq_enable =3D mv88e6393x_serdes_irq_enable, .serdes_irq_status =3D mv88e6393x_serdes_irq_status, .serdes_read =3D mv88e6390_serdes_read, + .serdes_write =3D mv88e6390_serdes_write, /* TODO: serdes stats */ .gpio_ops =3D &mv88e6352_gpio_ops, .avb_ops =3D &mv88e6390_avb_ops, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/c= hip.h index 17f89951557d..d78daa2bfad4 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -609,6 +609,8 @@ struct mv88e6xxx_ops { int lane, int speed, int duplex); int (*serdes_read)(struct mv88e6xxx_chip *chip, int lane, int device, int reg, u16 *val); + int (*serdes_write)(struct mv88e6xxx_chip *chip, int lane, int device, + int reg, u16 val); =20 /* SERDES interrupt handling */ unsigned int (*serdes_irq_mapping)(struct mv88e6xxx_chip *chip, diff --git a/drivers/net/dsa/mv88e6xxx/serdes.c b/drivers/net/dsa/mv88e6xxx= /serdes.c index ab3471887b41..7b64e30600b9 100644 --- a/drivers/net/dsa/mv88e6xxx/serdes.c +++ b/drivers/net/dsa/mv88e6xxx/serdes.c @@ -25,8 +25,8 @@ int mv88e6352_serdes_read(struct mv88e6xxx_chip *chip, in= t lane, reg, val); } =20 -static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg, - u16 val) +int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int lane, int devi= ce, + int reg, u16 val) { return mv88e6xxx_phy_page_write(chip, MV88E6352_ADDR_SERDES, MV88E6352_SERDES_PAGE_FIBER, @@ -39,8 +39,8 @@ int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip, return mv88e6xxx_phy_read_c45(chip, lane, device, reg, val); } =20 -static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip, - int lane, int device, int reg, u16 val) +int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip, + int lane, int device, int reg, u16 val) { return mv88e6xxx_phy_write_c45(chip, lane, device, reg, val); } @@ -133,7 +133,7 @@ int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip,= int port, int lane, new_val =3D val | BMCR_PDOWN; =20 if (val !=3D new_val) - err =3D mv88e6352_serdes_write(chip, MII_BMCR, new_val); + err =3D mv88e6xxx_serdes_write(chip, lane, 0, MII_BMCR, new_val); =20 return err; } @@ -167,7 +167,7 @@ int mv88e6352_serdes_pcs_config(struct mv88e6xxx_chip *= chip, int port, =20 changed =3D val !=3D adv; if (changed) { - err =3D mv88e6352_serdes_write(chip, MII_ADVERTISE, adv); + err =3D mv88e6xxx_serdes_write(chip, lane, 0, MII_ADVERTISE, adv); if (err) return err; } @@ -184,7 +184,7 @@ int mv88e6352_serdes_pcs_config(struct mv88e6xxx_chip *= chip, int port, if (bmcr =3D=3D val) return changed; =20 - return mv88e6352_serdes_write(chip, MII_BMCR, bmcr); + return mv88e6xxx_serdes_write(chip, lane, 0, MII_BMCR, bmcr); } =20 int mv88e6352_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, int port, @@ -224,7 +224,7 @@ int mv88e6352_serdes_pcs_an_restart(struct mv88e6xxx_ch= ip *chip, int port, if (err) return err; =20 - return mv88e6352_serdes_write(chip, MII_BMCR, bmcr | BMCR_ANRESTART); + return mv88e6xxx_serdes_write(chip, lane, 0, MII_BMCR, bmcr | BMCR_ANREST= ART); } =20 int mv88e6352_serdes_pcs_link_up(struct mv88e6xxx_chip *chip, int port, @@ -255,7 +255,7 @@ int mv88e6352_serdes_pcs_link_up(struct mv88e6xxx_chip = *chip, int port, if (bmcr =3D=3D val) return 0; =20 - return mv88e6352_serdes_write(chip, MII_BMCR, bmcr); + return mv88e6xxx_serdes_write(chip, lane, 0, MII_BMCR, bmcr); } =20 int mv88e6352_serdes_get_lane(struct mv88e6xxx_chip *chip, int port) @@ -409,7 +409,7 @@ int mv88e6352_serdes_irq_enable(struct mv88e6xxx_chip *= chip, int port, int lane, if (enable) val |=3D MV88E6352_SERDES_INT_LINK_CHANGE; =20 - return mv88e6352_serdes_write(chip, MV88E6352_SERDES_INT_ENABLE, val); + return mv88e6xxx_serdes_write(chip, lane, 0, MV88E6352_SERDES_INT_ENABLE,= val); } =20 unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int= port) @@ -717,7 +717,7 @@ static int mv88e6390_serdes_power_10g(struct mv88e6xxx_= chip *chip, int lane, new_val =3D val | MDIO_CTRL1_LPOWER; =20 if (val !=3D new_val) - err =3D mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + err =3D mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6390_10G_CTRL1, new_val); =20 return err; @@ -741,7 +741,7 @@ static int mv88e6390_serdes_power_sgmii(struct mv88e6xx= x_chip *chip, int lane, new_val =3D val | BMCR_PDOWN; =20 if (val !=3D new_val) - err =3D mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + err =3D mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6390_SGMII_BMCR, new_val); =20 return err; @@ -831,7 +831,7 @@ static int mv88e6390_serdes_enable_checker(struct mv88e= 6xxx_chip *chip, int lane return err; =20 reg |=3D MV88E6390_PG_CONTROL_ENABLE_PC; - return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + return mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6390_PG_CONTROL, reg); } =20 @@ -897,7 +897,7 @@ int mv88e6390_serdes_pcs_config(struct mv88e6xxx_chip *= chip, int port, =20 changed =3D val !=3D adv; if (changed) { - err =3D mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + err =3D mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6390_SGMII_ADVERTISE, adv); if (err) return err; @@ -917,7 +917,7 @@ int mv88e6390_serdes_pcs_config(struct mv88e6xxx_chip *= chip, int port, if (bmcr =3D=3D val) return changed; =20 - return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + return mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6390_SGMII_BMCR, bmcr); } =20 @@ -1082,7 +1082,7 @@ int mv88e6390_serdes_pcs_an_restart(struct mv88e6xxx_= chip *chip, int port, if (err) return err; =20 - return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + return mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6390_SGMII_BMCR, bmcr | BMCR_ANRESTART); } @@ -1117,7 +1117,7 @@ int mv88e6390_serdes_pcs_link_up(struct mv88e6xxx_chi= p *chip, int port, if (bmcr =3D=3D val) return 0; =20 - return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + return mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6390_SGMII_BMCR, bmcr); } =20 @@ -1164,7 +1164,7 @@ static int mv88e6390_serdes_irq_enable_sgmii(struct m= v88e6xxx_chip *chip, val |=3D MV88E6390_SGMII_INT_LINK_DOWN | MV88E6390_SGMII_INT_LINK_UP; =20 - return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + return mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6390_SGMII_INT_ENABLE, val); } =20 @@ -1202,7 +1202,7 @@ static int mv88e6393x_serdes_irq_enable_10g(struct mv= 88e6xxx_chip *chip, if (enable) val |=3D MV88E6393X_10G_INT_LINK_CHANGE; =20 - return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + return mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6393X_10G_INT_ENABLE, val); } =20 @@ -1396,7 +1396,7 @@ int mv88e6352_serdes_set_tx_amplitude(struct mv88e6xx= x_chip *chip, int port, ctrl &=3D ~MV88E6352_SERDES_OUT_AMP_MASK; ctrl |=3D reg; =20 - return mv88e6352_serdes_write(chip, MV88E6352_SERDES_SPEC_CTRL2, ctrl); + return mv88e6xxx_serdes_write(chip, lane, 0, MV88E6352_SERDES_SPEC_CTRL2,= ctrl); } =20 static int mv88e6393x_serdes_power_lane(struct mv88e6xxx_chip *chip, int l= ane, @@ -1417,7 +1417,7 @@ static int mv88e6393x_serdes_power_lane(struct mv88e6= xxx_chip *chip, int lane, reg |=3D MV88E6393X_SERDES_CTRL1_TX_PDOWN | MV88E6393X_SERDES_CTRL1_RX_PDOWN; =20 - return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + return mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6393X_SERDES_CTRL1, reg); } =20 @@ -1442,7 +1442,7 @@ static int mv88e6393x_serdes_erratum_4_6(struct mv88e= 6xxx_chip *chip, int lane) reg &=3D ~MV88E6393X_SERDES_POC_PDOWN; reg |=3D MV88E6393X_SERDES_POC_RESET; =20 - err =3D mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + err =3D mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6393X_SERDES_POC, reg); if (err) return err; @@ -1499,7 +1499,7 @@ static int mv88e6393x_serdes_erratum_4_8(struct mv88e= 6xxx_chip *chip, int lane) else reg &=3D ~MV88E6393X_ERRATA_4_8_BIT; =20 - return mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + return mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6393X_ERRATA_4_8_REG, reg); } =20 @@ -1539,7 +1539,7 @@ static int mv88e6393x_serdes_erratum_5_2(struct mv88e= 6xxx_chip *chip, int lane, reg &=3D ~fixes[i].mask; reg |=3D fixes[i].val; =20 - err =3D mv88e6390_serdes_write(chip, lane, fixes[i].dev, + err =3D mv88e6xxx_serdes_write(chip, lane, fixes[i].dev, fixes[i].reg, reg); if (err) return err; @@ -1584,12 +1584,12 @@ static int mv88e6393x_serdes_fix_2500basex_an(struc= t mv88e6xxx_chip *chip, reg |=3D MV88E6393X_SERDES_POC_PCS_2500BASEX; reg |=3D MV88E6393X_SERDES_POC_RESET; =20 - err =3D mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS, + err =3D mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_PHYXS, MV88E6393X_SERDES_POC, reg); if (err) return err; =20 - err =3D mv88e6390_serdes_write(chip, lane, MDIO_MMD_VEND1, 0x8000, 0x58); + err =3D mv88e6xxx_serdes_write(chip, lane, MDIO_MMD_VEND1, 0x8000, 0x58); if (err) return err; =20 diff --git a/drivers/net/dsa/mv88e6xxx/serdes.h b/drivers/net/dsa/mv88e6xxx= /serdes.h index 47ddd9d26c92..e71cddf63eba 100644 --- a/drivers/net/dsa/mv88e6xxx/serdes.h +++ b/drivers/net/dsa/mv88e6xxx/serdes.h @@ -141,6 +141,10 @@ int mv88e6352_serdes_read(struct mv88e6xxx_chip *chip,= int lane, int device, int reg, u16 *val); int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip, int lane, int devic= e, int reg, u16 *val); +int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int lane, int devi= ce, + int reg, u16 val); +int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip, int lane, int devi= ce, + int reg, u16 val); unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port); unsigned int mv88e6390_serdes_irq_mapping(struct mv88e6xxx_chip *chip, @@ -226,6 +230,15 @@ static inline int mv88e6xxx_serdes_read(struct mv88e6x= xx_chip *chip, int lane, return chip->info->ops->serdes_read(chip, lane, device, reg, val); } =20 +static inline int mv88e6xxx_serdes_write(struct mv88e6xxx_chip *chip, int = lane, + int device, int reg, u16 val) +{ + if (!chip->info->ops->serdes_write) + return -EOPNOTSUPP; + + return chip->info->ops->serdes_write(chip, lane, device, reg, val); +} + static inline unsigned int mv88e6xxx_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port) { --=20 2.41.0