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([217.169.179.6]) by smtp.gmail.com with ESMTPSA id z9-20020a17090655c900b00992d0de8762sm3927359ejp.216.2023.07.02.11.53.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jul 2023 11:53:19 -0700 (PDT) From: Krzysztof Kozlowski To: Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH] arm64: dts: arm: minor whitespace cleanup around '=' Date: Sun, 2 Jul 2023 20:53:15 +0200 Message-Id: <20230702185315.44584-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The DTS code coding style expects exactly one space before and after '=3D' sign. Signed-off-by: Krzysztof Kozlowski Acked-by: Sudeep Holla --- arch/arm64/boot/dts/arm/corstone1000.dtsi | 20 ++++++++----------- .../boot/dts/arm/foundation-v8-gicv3.dtsi | 10 +++++----- 2 files changed, 13 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dt= s/arm/corstone1000.dtsi index 21f1f952e985..34bc336ba8d1 100644 --- a/arch/arm64/boot/dts/arm/corstone1000.dtsi +++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi @@ -43,10 +43,10 @@ gic: interrupt-controller@1c000000 { #interrupt-cells =3D <3>; #address-cells =3D <0>; interrupt-controller; - reg =3D <0x1c010000 0x1000>, - <0x1c02f000 0x2000>, - <0x1c04f000 0x1000>, - <0x1c06f000 0x2000>; + reg =3D <0x1c010000 0x1000>, + <0x1c02f000 0x2000>, + <0x1c04f000 0x1000>, + <0x1c06f000 0x2000>; interrupts =3D ; }; @@ -77,14 +77,10 @@ smbclk: refclk24mhzx2 { =20 timer { compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; + interrupts =3D , + , + , + ; }; =20 uartclk: uartclk { diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi b/arch/arm64/= boot/dts/arm/foundation-v8-gicv3.dtsi index e4a3c7dbcc20..17fba3bc99cd 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi @@ -12,11 +12,11 @@ gic: interrupt-controller@2f000000 { #size-cells =3D <1>; ranges =3D <0x0 0x0 0x2f000000 0x100000>; interrupt-controller; - reg =3D <0x0 0x2f000000 0x0 0x10000>, - <0x0 0x2f100000 0x0 0x200000>, - <0x0 0x2c000000 0x0 0x2000>, - <0x0 0x2c010000 0x0 0x2000>, - <0x0 0x2c02f000 0x0 0x2000>; + reg =3D <0x0 0x2f000000 0x0 0x10000>, + <0x0 0x2f100000 0x0 0x200000>, + <0x0 0x2c000000 0x0 0x2000>, + <0x0 0x2c010000 0x0 0x2000>, + <0x0 0x2c02f000 0x0 0x2000>; interrupts =3D ; =20 its: msi-controller@2f020000 { --=20 2.34.1