From nobody Sun Feb 8 01:52:04 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 244A0EB64D7 for ; Fri, 30 Jun 2023 12:11:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232927AbjF3MLt (ORCPT ); Fri, 30 Jun 2023 08:11:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232805AbjF3MLU (ORCPT ); Fri, 30 Jun 2023 08:11:20 -0400 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 415F34208; Fri, 30 Jun 2023 05:11:11 -0700 (PDT) Received: from droid10-sz.amlogic.com (10.28.11.69) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Fri, 30 Jun 2023 20:11:08 +0800 From: zelong dong To: , , , Rob Herring , CC: , , , , , , Zelong Dong Subject: [PATCH 1/3] dt-bindings: reset: Add compatible and DT bindings for Meson-C3 Reset Controller Date: Fri, 30 Jun 2023 20:10:57 +0800 Message-ID: <20230630121059.28748-2-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230630121059.28748-1-zelong.dong@amlogic.com> References: <20230630121059.28748-1-zelong.dong@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.28.11.69] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Zelong Dong Add new compatible and DT bindings for Amlogic's Meson-C3 Reset Controller Change-Id: Ie8941818bde5b736689e43367f66827c5bc0449e Signed-off-by: Zelong Dong --- .../bindings/reset/amlogic,meson-reset.yaml | 1 + .../reset/amlogic,meson-c3-reset.h | 119 ++++++++++++++++++ 2 files changed, 120 insertions(+) create mode 100644 include/dt-bindings/reset/amlogic,meson-c3-reset.h diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.ya= ml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml index d3fdee89d4f8..cf1da9f7bc51 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -18,6 +18,7 @@ properties: - amlogic,meson-axg-reset # Reset Controller on AXG and compatible S= oCs - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs + - amlogic,meson-c3-reset # Reset Controller on C3 and compatible SoCs =20 reg: maxItems: 1 diff --git a/include/dt-bindings/reset/amlogic,meson-c3-reset.h b/include/d= t-bindings/reset/amlogic,meson-c3-reset.h new file mode 100644 index 000000000000..24b39d60b2f7 --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-c3-reset.h @@ -0,0 +1,119 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2023 Amlogic, Inc. All rights reserved. + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_C3_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_C3_RESET_H + +/* RESET0 */ +/* 0-3 */ +#define RESET_USBCTRL 4 +/* 5-7 */ +#define RESET_USBPHY20 8 +/* 9 */ +#define RESET_USB2DRD 10 +#define RESET_MIPI_DSI_HOST 11 +#define RESET_MIPI_DSI_PHY 12 +/* 13-20 */ +#define RESET_GE2D 21 +#define RESET_DWAP 22 +/* 23-31 */ + +/* RESET1 */ +#define RESET_AUDIO 32 +/* 33-34 */ +#define RESET_DDRAPB 35 +#define RESET_DDR 36 +#define RESET_DOS_CAPB3 37 +#define RESET_DOS 38 +/* 39-46 */ +#define RESET_NNA 47 +#define RESET_ETHERNET 48 +#define RESET_ISP 49 +#define RESET_VC9000E_APB 50 +#define RESET_VC9000E_A 51 +/* 52 */ +#define RESET_VC9000E_CORE 53 +/* 54-63 */ + +/* RESET2 */ +#define RESET_ABUS_ARB 64 +#define RESET_IRCTRL 65 +/* 66 */ +#define RESET_TEMP_PII 67 +/* 68-72 */ +#define RESET_SPICC_0 73 +#define RESET_SPICC_1 74 +#define RESET_RSA 75 + +/* 76-79 */ +#define RESET_MSR_CLK 80 +#define RESET_SPIFC 81 +#define RESET_SAR_ADC 82 +/* 83-87 */ +#define RESET_ACODEC 88 +/* 89-90 */ +#define RESET_WATCHDOG 91 +/* 92-95 */ + +/* RESET3 */ +#define RESET_ISP_NIC_GPV 96 +#define RESET_ISP_NIC_MAIN 97 +#define RESET_ISP_NIC_VCLK 98 +#define RESET_ISP_NIC_VOUT 99 +#define RESET_ISP_NIC_ALL 100 +#define RESET_VOUT 101 +#define RESET_VOUT_VENC 102 +/* 103 */ +#define RESET_CVE_NIC_GPV 104 +#define RESET_CVE_NIC_MAIN 105 +#define RESET_CVE_NIC_GE2D 106 +#define RESET_CVE_NIC_DW 106 +#define RESET_CVE_NIC_CVE 108 +#define RESET_CVE_NIC_ALL 109 +#define RESET_CVE 110 +/* 112-127 */ + +/* RESET4 */ +#define RESET_RTC 128 +#define RESET_PWM_AB 129 +#define RESET_PWM_CD 130 +#define RESET_PWM_EF 131 +#define RESET_PWM_GH 132 +#define RESET_PWM_IJ 133 +#define RESET_PWM_KL 134 +#define RESET_PWM_MN 135 +/* 136-137 */ +#define RESET_UART_A 138 +#define RESET_UART_B 139 +#define RESET_UART_C 140 +#define RESET_UART_D 141 +#define RESET_UART_E 142 +#define RESET_UART_F 143 +#define RESET_I2C_S_A 144 +#define RESET_I2C_M_A 145 +#define RESET_I2C_M_B 146 +#define RESET_I2C_M_C 147 +#define RESET_I2C_M_D 148 +/* 149-151 */ +#define RESET_SD_EMMC_A 152 +#define RESET_SD_EMMC_B 153 +#define RESET_SD_EMMC_C 154 + +/* RESET5 */ +/* 160-172 */ +#define RESET_BRG_NIC_NNA 173 +#define RESET_BRG_MUX_NIC_MAIN 174 +#define RESET_BRG_AO_NIC_ALL 175 +/* 176-183 */ +#define RESET_BRG_NIC_VAPB 184 +#define RESET_BRG_NIC_SDIO_B 185 +#define RESET_BRG_NIC_SDIO_A 186 +#define RESET_BRG_NIC_EMMC 187 +#define RESET_BRG_NIC_DSU 188 +#define RESET_BRG_NIC_SYSCLK 189 +#define RESET_BRG_NIC_MAIN 190 +#define RESET_BRG_NIC_ALL 191 + +#endif --=20 2.35.1 From nobody Sun Feb 8 01:52:04 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 159C1EB64DA for ; Fri, 30 Jun 2023 12:12:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232402AbjF3MMb (ORCPT ); Fri, 30 Jun 2023 08:12:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233048AbjF3MMK (ORCPT ); Fri, 30 Jun 2023 08:12:10 -0400 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAFD24209; Fri, 30 Jun 2023 05:11:12 -0700 (PDT) Received: from droid10-sz.amlogic.com (10.28.11.69) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Fri, 30 Jun 2023 20:11:09 +0800 From: zelong dong To: , , , Rob Herring , CC: , , , , , , Zelong Dong Subject: [PATCH 2/3] reset: reset-meson: add support for the Meson-C3 SoC Reset Controller Date: Fri, 30 Jun 2023 20:10:58 +0800 Message-ID: <20230630121059.28748-3-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230630121059.28748-1-zelong.dong@amlogic.com> References: <20230630121059.28748-1-zelong.dong@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.28.11.69] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Zelong Dong Add a new compatible string to support for the reset controller on the C3 SoC. The count and offset for C3 Soc RESET registers are same as S4 Soc. Change-Id: I65113f6a90545cd46015abf60b4bcb63fa148267 Signed-off-by: Zelong Dong Reviewed-by: Dmitry Rokosov Reviewed-by: Martin Blumenstingl --- drivers/reset/reset-meson.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index 13878ca2779d..ee1d5caf0ee4 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -109,6 +109,7 @@ static const struct of_device_id meson_reset_dt_ids[] = =3D { { .compatible =3D "amlogic,meson-axg-reset", .data =3D &meson8b_param}, { .compatible =3D "amlogic,meson-a1-reset", .data =3D &meson_a1_param}, { .compatible =3D "amlogic,meson-s4-reset", .data =3D &meson_s4_param}, + { .compatible =3D "amlogic,meson-c3-reset", .data =3D &meson_s4_param}, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, meson_reset_dt_ids); --=20 2.35.1 From nobody Sun Feb 8 01:52:04 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21CAFEB64DC for ; Fri, 30 Jun 2023 12:12:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232951AbjF3MMj (ORCPT ); Fri, 30 Jun 2023 08:12:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233060AbjF3MMK (ORCPT ); Fri, 30 Jun 2023 08:12:10 -0400 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DBFF3C07; Fri, 30 Jun 2023 05:11:14 -0700 (PDT) Received: from droid10-sz.amlogic.com (10.28.11.69) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Fri, 30 Jun 2023 20:11:11 +0800 From: zelong dong To: , , , Rob Herring , CC: , , , , , , Zelong Dong Subject: [PATCH 3/3] arm64: dts: meson: add reset controller for Meson-C3 SoC Date: Fri, 30 Jun 2023 20:10:59 +0800 Message-ID: <20230630121059.28748-4-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230630121059.28748-1-zelong.dong@amlogic.com> References: <20230630121059.28748-1-zelong.dong@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.28.11.69] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Zelong Dong Add the reset controller device of Meson-C3 SoC family Signed-off-by: Zelong Dong --- arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-c3.dtsi index 60ad4f3eef9d..62684b7a684c 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include =20 / { cpus { @@ -82,6 +83,12 @@ uart_b: serial@7a000 { clock-names =3D "xtal", "pclk", "baud"; }; =20 + reset: reset-controller@0x2000 { + compatible =3D "amlogic,meson-c3-reset"; + reg =3D <0x0 0x2000 0x0 0x98>; + #reset-cells =3D <1>; + }; + }; }; }; --=20 2.35.1