From nobody Mon Feb 9 07:20:30 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 678D9EB64D9 for ; Thu, 29 Jun 2023 08:42:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231273AbjF2Imb (ORCPT ); Thu, 29 Jun 2023 04:42:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229520AbjF2IlN (ORCPT ); Thu, 29 Jun 2023 04:41:13 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D48BE3C3B for ; Thu, 29 Jun 2023 01:37:38 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-3094910b150so472779f8f.0 for ; Thu, 29 Jun 2023 01:37:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1688027857; x=1690619857; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2jBqOeBntw2+ThpWf4KE8BMuMRq2HYj3RR0u0oHiddc=; b=P2631v8dfVuMAiCd79tBEx+XlHMPVMM1s0utHNOk/OYNwwPZaMZEJixyVemwzZqFjF t4dHA97W45eek30hweiCwgGvewOewA8URInIRt9tABHEHIl/mM5LxhhdVucJG4bOBRqB T5XTqEN5BrRD/8nop9mB18fbbs7Ung9qxkWn8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688027857; x=1690619857; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2jBqOeBntw2+ThpWf4KE8BMuMRq2HYj3RR0u0oHiddc=; b=KnoqwgPGrbCTVzKcGtrDw6JS1bkQlfOhpb248RU7RhYwd9dXQpYF2nwgxRtmitVPJc v9USp7fEL/zmo8WJQYDDtrpCxGz7KOpsLGEbscbVj6TbAvNSnEBvzz7uOjvk/jMamn4M Z59+UhIntT0jk+mx6ZudOwdgI+CJwiNgO5eboh7Febu2hfTWlhiZ1GuN41h0IXMRMKvo IiY0HqPwd5f4Y7y9W1LTC0lhoq1C8KOHeRTxc6+l+ExsYgkENmtJdCzlFTSmJ9cNIhv5 L8f8UrEwymtMkGfs1kIbd6kuNI6tEc+QL3ILw3Udnkrz3g7jbVkdMYaR759icK3ae/f6 ARAw== X-Gm-Message-State: ABy/qLYZ8mwS4LCdlLAhW7Uu3XRPOSHT36pXSzyBsd53FC1P3F8SwhxD R09suich7n7eOF9GeYOSKPVw/tTgEhbB0knb7Lyi+g== X-Google-Smtp-Source: APBJJlFNU32ts4pU3Y3+UfcDK8gH6yx9+i1081/a9sl3Gib8BPeKZ1Y66EZL7iLlvMTB6NA3u+d2+Q== X-Received: by 2002:adf:cf0d:0:b0:314:1aed:8f5f with SMTP id o13-20020adfcf0d000000b003141aed8f5fmr527463wrj.34.1688027857170; Thu, 29 Jun 2023 01:37:37 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.praguecc.cz (90-182-211-1.rcp.o2.cz. [90.182.211.1]) by smtp.gmail.com with ESMTPSA id cw13-20020a056000090d00b003112f836d4esm15266322wrb.85.2023.06.29.01.37.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jun 2023 01:37:36 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Philippe Cornu , Raphael Gallais-Pou , Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v5 1/3] ARM: dts: stm32: add ltdc support on stm32f746 MCU Date: Thu, 29 Jun 2023 10:37:24 +0200 Message-Id: <20230629083726.84910-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230629083726.84910-1-dario.binacchi@amarulasolutions.com> References: <20230629083726.84910-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add LTDC (Lcd-tft Display Controller) support. Signed-off-by: Dario Binacchi Reviewed-by: Rapha=C3=ABl Gallais-Pou --- (no changes since v1) arch/arm/boot/dts/stm32f746.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746= .dtsi index dc868e6da40e..9c4ba0b7f239 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -507,6 +507,16 @@ pwm { }; }; =20 + ltdc: display-controller@40016800 { + compatible =3D "st,stm32-ltdc"; + reg =3D <0x40016800 0x200>; + interrupts =3D <88>, <89>; + resets =3D <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks =3D <&rcc 1 CLK_LCD>; + clock-names =3D "lcd"; + status =3D "disabled"; + }; + pwrcfg: power-config@40007000 { compatible =3D "st,stm32-power-config", "syscon"; reg =3D <0x40007000 0x400>; --=20 2.32.0