From nobody Tue Feb 10 01:19:18 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69A3CEB64D9 for ; Mon, 26 Jun 2023 18:42:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232541AbjFZSmQ (ORCPT ); Mon, 26 Jun 2023 14:42:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230096AbjFZSmK (ORCPT ); Mon, 26 Jun 2023 14:42:10 -0400 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46C9FE5F for ; Mon, 26 Jun 2023 11:42:07 -0700 (PDT) Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-1b7f2239bfdso18578145ad.1 for ; Mon, 26 Jun 2023 11:42:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1687804927; x=1690396927; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0b1uVANehIH/+ZRkMH5+9QKYLvg0brFXglBZxj/Lb5k=; b=bybKJLkY02mGgsEHB/G5huYNAjJ+Jax7ubFmyT/xSUWJapWYrReIBV/awAq2yPQwz1 LjHqQahv88eqfHOji66+8tfPFl2X3OukadEVM7rwzVWa7W71PJ3tsejRPYK8HD92XYpK CEtbGwUpvVHYqe9q0qtEHxqJLLWSrsExtBqrh3SUsJTpokBfCvMOz0DBFqRSSB5EsbcT IlmGArf+IWgJcsxOVMwVw7EzBLpyyhk8qSc0NOSAvY+9nWpUoJgW5HHI9wccQ8iYxmYX wHVJCNO/fA9k47pR/QmmfBaTg/X4rTYX1LUtNSjVDb4jvoUD8U8b1o/11Pj4TdhKwedI cKBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687804927; x=1690396927; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0b1uVANehIH/+ZRkMH5+9QKYLvg0brFXglBZxj/Lb5k=; b=V6ZGqI9q2WT5TeDn9g7PIVgHlG+2PdXQL13iOXKB0+SD2D6u5AwjM/b1XX+BenxGCb uh9kiYjIo6QXxlmMNsHM5ubVKY7qLHst+Lrhs9a4iFb5/ByPHZeOAZrL3n4zOLUN0Kzo Cbmr7uPjZ91dQm/IWhD7TYdMTjj10UPndq7h5aeaWcsRNuDglL4/27oss5sw4p2wzZQp NTI7ButOEQ9mTGgI9PAKL1ei7AH3rd6m/tnUtbQzaxzxHRvbUYAvmYJfCWPlU95sn+5H H1kdRUFSwjbT/fu4KoDSS9QRkNANCuIDq7R2JEFtB4OXe+xX6s870ATR5eVaWDeoHDxt +0+A== X-Gm-Message-State: AC+VfDxZQnudBqFcL1YROmuOQQQBhmSYSpO7n4W2L1hH5R1hEJ+Lr1NM 9DF5BXsFLVrBjws9OT5KjRJyzQ== X-Google-Smtp-Source: ACHHUZ62/G8gBs8d6kAQdaMAXiShDB+yqOiLofZ8iajX1fHC5c1IefdBrnNt+qeRN+82Vda57HyAig== X-Received: by 2002:a17:902:e88e:b0:1b6:b40c:b022 with SMTP id w14-20020a170902e88e00b001b6b40cb022mr9499718plg.30.1687804926663; Mon, 26 Jun 2023 11:42:06 -0700 (PDT) Received: from ghost.hq.rivosinc.com ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id y6-20020a1709029b8600b001b682336f66sm4499842plp.55.2023.06.26.11.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jun 2023 11:42:06 -0700 (PDT) From: Charlie Jenkins To: charlie@rivosinc.com Cc: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook , Shuah Khan , Alexandre Ghiti , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= , Conor Dooley , Zong Li , Greentime Hu , Andrew Morton , Guo Ren , David Hildenbrand , Sergey Matyukevich , Juergen Gross , Qinglin Pan , Anshuman Khandual , Anup Patel , Huacai Chen , Geert Uytterhoeven , Sunil V L , Kefeng Wang , Evan Green , Mark Brown , Guillaume Tucker , Catalin Marinas , linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-riscv@lists.infradead.org (open list:RISC-V ARCHITECTURE), linux-kernel@vger.kernel.org (open list), linux-mm@kvack.org (open list:EXEC & BINFMT API), linux-kselftest@vger.kernel.org (open list:KERNEL SELFTEST FRAMEWORK) Subject: [PATCH 1/2] RISC-V: mm: Restrict address space for sv39,sv48,sv57 Date: Mon, 26 Jun 2023 11:36:03 -0700 Message-Id: <20230626183611.40479-2-charlie@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230626183611.40479-1-charlie@rivosinc.com> References: <20230626183611.40479-1-charlie@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Make sv39 the default address space for mmap as some applications currently depend on this assumption. The RISC-V specification enforces that bits outside of the virtual address range are not used, so restricting the size of the default address space as such should be temporary. A hint address passed to mmap will cause the largest address space that fits entirely into the hint to be used. If the hint is less than or equal to 1<<38, a 39-bit address will be used. After an address space is completely full, the next smallest address space will be used. Signed-off-by: Charlie Jenkins --- arch/riscv/include/asm/elf.h | 2 +- arch/riscv/include/asm/pgtable.h | 13 +++++++++- arch/riscv/include/asm/processor.h | 41 +++++++++++++++++++++++++----- 3 files changed, 47 insertions(+), 9 deletions(-) diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index 30e7d2455960..1b57f13a1afd 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -49,7 +49,7 @@ extern bool compat_elf_check_arch(Elf32_Ehdr *hdr); * the loader. We need to make sure that it is out of the way of the prog= ram * that it will "exec", and that there is sufficient room for the brk. */ -#define ELF_ET_DYN_BASE ((TASK_SIZE / 3) * 2) +#define ELF_ET_DYN_BASE ((DEFAULT_MAP_WINDOW / 3) * 2) =20 #ifdef CONFIG_64BIT #ifdef CONFIG_COMPAT diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index 75970ee2bda2..e83912e97870 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -57,18 +57,29 @@ #define MODULES_END (PFN_ALIGN((unsigned long)&_start)) #endif =20 + /* * Roughly size the vmemmap space to be large enough to fit enough * struct pages to map half the virtual address space. Then * position vmemmap directly below the VMALLOC region. */ #ifdef CONFIG_64BIT +#define VA_BITS_SV39 39 +#define VA_BITS_SV48 48 +#define VA_BITS_SV57 57 + +#define VA_USER_SV39 (UL(1) << (VA_BITS_SV39 - 1)) +#define VA_USER_SV48 (UL(1) << (VA_BITS_SV48 - 1)) +#define VA_USER_SV57 (UL(1) << (VA_BITS_SV57 - 1)) + #define VA_BITS (pgtable_l5_enabled ? \ - 57 : (pgtable_l4_enabled ? 48 : 39)) + VA_BITS_SV57 : (pgtable_l4_enabled ? VA_BITS_SV48 : VA_BITS_SV39)) #else #define VA_BITS 32 #endif =20 +#define DEFAULT_VA_BITS ((VA_BITS >=3D VA_BITS_SV39) ? VA_BITS_SV39 : VA_B= ITS) + #define VMEMMAP_SHIFT \ (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/pr= ocessor.h index 6fb8bbec8459..019dcd4ecae4 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -12,20 +12,47 @@ =20 #include =20 -/* - * This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) - -#define STACK_TOP TASK_SIZE #ifdef CONFIG_64BIT +#define DEFAULT_MAP_WINDOW (UL(1) << (DEFAULT_VA_BITS - 1)) #define STACK_TOP_MAX TASK_SIZE_64 + +#define arch_get_mmap_end(addr, len, flags) \ + ((addr) =3D=3D 0 || (addr) >=3D VA_USER_SV57 ? STACK_TOP_MAX : \ + (((addr) >=3D VA_USER_SV48) && (VA_BITS >=3D VA_BITS_SV48)) ? \ + VA_USER_SV48 : \ + VA_USER_SV39) + +#define arch_get_mmap_base(addr, base) \ + (((addr >=3D VA_USER_SV57) && (VA_BITS >=3D VA_BITS_SV57)) ? \ + base + STACK_TOP_MAX - DEFAULT_MAP_WINDOW : \ + (((addr) >=3D VA_USER_SV48) && (VA_BITS >=3D VA_BITS_SV48)) ? \ + base + VA_USER_SV48 - DEFAULT_MAP_WINDOW : \ + base) + #else +#define DEFAULT_MAP_WINDOW TASK_SIZE #define STACK_TOP_MAX TASK_SIZE + +#define arch_get_mmap_end(addr, len, flags) \ + ((addr) > DEFAULT_MAP_WINDOW ? STACK_TOP_MAX : DEFAULT_MAP_WINDOW) + +#define arch_get_mmap_base(addr, base) \ + ((addr > DEFAULT_MAP_WINDOW) ? \ + base + STACK_TOP_MAX - DEFAULT_MAP_WINDOW : \ + base) + #endif #define STACK_ALIGN 16 =20 + +#define STACK_TOP DEFAULT_MAP_WINDOW + +/* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE PAGE_ALIGN(DEFAULT_MAP_WINDOW / 3) + #ifndef __ASSEMBLY__ =20 struct task_struct; --=20 2.34.1