From nobody Thu Nov 14 05:51:44 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE79AEB64DD for ; Fri, 23 Jun 2023 09:50:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231138AbjFWJuL (ORCPT ); Fri, 23 Jun 2023 05:50:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231777AbjFWJt5 (ORCPT ); Fri, 23 Jun 2023 05:49:57 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 505512112 for ; Fri, 23 Jun 2023 02:49:54 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6212A6607139; Fri, 23 Jun 2023 10:49:52 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687513793; bh=XfvTrdhefzvxACB2ZRzm/OIzNh2SK1K0ChTLnlUN3Ic=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=b3ss5Hr/bcLsC6lfeWJ35tAnT7oZ2O6oY+VrH/cZQ85fNtGplCDHa9RTOaLAZnVC8 M7gvy+rqk3cLBQJJpVWBt11nSnMlzAhbjbLBoobFEyJlF6JrMed+W6cWAXakJmuFyQ 2mzkiR21C1VGBLawDgglQNdH1UhOWBQWuySwhmz08Am62rnSi+chRLiIo2yjIldYhe nsJGGP1RWiVNwu2XoQ95nSgdQVciOzAQ6DJSkp6b1/QS5dZR4nbZgsYElXaApPvq0v z1GUmqCBfW53NjdO5L/EqRaGfVOk7mTo/B9Hn5FwQDrcrZCfiV+mwuOpBM0Qxj8jV6 w8Xm46kjZB3Fw== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 1/3] drm/mediatek: Dynamically allocate CMDQ and use helper functions Date: Fri, 23 Jun 2023 11:49:29 +0200 Message-Id: <20230623094931.117918-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230623094931.117918-1-angelogioacchino.delregno@collabora.com> References: <20230623094931.117918-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Instead of stack allocating the cmdq_client and cmdq_handle structures switch them to pointers, allowing us to migrate this driver to use the common functions provided by mtk-cmdq-helper. In order to do this, it was also necessary to add a `priv` pointer to struct cmdq_client, as that's used to pass (in this case) a mtk_crtc handle to the ddp_cmdq_cb() mailbox RX callback function. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 107 +++++++----------------- include/linux/soc/mediatek/mtk-cmdq.h | 1 + 2 files changed, 32 insertions(+), 76 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/medi= atek/mtk_drm_crtc.c index 0df62b076f49..b63289ab6787 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -50,8 +50,8 @@ struct mtk_drm_crtc { bool pending_async_planes; =20 #if IS_REACHABLE(CONFIG_MTK_CMDQ) - struct cmdq_client cmdq_client; - struct cmdq_pkt cmdq_handle; + struct cmdq_client *cmdq_client; + struct cmdq_pkt *cmdq_handle; u32 cmdq_event; u32 cmdq_vblank_cnt; wait_queue_head_t cb_blocking_queue; @@ -108,47 +108,6 @@ static void mtk_drm_finish_page_flip(struct mtk_drm_cr= tc *mtk_crtc) } } =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) -static int mtk_drm_cmdq_pkt_create(struct cmdq_client *client, struct cmdq= _pkt *pkt, - size_t size) -{ - struct device *dev; - dma_addr_t dma_addr; - - pkt->va_base =3D kzalloc(size, GFP_KERNEL); - if (!pkt->va_base) { - kfree(pkt); - return -ENOMEM; - } - pkt->buf_size =3D size; - pkt->cl =3D (void *)client; - - dev =3D client->chan->mbox->dev; - dma_addr =3D dma_map_single(dev, pkt->va_base, pkt->buf_size, - DMA_TO_DEVICE); - if (dma_mapping_error(dev, dma_addr)) { - dev_err(dev, "dma map failed, size=3D%u\n", (u32)(u64)size); - kfree(pkt->va_base); - kfree(pkt); - return -ENOMEM; - } - - pkt->pa_base =3D dma_addr; - - return 0; -} - -static void mtk_drm_cmdq_pkt_destroy(struct cmdq_pkt *pkt) -{ - struct cmdq_client *client =3D (struct cmdq_client *)pkt->cl; - - dma_unmap_single(client->chan->mbox->dev, pkt->pa_base, pkt->buf_size, - DMA_TO_DEVICE); - kfree(pkt->va_base); - kfree(pkt); -} -#endif - static void mtk_drm_crtc_destroy(struct drm_crtc *crtc) { struct mtk_drm_crtc *mtk_crtc =3D to_mtk_crtc(crtc); @@ -156,12 +115,9 @@ static void mtk_drm_crtc_destroy(struct drm_crtc *crtc) =20 mtk_mutex_put(mtk_crtc->mutex); #if IS_REACHABLE(CONFIG_MTK_CMDQ) - mtk_drm_cmdq_pkt_destroy(&mtk_crtc->cmdq_handle); - - if (mtk_crtc->cmdq_client.chan) { - mbox_free_channel(mtk_crtc->cmdq_client.chan); - mtk_crtc->cmdq_client.chan =3D NULL; - } + cmdq_pkt_destroy(mtk_crtc->cmdq_handle); + cmdq_mbox_destroy(mtk_crtc->cmdq_client); + mtk_crtc->cmdq_client =3D NULL; #endif =20 for (i =3D 0; i < mtk_crtc->ddp_comp_nr; i++) { @@ -288,7 +244,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *m= ssg) { struct cmdq_cb_data *data =3D mssg; struct cmdq_client *cmdq_cl =3D container_of(cl, struct cmdq_client, clie= nt); - struct mtk_drm_crtc *mtk_crtc =3D container_of(cmdq_cl, struct mtk_drm_cr= tc, cmdq_client); + struct mtk_drm_crtc *mtk_crtc =3D (struct mtk_drm_crtc *)cmdq_cl->priv; struct mtk_crtc_state *state; unsigned int i; =20 @@ -546,7 +502,7 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_c= rtc *mtk_crtc, bool needs_vblank) { #if IS_REACHABLE(CONFIG_MTK_CMDQ) - struct cmdq_pkt *cmdq_handle =3D &mtk_crtc->cmdq_handle; + struct cmdq_pkt *cmdq_handle =3D mtk_crtc->cmdq_handle; #endif struct drm_crtc *crtc =3D &mtk_crtc->base; struct mtk_drm_private *priv =3D crtc->dev->dev_private; @@ -584,14 +540,14 @@ static void mtk_drm_crtc_update_config(struct mtk_drm= _crtc *mtk_crtc, mtk_mutex_release(mtk_crtc->mutex); } #if IS_REACHABLE(CONFIG_MTK_CMDQ) - if (mtk_crtc->cmdq_client.chan) { - mbox_flush(mtk_crtc->cmdq_client.chan, 2000); + if (mtk_crtc->cmdq_client) { + mbox_flush(mtk_crtc->cmdq_client->chan, 2000); cmdq_handle->cmd_buf_size =3D 0; cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event); cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false); mtk_crtc_ddp_config(crtc, cmdq_handle); cmdq_pkt_finalize(cmdq_handle); - dma_sync_single_for_device(mtk_crtc->cmdq_client.chan->mbox->dev, + dma_sync_single_for_device(mtk_crtc->cmdq_client->chan->mbox->dev, cmdq_handle->pa_base, cmdq_handle->cmd_buf_size, DMA_TO_DEVICE); @@ -604,8 +560,8 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_c= rtc *mtk_crtc, */ mtk_crtc->cmdq_vblank_cnt =3D 3; =20 - mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle); - mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0); + mbox_send_message(mtk_crtc->cmdq_client->chan, cmdq_handle); + mbox_client_txdone(mtk_crtc->cmdq_client->chan, 0); } #endif mtk_crtc->config_updating =3D false; @@ -619,7 +575,7 @@ static void mtk_crtc_ddp_irq(void *data) struct mtk_drm_private *priv =3D crtc->dev->dev_private; =20 #if IS_REACHABLE(CONFIG_MTK_CMDQ) - if (!priv->data->shadow_register && !mtk_crtc->cmdq_client.chan) + if (!priv->data->shadow_register && !mtk_crtc->cmdq_client) mtk_crtc_ddp_config(crtc, NULL); else if (mtk_crtc->cmdq_vblank_cnt > 0 && --mtk_crtc->cmdq_vblank_cnt =3D= =3D 0) DRM_ERROR("mtk_crtc %d CMDQ execute command timeout!\n", @@ -722,7 +678,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc= *crtc, mtk_drm_crtc_update_config(mtk_crtc, false); #if IS_REACHABLE(CONFIG_MTK_CMDQ) /* Wait for planes to be disabled by cmdq */ - if (mtk_crtc->cmdq_client.chan) + if (mtk_crtc->cmdq_client) wait_event_timeout(mtk_crtc->cb_blocking_queue, mtk_crtc->cmdq_vblank_cnt =3D=3D 0, msecs_to_jiffies(500)); @@ -1002,19 +958,20 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, =20 #if IS_REACHABLE(CONFIG_MTK_CMDQ) i =3D priv->mbox_index++; - mtk_crtc->cmdq_client.client.dev =3D mtk_crtc->mmsys_dev; - mtk_crtc->cmdq_client.client.tx_block =3D false; - mtk_crtc->cmdq_client.client.knows_txdone =3D true; - mtk_crtc->cmdq_client.client.rx_callback =3D ddp_cmdq_cb; - mtk_crtc->cmdq_client.chan =3D - mbox_request_channel(&mtk_crtc->cmdq_client.client, i); - if (IS_ERR(mtk_crtc->cmdq_client.chan)) { - dev_dbg(dev, "mtk_crtc %d failed to create mailbox client, writing regis= ter by CPU now\n", - drm_crtc_index(&mtk_crtc->base)); - mtk_crtc->cmdq_client.chan =3D NULL; + + mtk_crtc->cmdq_client =3D cmdq_mbox_create(mtk_crtc->mmsys_dev, i); + if (IS_ERR(mtk_crtc->cmdq_client)) { + ret =3D PTR_ERR(mtk_crtc->cmdq_client); + dev_dbg(dev, "Failed to create CMDQ client: %d\n", ret); + mtk_crtc->cmdq_client =3D NULL; + return 0; } =20 - if (mtk_crtc->cmdq_client.chan) { + /* Setup the CMDQ handler callback */ + mtk_crtc->cmdq_client->priv =3D mtk_crtc; + mtk_crtc->cmdq_client->client.rx_callback =3D ddp_cmdq_cb; + + if (mtk_crtc->cmdq_client) { ret =3D of_property_read_u32_index(priv->mutex_node, "mediatek,gce-events", i, @@ -1022,17 +979,15 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, if (ret) { dev_dbg(dev, "mtk_crtc %d failed to get mediatek,gce-events property\n", drm_crtc_index(&mtk_crtc->base)); - mbox_free_channel(mtk_crtc->cmdq_client.chan); - mtk_crtc->cmdq_client.chan =3D NULL; + cmdq_mbox_destroy(mtk_crtc->cmdq_client); + mtk_crtc->cmdq_client =3D NULL; } else { - ret =3D mtk_drm_cmdq_pkt_create(&mtk_crtc->cmdq_client, - &mtk_crtc->cmdq_handle, - PAGE_SIZE); + mtk_crtc->cmdq_handle =3D cmdq_pkt_create(mtk_crtc->cmdq_client, PAGE_S= IZE); if (ret) { dev_dbg(dev, "mtk_crtc %d failed to create cmdq packet\n", drm_crtc_index(&mtk_crtc->base)); - mbox_free_channel(mtk_crtc->cmdq_client.chan); - mtk_crtc->cmdq_client.chan =3D NULL; + cmdq_mbox_destroy(mtk_crtc->cmdq_client); + mtk_crtc->cmdq_client =3D NULL; } } =20 diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/medi= atek/mtk-cmdq.h index 649955d2cf5c..2a1dc8b12db3 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -25,6 +25,7 @@ struct cmdq_client_reg { struct cmdq_client { struct mbox_client client; struct mbox_chan *chan; + void *priv; }; =20 #if IS_ENABLED(CONFIG_MTK_CMDQ) --=20 2.40.1 From nobody Thu Nov 14 05:51:44 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0121BEB64D7 for ; Fri, 23 Jun 2023 09:50:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230317AbjFWJuW (ORCPT ); Fri, 23 Jun 2023 05:50:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231820AbjFWJt7 (ORCPT ); Fri, 23 Jun 2023 05:49:59 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46077E75 for ; Fri, 23 Jun 2023 02:49:55 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 48535660713A; Fri, 23 Jun 2023 10:49:53 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687513794; bh=k4XdsnX1AOsyqpdJBClLMJ/9rHOeGlvlyiKFJbOyaAM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nMVfb1uWknpZymxUC/IT7fnNt3h2V7S6K2Ky4O2+V3bN4RW4h+pLdbMRJ2N83xSGA /UpBN6ur6lBFS4yKyiRsWfgHRV/7L/hQ8KDYQiQ28U602dmXC0W6Op2rOoFaM5IkDU GaBvJGp7FAL6/mbM8GKyqnnynl0TKG7SH9BG+aSkdFh/8rwbPRhM7p0eLyauCqb8m0 WmHP0umbrWQTISrj0e73w94Uyrp7RITOJzjALZ2w9XJJ8PjIYTBMAHxxmls6A0TtTV 5SciRCQj2WYmZwEIDwHOrJ/MGZVX7QFH7w0reIcocjVjpcMQGHk0POTLTXN3KFJIpO L88j8rZbi1ndg== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 2/3] drm/mediatek: Remove all preprocessor ifs for CONFIG_MTK_CMDQ Date: Fri, 23 Jun 2023 11:49:30 +0200 Message-Id: <20230623094931.117918-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230623094931.117918-1-angelogioacchino.delregno@collabora.com> References: <20230623094931.117918-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Since this driver was migrated to use the MediaTek CMDQ helpers, it's not anymore necessary to exclude CMDQ related code with preprocessor if branches, as CMDQ is optional and the helpers are providing the necessary inline functions to manage the case in which CONFIG_MTK_CMDQ is not set. Clean up all instances of `#if IS_REACHABLE(CONFIG_MTK_CMDQ)` from all drivers in drm/mediatek. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2 -- drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 2 -- drivers/gpu/drm/mediatek/mtk_disp_color.c | 2 -- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 2 -- drivers/gpu/drm/mediatek/mtk_disp_merge.c | 2 -- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 -- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 2 -- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 22 +++------------------ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 12 ----------- drivers/gpu/drm/mediatek/mtk_ethdr.c | 6 ++---- drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 3 +-- 11 files changed, 6 insertions(+), 51 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c b/drivers/gpu/drm/medi= atek/mtk_disp_aal.c index 17a4d4a3b040..3faed081ea10 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c @@ -119,11 +119,9 @@ static int mtk_disp_aal_probe(struct platform_device *= pdev) if (IS_ERR(priv->regs)) return dev_err_probe(dev, PTR_ERR(priv->regs), "failed to ioremap aal\n"= ); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif =20 priv->data =3D of_device_get_match_data(dev); platform_set_drvdata(pdev, priv); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/me= diatek/mtk_disp_ccorr.c index 3f4bf7319f17..5a901ded8086 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c @@ -174,11 +174,9 @@ static int mtk_disp_ccorr_probe(struct platform_device= *pdev) if (IS_ERR(priv->regs)) return dev_err_probe(dev, PTR_ERR(priv->regs), "failed to ioremap ccorr\= n"); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif =20 priv->data =3D of_device_get_match_data(dev); platform_set_drvdata(pdev, priv); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_color.c b/drivers/gpu/drm/me= diatek/mtk_disp_color.c index b188d3393f99..af866039bc38 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_color.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_color.c @@ -112,11 +112,9 @@ static int mtk_disp_color_probe(struct platform_device= *pdev) if (IS_ERR(priv->regs)) return dev_err_probe(dev, PTR_ERR(priv->regs), "failed to ioremap color\= n"); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif =20 priv->data =3D of_device_get_match_data(dev); platform_set_drvdata(pdev, priv); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/me= diatek/mtk_disp_gamma.c index 1bf709bac0cf..64ba5c5b631f 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -278,11 +278,9 @@ static int mtk_disp_gamma_probe(struct platform_device= *pdev) if (IS_ERR(priv->regs)) return dev_err_probe(dev, PTR_ERR(priv->regs), "failed to ioremap gamma\= n"); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif =20 priv->data =3D of_device_get_match_data(dev); platform_set_drvdata(pdev, priv); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/me= diatek/mtk_disp_merge.c index 60e0b4e70978..69b6f7229339 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c @@ -269,11 +269,9 @@ static int mtk_disp_merge_probe(struct platform_device= *pdev) return PTR_ERR(priv->reset_ctl); } =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif =20 priv->fifo_en =3D of_property_read_bool(dev->of_node, "mediatek,merge-fifo-en"); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/medi= atek/mtk_disp_ovl.c index 4c00e42ef0a8..854c7545d67d 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -531,11 +531,9 @@ static int mtk_disp_ovl_probe(struct platform_device *= pdev) if (IS_ERR(priv->regs)) return dev_err_probe(dev, PTR_ERR(priv->regs), "failed to ioremap ovl\n"= ); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif =20 priv->data =3D of_device_get_match_data(dev); platform_set_drvdata(pdev, priv); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/med= iatek/mtk_disp_rdma.c index 5e90b6d593f5..c9bce38986c8 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -334,11 +334,9 @@ static int mtk_disp_rdma_probe(struct platform_device = *pdev) if (IS_ERR(priv->regs)) return dev_err_probe(dev, PTR_ERR(priv->regs), "failed to ioremap rdma\n= "); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif =20 if (of_find_property(dev->of_node, "mediatek,rdma-fifo-size", &ret)) { ret =3D of_property_read_u32(dev->of_node, diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/medi= atek/mtk_drm_crtc.c index b63289ab6787..88c63330a421 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -49,13 +49,11 @@ struct mtk_drm_crtc { bool pending_planes; bool pending_async_planes; =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) struct cmdq_client *cmdq_client; struct cmdq_pkt *cmdq_handle; u32 cmdq_event; u32 cmdq_vblank_cnt; wait_queue_head_t cb_blocking_queue; -#endif =20 struct device *mmsys_dev; struct device *dma_dev; @@ -114,11 +112,9 @@ static void mtk_drm_crtc_destroy(struct drm_crtc *crtc) int i; =20 mtk_mutex_put(mtk_crtc->mutex); -#if IS_REACHABLE(CONFIG_MTK_CMDQ) cmdq_pkt_destroy(mtk_crtc->cmdq_handle); cmdq_mbox_destroy(mtk_crtc->cmdq_client); mtk_crtc->cmdq_client =3D NULL; -#endif =20 for (i =3D 0; i < mtk_crtc->ddp_comp_nr; i++) { struct mtk_ddp_comp *comp; @@ -239,7 +235,6 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct = drm_crtc *crtc, return NULL; } =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg) { struct cmdq_cb_data *data =3D mssg; @@ -282,7 +277,6 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *m= ssg) mtk_crtc->cmdq_vblank_cnt =3D 0; wake_up(&mtk_crtc->cb_blocking_queue); } -#endif =20 static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) { @@ -501,9 +495,7 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc, static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc, bool needs_vblank) { -#if IS_REACHABLE(CONFIG_MTK_CMDQ) struct cmdq_pkt *cmdq_handle =3D mtk_crtc->cmdq_handle; -#endif struct drm_crtc *crtc =3D &mtk_crtc->base; struct mtk_drm_private *priv =3D crtc->dev->dev_private; unsigned int pending_planes =3D 0, pending_async_planes =3D 0; @@ -539,7 +531,6 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_c= rtc *mtk_crtc, mtk_crtc_ddp_config(crtc, NULL); mtk_mutex_release(mtk_crtc->mutex); } -#if IS_REACHABLE(CONFIG_MTK_CMDQ) if (mtk_crtc->cmdq_client) { mbox_flush(mtk_crtc->cmdq_client->chan, 2000); cmdq_handle->cmd_buf_size =3D 0; @@ -563,7 +554,6 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_c= rtc *mtk_crtc, mbox_send_message(mtk_crtc->cmdq_client->chan, cmdq_handle); mbox_client_txdone(mtk_crtc->cmdq_client->chan, 0); } -#endif mtk_crtc->config_updating =3D false; mutex_unlock(&mtk_crtc->hw_lock); } @@ -574,16 +564,12 @@ static void mtk_crtc_ddp_irq(void *data) struct mtk_drm_crtc *mtk_crtc =3D to_mtk_crtc(crtc); struct mtk_drm_private *priv =3D crtc->dev->dev_private; =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) if (!priv->data->shadow_register && !mtk_crtc->cmdq_client) mtk_crtc_ddp_config(crtc, NULL); else if (mtk_crtc->cmdq_vblank_cnt > 0 && --mtk_crtc->cmdq_vblank_cnt =3D= =3D 0) DRM_ERROR("mtk_crtc %d CMDQ execute command timeout!\n", drm_crtc_index(&mtk_crtc->base)); -#else - if (!priv->data->shadow_register) - mtk_crtc_ddp_config(crtc, NULL); -#endif + mtk_drm_finish_page_flip(mtk_crtc); } =20 @@ -676,13 +662,13 @@ static void mtk_drm_crtc_atomic_disable(struct drm_cr= tc *crtc, mtk_crtc->pending_planes =3D true; =20 mtk_drm_crtc_update_config(mtk_crtc, false); -#if IS_REACHABLE(CONFIG_MTK_CMDQ) + /* Wait for planes to be disabled by cmdq */ if (mtk_crtc->cmdq_client) wait_event_timeout(mtk_crtc->cb_blocking_queue, mtk_crtc->cmdq_vblank_cnt =3D=3D 0, msecs_to_jiffies(500)); -#endif + /* Wait for planes to be disabled */ drm_crtc_wait_one_vblank(crtc); =20 @@ -956,7 +942,6 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size); mutex_init(&mtk_crtc->hw_lock); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) i =3D priv->mbox_index++; =20 mtk_crtc->cmdq_client =3D cmdq_mbox_create(mtk_crtc->mmsys_dev, i); @@ -994,6 +979,5 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, /* for sending blocking cmd in crtc disable */ init_waitqueue_head(&mtk_crtc->cb_blocking_queue); } -#endif return 0; } diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/= mediatek/mtk_drm_ddp_comp.c index c77af2e4000f..3fd6cc3670ab 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -70,12 +70,10 @@ void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned = int value, struct cmdq_client_reg *cmdq_reg, void __iomem *regs, unsigned int offset) { -#if IS_REACHABLE(CONFIG_MTK_CMDQ) if (cmdq_pkt) cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, cmdq_reg->offset + offset, value); else -#endif writel(value, regs + offset); } =20 @@ -83,12 +81,10 @@ void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, u= nsigned int value, struct cmdq_client_reg *cmdq_reg, void __iomem *regs, unsigned int offset) { -#if IS_REACHABLE(CONFIG_MTK_CMDQ) if (cmdq_pkt) cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, cmdq_reg->offset + offset, value); else -#endif writel_relaxed(value, regs + offset); } =20 @@ -96,19 +92,15 @@ void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsi= gned int value, struct cmdq_client_reg *cmdq_reg, void __iomem *regs, unsigned int offset, unsigned int mask) { -#if IS_REACHABLE(CONFIG_MTK_CMDQ) if (cmdq_pkt) { cmdq_pkt_write_mask(cmdq_pkt, cmdq_reg->subsys, cmdq_reg->offset + offset, value, mask); } else { -#endif u32 tmp =3D readl(regs + offset); =20 tmp =3D (tmp & ~mask) | (value & mask); writel(tmp, regs + offset); -#if IS_REACHABLE(CONFIG_MTK_CMDQ) } -#endif } =20 static int mtk_ddp_clk_enable(struct device *dev) @@ -550,9 +542,7 @@ int mtk_ddp_comp_init(struct device_node *node, struct = mtk_ddp_comp *comp, struct platform_device *comp_pdev; enum mtk_ddp_comp_type type; struct mtk_ddp_comp_dev *priv; -#if IS_REACHABLE(CONFIG_MTK_CMDQ) int ret; -#endif =20 if (comp_id < 0 || comp_id >=3D DDP_COMPONENT_DRM_ID_MAX) return -EINVAL; @@ -598,11 +588,9 @@ int mtk_ddp_comp_init(struct device_node *node, struct= mtk_ddp_comp *comp, if (IS_ERR(priv->clk)) return PTR_ERR(priv->clk); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(comp->dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(comp->dev, "get mediatek,gce-client-reg fail!\n"); -#endif =20 platform_set_drvdata(comp_pdev, priv); =20 diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediate= k/mtk_ethdr.c index 4a5bd5bb9d6e..929479fa22f3 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -303,12 +303,10 @@ static int mtk_ethdr_probe(struct platform_device *pd= ev) for (i =3D 0; i < ETHDR_ID_MAX; i++) { priv->ethdr_comp[i].dev =3D dev; priv->ethdr_comp[i].regs =3D of_iomap(dev->of_node, i); -#if IS_REACHABLE(CONFIG_MTK_CMDQ) - ret =3D cmdq_dev_get_client_reg(dev, - &priv->ethdr_comp[i].cmdq_base, i); + ret =3D cmdq_dev_get_client_reg(dev, &priv->ethdr_comp[i].cmdq_base, i); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif + dev_dbg(dev, "[DRM]regs:0x%p, node:%d\n", priv->ethdr_comp[i].regs, i); } =20 diff --git a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c b/drivers/gpu/drm/medi= atek/mtk_mdp_rdma.c index 93ef05ec9720..897e8e2a1d05 100644 --- a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c @@ -293,11 +293,10 @@ static int mtk_mdp_rdma_probe(struct platform_device = *pdev) if (IS_ERR(priv->clk)) return dev_err_probe(dev, PTR_ERR(priv->clk), "failed to get rdma clk\n"= ); =20 -#if IS_REACHABLE(CONFIG_MTK_CMDQ) ret =3D cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret) dev_dbg(dev, "get mediatek,gce-client-reg fail!\n"); -#endif + platform_set_drvdata(pdev, priv); =20 ret =3D devm_pm_runtime_enable(dev); --=20 2.40.1 From nobody Thu Nov 14 05:51:44 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D8DBEB64DD for ; Fri, 23 Jun 2023 09:50:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231389AbjFWJuR (ORCPT ); Fri, 23 Jun 2023 05:50:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231817AbjFWJt7 (ORCPT ); Fri, 23 Jun 2023 05:49:59 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 138F610D2 for ; Fri, 23 Jun 2023 02:49:56 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (unknown [IPv6:2001:b07:2ed:14ed:c5f8:7372:f042:90a2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 31BEE660713C; Fri, 23 Jun 2023 10:49:54 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1687513794; bh=MkXZsqFyUy7SE+zL4LXq7zo0P/X6WUclHPmpBmU5Bx8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F13gIFdQcQLSBbLmWexiyclkOSf+R20PvcbJzY36nEHZa6oJ4OnRECXihRpvwKBxU NNLXN4I1msPWgMSIlmY8ix6jZAQA2KaaWOorRGHOBQr5o1zxB5WNPurVT9fzQrfCue 2s3KNplisoeCl88g/pJklEEyFp9EGj1qzdobDEiM/fX3fASuB4tmo9XyDf1Aq3APjt hwku9lE5KVIH3cNgK9RAyLLeuHlYPtrVyPTCBA/UdPjbCWT/vlj7Gc7gUj36BAf16V IfELc+74Qr5KCWMVXkWTPV35J5QgFJ7NwJdHLh08jixH+onpudohOn6GDbXfuDI8iL DhVEHQpXGafRg== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH 3/3] drm/mediatek: Move CMDQ setup to mtk_drm_cmdq_init() function Date: Fri, 23 Jun 2023 11:49:31 +0200 Message-Id: <20230623094931.117918-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230623094931.117918-1-angelogioacchino.delregno@collabora.com> References: <20230623094931.117918-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In order to enhance human readability, separating the optional CMDQ mailbox initialization from the rest of the CRTC creation machinery, move it to a new mtk_drm_cmdq_init() function. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 83 ++++++++++++++----------- 1 file changed, 48 insertions(+), 35 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/medi= atek/mtk_drm_crtc.c index 88c63330a421..bff65c8c6a0e 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -826,6 +826,48 @@ struct device *mtk_drm_crtc_dma_dev_get(struct drm_crt= c *crtc) return mtk_crtc->dma_dev; } =20 +static int mtk_drm_cmdq_init(struct device *dev, struct mtk_drm_private *p= riv, + struct mtk_drm_crtc *mtk_crtc) +{ + int ret; + + mtk_crtc->cmdq_client =3D cmdq_mbox_create(mtk_crtc->mmsys_dev, priv->mbo= x_index); + if (IS_ERR(mtk_crtc->cmdq_client)) { + ret =3D PTR_ERR(mtk_crtc->cmdq_client); + dev_dbg(dev, "Failed to create CMDQ client: %d\n", ret); + goto error; + } + + /* Setup the CMDQ handler callback */ + mtk_crtc->cmdq_client->priv =3D mtk_crtc; + mtk_crtc->cmdq_client->client.rx_callback =3D ddp_cmdq_cb; + + ret =3D of_property_read_u32_index(priv->mutex_node, "mediatek,gce-events= ", + priv->mbox_index, &mtk_crtc->cmdq_event); + if (ret) { + dev_dbg(dev, "Failed to get mediatek,gce-events: %d\n", ret); + goto free_mbox; + } + + mtk_crtc->cmdq_handle =3D cmdq_pkt_create(mtk_crtc->cmdq_client, PAGE_SIZ= E); + if (IS_ERR(mtk_crtc->cmdq_handle)) { + ret =3D PTR_ERR(mtk_crtc->cmdq_handle); + dev_err(dev, "Failed to create cmdq packet: %d\n", ret); + goto free_mbox; + } + + /* for sending blocking cmd in crtc disable */ + init_waitqueue_head(&mtk_crtc->cb_blocking_queue); + + return 0; + +free_mbox: + cmdq_mbox_destroy(mtk_crtc->cmdq_client); +error: + mtk_crtc->cmdq_client =3D NULL; + return ret; +} + int mtk_drm_crtc_create(struct drm_device *drm_dev, const unsigned int *path, unsigned int path_len, int priv_data_index) @@ -942,42 +984,13 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size); mutex_init(&mtk_crtc->hw_lock); =20 - i =3D priv->mbox_index++; - - mtk_crtc->cmdq_client =3D cmdq_mbox_create(mtk_crtc->mmsys_dev, i); - if (IS_ERR(mtk_crtc->cmdq_client)) { - ret =3D PTR_ERR(mtk_crtc->cmdq_client); - dev_dbg(dev, "Failed to create CMDQ client: %d\n", ret); - mtk_crtc->cmdq_client =3D NULL; - return 0; - } - - /* Setup the CMDQ handler callback */ - mtk_crtc->cmdq_client->priv =3D mtk_crtc; - mtk_crtc->cmdq_client->client.rx_callback =3D ddp_cmdq_cb; + ret =3D mtk_drm_cmdq_init(dev, priv, mtk_crtc); + if (ret) + dev_info(dev, "No CMDQ support for CRTC%d: using CPU writes\n", + drm_crtc_index(&mtk_crtc->base)); =20 - if (mtk_crtc->cmdq_client) { - ret =3D of_property_read_u32_index(priv->mutex_node, - "mediatek,gce-events", - i, - &mtk_crtc->cmdq_event); - if (ret) { - dev_dbg(dev, "mtk_crtc %d failed to get mediatek,gce-events property\n", - drm_crtc_index(&mtk_crtc->base)); - cmdq_mbox_destroy(mtk_crtc->cmdq_client); - mtk_crtc->cmdq_client =3D NULL; - } else { - mtk_crtc->cmdq_handle =3D cmdq_pkt_create(mtk_crtc->cmdq_client, PAGE_S= IZE); - if (ret) { - dev_dbg(dev, "mtk_crtc %d failed to create cmdq packet\n", - drm_crtc_index(&mtk_crtc->base)); - cmdq_mbox_destroy(mtk_crtc->cmdq_client); - mtk_crtc->cmdq_client =3D NULL; - } - } + /* Unconditionally increment mbox_index */ + priv->mbox_index++; =20 - /* for sending blocking cmd in crtc disable */ - init_waitqueue_head(&mtk_crtc->cb_blocking_queue); - } return 0; } --=20 2.40.1