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[83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:49 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:41 +0200 Subject: [PATCH 1/9] dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-1-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=894; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=F8sCo+8Xd5XxI+0cPZIVX8PD/zdBEi1oKdosoXzGPrA=; b=A04xy8EGlHpSd10ms85yXgvIRB3fkqXy2CskjHYT7oJEcGjyDh3UOhwLi28idwcWGR5jAsHCa 6mNhZkxGrU+CerQACv/uqDtp1BYXsaK6ozrjnN0/9idcqx71HY2n+iI X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GPLL0 has two separate outputs to both GPUSS and MMSS: one that's 2-divided and one that runs at the same rate as the GPLL0 itself. Add the missing ones to the binding. Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski Reviewed-by: Jeffrey Hugo --- include/dt-bindings/clock/qcom,gcc-msm8998.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/clock/qcom,gcc-msm8998.h b/include/dt-bind= ings/clock/qcom,gcc-msm8998.h index 1badb4f9c58f..b5456a64d421 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8998.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8998.h @@ -190,6 +190,9 @@ #define AGGRE2_SNOC_NORTH_AXI 181 #define SSC_XO 182 #define SSC_CNOC_AHBS_CLK 183 +#define GCC_MMSS_GPLL0_DIV_CLK 184 +#define GCC_GPU_GPLL0_DIV_CLK 185 +#define GCC_GPU_GPLL0_CLK 186 =20 #define PCIE_0_GDSC 0 #define UFS_GDSC 1 --=20 2.41.0 From nobody Sun Feb 8 19:35:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0F61C0015E for ; Thu, 22 Jun 2023 11:58:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231130AbjFVL6A (ORCPT ); Thu, 22 Jun 2023 07:58:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229930AbjFVL5y (ORCPT ); Thu, 22 Jun 2023 07:57:54 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 326C91731 for ; Thu, 22 Jun 2023 04:57:53 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id 38308e7fff4ca-2b47742de92so69429621fa.0 for ; Thu, 22 Jun 2023 04:57:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435071; x=1690027071; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=phgyiyd8NbrxCJu24dU6XdDa1Tp6brfneR4jmAIEZFk=; b=Ky6+3kj7p1NGvyDHXfF6QwkVm4eKnR1VRxBzDU26dbzn4AIKa9SOlFdrBd4l1wesqC CtoA3RkyAkh4dXKUM93UrfYA7uEVw7fDHWsUrZ5ye4a6kMMJfvEdYd4GC9AreQvVIPdm Tmhi1SaAoxpxQd5CkkLSV9P0lYgxw6ecrtAQKo7B1nAo48m/DaNSFSIgmdpMiT2Kw2nG 6Q4pT0B4MyvbIkLxgvcPmmlccy0nD2M7UuJ9sUwoO5KNnk6ePwvyV+vfGMQd49ppgjmO EU6LX8XtwVDtUuoIx3nntRT6OXnKDEdRnrKbwV0lsj3Llmm/r2xJ7eJ4afUPK8AO+B9l zQcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435071; x=1690027071; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=phgyiyd8NbrxCJu24dU6XdDa1Tp6brfneR4jmAIEZFk=; b=AvH19l1Q3/fszJITYYvO2E042ymyawS//+d1iRxfLnh3rFBUgyLKgVhXzNGD652qj+ MMKtU6+0ubF7pBarUu9m01hyHDihypBlhwOH/T/Sfdab8vej/KTxEEPzHF6Z55vj/LTw jycFRWAIF0y0buK33MtCniG7XNYrdDOrCBZVmwxnJZugqyM6DM47AH5hCl6D/xuztgBT P6TgKqftNoPdwJO3Y4O5rPnYtFMAmC/TCJsvbs2wsMBuozL6wH0OFGvjHlWFsJrMkaMk 8X2fzSJWI5Vkwlz7VAwuj8kWs/J8aQGcd5kS7aFw7G+QxzYEGD5JQTOXyVMbVuUfbHng /z5w== X-Gm-Message-State: AC+VfDxz3mo7Ehe/q/JixUDtSLteUZexZriwE5sp5mNe8TZpUehTUxQc B4VnfSYDz0NMnMsPRvwEgJ0MfA== X-Google-Smtp-Source: ACHHUZ6poKDsLFlQD1HpmPD4PKyctd7a/nkkBbNQ7Rfv9ZgP68A0QIMU05Nf4HH7hmzf7nDa/sPpGg== X-Received: by 2002:ac2:4db7:0:b0:4f8:5f19:4b49 with SMTP id h23-20020ac24db7000000b004f85f194b49mr9152682lfe.64.1687435071042; Thu, 22 Jun 2023 04:57:51 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:50 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:42 +0200 Subject: [PATCH 2/9] dt-bindings: clock: qcom,mmcc: Add GPLL0_DIV for MSM8998 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-2-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=1020; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=L1ZmGJhvE+3c4nyhdd/kuy9sgSYN3qso+d9Gf0E28bg=; b=Kx7DZaLLz3cEJIXbp9mivyGMd4PNbgP5zWk35jXwsFRj7JGiT5rkci4Mf9psBo5lRJH9qd3Dl NgyA+ZH+KzZA+VuUP5rl+iMpX/+FvhQS8WcWc9r37M83UHbTEKujbRe X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We've not been consuming that clock for no apparent reason. Describe it. Signed-off-by: Konrad Dybcio Acked-by: Jeffrey Hugo Acked-by: Krzysztof Kozlowski Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/qcom,mmcc.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Docum= entation/devicetree/bindings/clock/qcom,mmcc.yaml index 422f5776a771..67e1eae0bbd0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -297,6 +297,7 @@ allOf: - description: HDMI phy PLL clock - description: DisplayPort phy PLL link clock - description: DisplayPort phy PLL vco clock + - description: Global PLL 0 DIV clock =20 clock-names: items: @@ -309,6 +310,7 @@ allOf: - const: hdmipll - const: dplink - const: dpvco + - const: gpll0_div =20 - if: properties: --=20 2.41.0 From nobody Sun Feb 8 19:35:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 987A9EB64D8 for ; Thu, 22 Jun 2023 11:58:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231201AbjFVL6w (ORCPT ); Thu, 22 Jun 2023 07:58:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230499AbjFVL54 (ORCPT ); Thu, 22 Jun 2023 07:57:56 -0400 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3111E1995 for ; Thu, 22 Jun 2023 04:57:54 -0700 (PDT) Received: by mail-lj1-x231.google.com with SMTP id 38308e7fff4ca-2b47bfd4e45so63000541fa.0 for ; Thu, 22 Jun 2023 04:57:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435072; x=1690027072; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PPujOzEdWd2GY4HdeqnnNvNNdoqp42lpZiZ5LAokMOw=; b=HeBuPRYREe6zUYplbWauXyEe3mGM3Qm9PJU5r3opg6+KycUj+ZKoP5un8DvTCVpere t8gqZ8vZFExYOncaejZszdpOOx4TqBDwVBckVeZNLJRODHT/IQep/MUhJmTILpfQHLfK 4oIHr/2qEylM2u2bbXE3gyvSZ7MnMnm0BIhp5b1WH+UV/pwFx0K2bN4HuOfMU68rYtTV 7zr1BKDYbtIEJ0bCVFRTsgl8PCq6mldpIZwY/qCTwxSHGtPD5mQRlphYCGrqTusbIxby UDlhKyIbN/G3n+vu4TLEEs3y6eBivZHww0Rks19v0r2hSkDBXRhz1biwh1+QfQv6R98k SnnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435072; x=1690027072; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PPujOzEdWd2GY4HdeqnnNvNNdoqp42lpZiZ5LAokMOw=; b=fEKMWHreoqAvTnAD9m9IpIubfr+c+10AWLcmIZOF8ZMVzw+R4ZQ/J/pWMTZ2vnprJo FpBN47Rxk9ZELNXwiVt8jFirVsfO/QPO4urZh2xao2JljGD/uF+2hSnahYDigU2s7m1H 5jX+iyS0qX7m5sR96phwwGyect6KXGHIOvl3eh2vqSPJ6f/BzfcNZnbbgDtOuK2/63sw 2xKYmlfym5BWIqw7/Rera77jkRCTvswa3Ky2z8bpNNW0TnOQAV/3TRdHEQkBgjlHV7zb emJmSExMzNGHN+oPueOBzM0IBBTZWkHnOwHvJTIAHrkPDQCF/uCKXHIXMj8wR4ENP6ni yiyw== X-Gm-Message-State: AC+VfDzNTOoVOODGLVIDxn81RCJhaDFuB5hfnmz2+vkrjoE/2tsWfpAp l2cArKf03xFogSDOhCDGzac71w== X-Google-Smtp-Source: ACHHUZ4+YIViH/fKrGKR6TtKbJcvQEx7UuRmD/if8S7/gj5oxYEK+DM3iT0tGl1rOGPi5E+ZtXT5Yg== X-Received: by 2002:a05:6512:10c5:b0:4f9:5c89:5b08 with SMTP id k5-20020a05651210c500b004f95c895b08mr3797275lfg.21.1687435072400; Thu, 22 Jun 2023 04:57:52 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:52 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:43 +0200 Subject: [PATCH 3/9] clk: qcom: gcc-msm8998: Control MMSS and GPUSS GPLL0 outputs properly MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-3-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=3280; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=wORPp1SOzai0xux6F9EqW6IU4OmrOUhUsCj/CQktK9I=; b=3mR5/0vkTCm7oxEnW0JY7n49EAER0TAEA7du9t+GVJsy+6i3aZPJA8czEKOCs6nlId6KF6oM3 JEdpkERivfkCdE70AGqlpC46WbXidxGXkd8XCLIuf1QLYsAeq1Muayo X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Up until now, we've been relying on some non-descript hardware magic to pinkypromise turn the clocks on for us. While new SoCs shine with that feature, MSM8998 can not always be fully trusted. Register the MMSS and GPUSS GPLL0 legs with the CCF to allow for manual enable voting. Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo Tested-by: Jeffrey Hugo --- drivers/clk/qcom/gcc-msm8998.c | 58 ++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 58 insertions(+) diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index be024f8093c5..cccb19cae481 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -25,6 +25,9 @@ #include "reset.h" #include "gdsc.h" =20 +#define GCC_MMSS_MISC 0x0902C +#define GCC_GPU_MISC 0x71028 + static struct pll_vco fabia_vco[] =3D { { 250000000, 2000000000, 0 }, { 125000000, 1000000000, 1 }, @@ -1367,6 +1370,22 @@ static struct clk_branch gcc_boot_rom_ahb_clk =3D { }, }; =20 +static struct clk_branch gcc_mmss_gpll0_div_clk =3D { + .halt_check =3D BRANCH_HALT_DELAY, + .clkr =3D { + .enable_reg =3D 0x5200c, + .enable_mask =3D BIT(0), + .hw.init =3D &(struct clk_init_data){ + .name =3D "gcc_mmss_gpll0_div_clk", + .parent_hws =3D (const struct clk_hw *[]) { + &gpll0_out_main.clkr.hw, + }, + .num_parents =3D 1, + .ops =3D &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_mmss_gpll0_clk =3D { .halt_check =3D BRANCH_HALT_DELAY, .clkr =3D { @@ -1395,6 +1414,38 @@ static struct clk_branch gcc_mss_gpll0_div_clk_src = =3D { }, }; =20 +static struct clk_branch gcc_gpu_gpll0_div_clk =3D { + .halt_check =3D BRANCH_HALT_DELAY, + .clkr =3D { + .enable_reg =3D 0x5200c, + .enable_mask =3D BIT(3), + .hw.init =3D &(struct clk_init_data){ + .name =3D "gcc_gpu_gpll0_div_clk", + .parent_hws =3D (const struct clk_hw *[]) { + &gpll0_out_main.clkr.hw, + }, + .num_parents =3D 1, + .ops =3D &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_gpu_gpll0_clk =3D { + .halt_check =3D BRANCH_HALT_DELAY, + .clkr =3D { + .enable_reg =3D 0x5200c, + .enable_mask =3D BIT(4), + .hw.init =3D &(struct clk_init_data){ + .name =3D "gcc_gpu_gpll0_clk", + .parent_hws =3D (const struct clk_hw *[]) { + &gpll0_out_main.clkr.hw, + }, + .num_parents =3D 1, + .ops =3D &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_blsp1_ahb_clk =3D { .halt_reg =3D 0x17004, .halt_check =3D BRANCH_HALT_VOTED, @@ -3080,6 +3131,9 @@ static struct clk_regmap *gcc_msm8998_clocks[] =3D { [AGGRE2_SNOC_NORTH_AXI] =3D &aggre2_snoc_north_axi_clk.clkr, [SSC_XO] =3D &ssc_xo_clk.clkr, [SSC_CNOC_AHBS_CLK] =3D &ssc_cnoc_ahbs_clk.clkr, + [GCC_MMSS_GPLL0_DIV_CLK] =3D &gcc_mmss_gpll0_div_clk.clkr, + [GCC_GPU_GPLL0_DIV_CLK] =3D &gcc_gpu_gpll0_div_clk.clkr, + [GCC_GPU_GPLL0_CLK] =3D &gcc_gpu_gpll0_clk.clkr, }; =20 static struct gdsc *gcc_msm8998_gdscs[] =3D { @@ -3235,6 +3289,10 @@ static int gcc_msm8998_probe(struct platform_device = *pdev) if (ret) return ret; =20 + /* Disable the GPLL0 active input to MMSS and GPU via MISC registers */ + regmap_write(regmap, GCC_MMSS_MISC, 0x10003); + regmap_write(regmap, GCC_GPU_MISC, 0x10003); + return qcom_cc_really_probe(pdev, &gcc_msm8998_desc, regmap); } =20 --=20 2.41.0 From nobody Sun Feb 8 19:35:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E29F4EB64D8 for ; Thu, 22 Jun 2023 11:58:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231181AbjFVL6l (ORCPT ); Thu, 22 Jun 2023 07:58:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229930AbjFVL6B (ORCPT ); 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[83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:53 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:44 +0200 Subject: [PATCH 4/9] clk: qcom: mmcc-msm8998: Properly consume GPLL0 inputs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-4-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=4835; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=9epwHHXm7694llyzrYE8Ibwsw00gm3N8GTw3CFx13Eo=; b=/5bBV3ls3t77na3yYjGyjhu7xsiRfwCJvHKl+HBCsTzQcNyR12Mt3ea+q2bU6DG2PMtnqK14Z EGgxaYz0RrTADqd7ZPNET+VKfwNmfpSsUKCz3+6lnIZzOVkj+iv2gCY X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Up until now, the GPLL0_DIV MMSS input has been modeled as a fixed child of MMSS_GPLL0_DIV that's always-on. Properly representing the former in the GCC driver makes us unable to keep doing so. Consume MSS_GPLL0_DIV through fw_name ("gpll0_div") as well as add a fixed .name link to keep backwards compatibility. Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo --- drivers/clk/qcom/mmcc-msm8998.c | 35 ++++++++--------------------------- 1 file changed, 8 insertions(+), 27 deletions(-) diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm899= 8.c index 4490594bde69..040c495e91e4 100644 --- a/drivers/clk/qcom/mmcc-msm8998.c +++ b/drivers/clk/qcom/mmcc-msm8998.c @@ -46,19 +46,6 @@ enum { P_DPLINK, }; =20 -static struct clk_fixed_factor gpll0_div =3D { - .mult =3D 1, - .div =3D 2, - .hw.init =3D &(struct clk_init_data){ - .name =3D "mmss_gpll0_div", - .parent_data =3D &(const struct clk_parent_data){ - .fw_name =3D "gpll0" - }, - .num_parents =3D 1, - .ops =3D &clk_fixed_factor_ops, - }, -}; - static const struct clk_div_table post_div_table_fabia_even[] =3D { { 0x0, 1 }, { 0x1, 2 }, @@ -354,7 +341,7 @@ static const struct parent_map mmss_xo_gpll0_gpll0_div_= map[] =3D { static const struct clk_parent_data mmss_xo_gpll0_gpll0_div[] =3D { { .fw_name =3D "xo" }, { .fw_name =3D "gpll0" }, - { .hw =3D &gpll0_div.hw }, + { .fw_name =3D "gpll0_div", .name =3D "gcc_mmss_gpll0_div_clk" }, }; =20 static const struct parent_map mmss_xo_mmpll0_gpll0_gpll0_div_map[] =3D { @@ -368,7 +355,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_gpll= 0_gpll0_div[] =3D { { .fw_name =3D "xo" }, { .hw =3D &mmpll0_out_even.clkr.hw }, { .fw_name =3D "gpll0" }, - { .hw =3D &gpll0_div.hw }, + { .fw_name =3D "gpll0_div", .name =3D "gcc_mmss_gpll0_div_clk" }, }; =20 static const struct parent_map mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map[]= =3D { @@ -384,7 +371,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpl= l1_gpll0_gpll0_div[] =3D { { .hw =3D &mmpll0_out_even.clkr.hw }, { .hw =3D &mmpll1_out_even.clkr.hw }, { .fw_name =3D "gpll0" }, - { .hw =3D &gpll0_div.hw }, + { .fw_name =3D "gpll0_div", .name =3D "gcc_mmss_gpll0_div_clk" }, }; =20 static const struct parent_map mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map[]= =3D { @@ -400,7 +387,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpl= l5_gpll0_gpll0_div[] =3D { { .hw =3D &mmpll0_out_even.clkr.hw }, { .hw =3D &mmpll5_out_even.clkr.hw }, { .fw_name =3D "gpll0" }, - { .hw =3D &gpll0_div.hw }, + { .fw_name =3D "gpll0_div", .name =3D "gcc_mmss_gpll0_div_clk" }, }; =20 static const struct parent_map mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_di= v_map[] =3D { @@ -418,7 +405,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpl= l3_mmpll6_gpll0_gpll0_div { .hw =3D &mmpll3_out_even.clkr.hw }, { .hw =3D &mmpll6_out_even.clkr.hw }, { .fw_name =3D "gpll0" }, - { .hw =3D &gpll0_div.hw }, + { .fw_name =3D "gpll0_div", .name =3D "gcc_mmss_gpll0_div_clk" }, }; =20 static const struct parent_map mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_d= iv_map[] =3D { @@ -436,7 +423,7 @@ static const struct clk_parent_data mmss_xo_mmpll4_mmpl= l7_mmpll10_gpll0_gpll0_di { .hw =3D &mmpll7_out_even.clkr.hw }, { .hw =3D &mmpll10_out_even.clkr.hw }, { .fw_name =3D "gpll0" }, - { .hw =3D &gpll0_div.hw }, + { .fw_name =3D "gpll0_div", .name =3D "gcc_mmss_gpll0_div_clk" }, }; =20 static const struct parent_map mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_d= iv_map[] =3D { @@ -454,7 +441,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpl= l7_mmpll10_gpll0_gpll0_di { .hw =3D &mmpll7_out_even.clkr.hw }, { .hw =3D &mmpll10_out_even.clkr.hw }, { .fw_name =3D "gpll0" }, - { .hw =3D &gpll0_div.hw }, + { .fw_name =3D "gpll0_div", .name =3D "gcc_mmss_gpll0_div_clk" }, }; =20 static const struct parent_map mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_= gpll0_div_map[] =3D { @@ -474,7 +461,7 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpl= l4_mmpll7_mmpll10_gpll0_g { .hw =3D &mmpll7_out_even.clkr.hw }, { .hw =3D &mmpll10_out_even.clkr.hw }, { .fw_name =3D "gpll0" }, - { .hw =3D &gpll0_div.hw }, + { .fw_name =3D "gpll0_div", .name =3D "gcc_mmss_gpll0_div_clk" }, }; =20 static struct clk_rcg2 byte0_clk_src =3D { @@ -2544,10 +2531,6 @@ static struct clk_branch vmem_ahb_clk =3D { }, }; =20 -static struct clk_hw *mmcc_msm8998_hws[] =3D { - &gpll0_div.hw, -}; - static struct gdsc video_top_gdsc =3D { .gdscr =3D 0x1024, .pd =3D { @@ -2855,8 +2838,6 @@ static const struct qcom_cc_desc mmcc_msm8998_desc = =3D { .num_resets =3D ARRAY_SIZE(mmcc_msm8998_resets), .gdscs =3D mmcc_msm8998_gdscs, .num_gdscs =3D ARRAY_SIZE(mmcc_msm8998_gdscs), - .clk_hws =3D mmcc_msm8998_hws, - .num_clk_hws =3D ARRAY_SIZE(mmcc_msm8998_hws), }; =20 static const struct of_device_id mmcc_msm8998_match_table[] =3D { --=20 2.41.0 From nobody Sun Feb 8 19:35:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07882EB64DA for ; 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[83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:54 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:45 +0200 Subject: [PATCH 5/9] clk: qcom: gpucc-msm8998: Use the correct GPLL0 leg with old DTs MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-5-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=831; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=i8Lw042X9XBNaAM5OkUSQrnlDPICd5ZeS5J2C6fGlZY=; b=me7knvddhaTPeU8nQVjnZIZmIFOw4YVK/zy9Jno9N9rZoEuEB2x5vTP8eDxWxY3fRQaGj/mek 38sJXMWE1YHDajluayrbOh+rK4B3QARql0uWfUQ/+iR8n7Y4XG5Inpw X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GPUCC has its own GPLL0 legs - one for 1-1 and one for div-2 output. Add .name lookup to make sure older DTs consume the correct clock. Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo --- drivers/clk/qcom/gpucc-msm8998.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gpucc-msm8998.c b/drivers/clk/qcom/gpucc-msm8= 998.c index f929e0f2333f..cc0b43354787 100644 --- a/drivers/clk/qcom/gpucc-msm8998.c +++ b/drivers/clk/qcom/gpucc-msm8998.c @@ -98,7 +98,7 @@ static const struct parent_map gpu_xo_gpll0_map[] =3D { =20 static const struct clk_parent_data gpu_xo_gpll0[] =3D { { .hw =3D &gpucc_cxo_clk.clkr.hw }, - { .fw_name =3D "gpll0" }, + { .fw_name =3D "gpll0", .name =3D "gcc_gpu_gpll0_clk" }, }; =20 static const struct parent_map gpu_xo_gpupll0_map[] =3D { --=20 2.41.0 From nobody Sun Feb 8 19:35:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BFC1EB64D8 for ; Thu, 22 Jun 2023 11:58:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231225AbjFVL6r (ORCPT ); Thu, 22 Jun 2023 07:58:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231161AbjFVL6C (ORCPT ); Thu, 22 Jun 2023 07:58:02 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E7211BF9 for ; Thu, 22 Jun 2023 04:57:57 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2b45c289615so95028241fa.1 for ; Thu, 22 Jun 2023 04:57:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435076; x=1690027076; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=1BeSpE3Uo2n8gHC5/9wqy8m/N9Ajlsi5ROuDjpnkB8E=; b=uN9D9VCrZ/r2UEX6MtywDEFINRAwY0Xmp4Z/J8Qc38fn2mKMGtEH8SxxyGAGkNrJZv XgV/ojRqO28ptAy7Sn3JXO6QLfBHM8Y3UTmUHX8iTw6N52UJSmFrII+Scpemkl5TLW6i 7KUrsepVkTY+Z6wEJ1yMVmMETIB5cfYl8wP5yBWJAGH+MfAdjAsrhxmIHAwjU2gLJvnD Sv4tOhpQaqhrbdPw+xR5ENTnEFBg/CPYoqb2dIgh28Yzdaejy8ylVpaHTnoPIpbqHXkS jcGYk6HZTaW88U9EJXlkyVg8VTd9f2RkxjukzrcSiu28QSC10vUml+WgHgvhBFZqOiki a9og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435076; x=1690027076; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1BeSpE3Uo2n8gHC5/9wqy8m/N9Ajlsi5ROuDjpnkB8E=; b=kO/EGz1hlpxdzgNcr8uJ6WcBS1CZRrxOrO9S3r3NqDCjeW/wgw2VZiL0/nIhOgZ748 /DEzYKn0/pNu2ULiDBXkxkE/KXul0kMS1SUigCFxSNbvefG1qk/ydY0kzyadsXDt2onj oCj42NImnii9nOdoCHPKAcqLPcAR7WgnvY2VlHRvWu3I3CviPEKC2Bw2coHzUDQ8OZlQ m+WiJITl8Z8nXiskJUefv4tUkxXMNwZd+hxa3bSRBTd9zg2c8cymODnT2Iu3R4Am/vNr h7xR4NbH7SRyZKEphVg8uks3GixVeo+IfwXFFITeT27omqEaFRlgSvOezpKDLJpQGEFI 64Pw== X-Gm-Message-State: AC+VfDwsvZ1a8zpvJdypejWVY+ld0qS7bP8UaC0XwolCJV19l0luo2TX QEfzNTZ8rfAofo/kLvxaOaxAog== X-Google-Smtp-Source: ACHHUZ4+NaZmD70hTl4GjwDfaM5+0kvxGlaDPhrX+r3D+Ca6PGZQjFY+fu5+mDmEKSPGvsoRUsTL5g== X-Received: by 2002:a05:6512:68:b0:4f6:3ab6:3d9e with SMTP id i8-20020a056512006800b004f63ab63d9emr9859962lfo.59.1687435076336; Thu, 22 Jun 2023 04:57:56 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:56 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:46 +0200 Subject: [PATCH 6/9] clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-6-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=1420; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=RMdpPTx0djdmSD0IRCOXo7v4qwhogMdk+CvkRbKSXoY=; b=nXGgMQ70zoaumt/TBlld6IqSQFvVaxn2XlqCKqTL97RyXLaeCUKWnUU136fMxxQeDB49j6YkX Nay9tUVEsgPCUFc3D8OUJSnju0/0HSp8deMuJoJKr+0Sy8N7N7hXXor X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some branch clocks are governed externally and we're only supposed to send a request concerning their shutdown, not actually ensure it happens. Use the BRANCH_HALT_SKIP define to skip checking the halt bit. Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo --- drivers/clk/qcom/gcc-msm8998.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index cccb19cae481..ef410f52f09f 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2112,7 +2112,7 @@ static struct clk_branch gcc_gp3_clk =3D { =20 static struct clk_branch gcc_bimc_gfx_clk =3D { .halt_reg =3D 0x46040, - .halt_check =3D BRANCH_HALT, + .halt_check =3D BRANCH_HALT_SKIP, .clkr =3D { .enable_reg =3D 0x46040, .enable_mask =3D BIT(0), @@ -2125,7 +2125,7 @@ static struct clk_branch gcc_bimc_gfx_clk =3D { =20 static struct clk_branch gcc_gpu_bimc_gfx_clk =3D { .halt_reg =3D 0x71010, - .halt_check =3D BRANCH_HALT, + .halt_check =3D BRANCH_HALT_SKIP, .clkr =3D { .enable_reg =3D 0x71010, .enable_mask =3D BIT(0), @@ -2151,7 +2151,7 @@ static struct clk_branch gcc_gpu_bimc_gfx_src_clk =3D= { =20 static struct clk_branch gcc_gpu_cfg_ahb_clk =3D { .halt_reg =3D 0x71004, - .halt_check =3D BRANCH_HALT, + .halt_check =3D BRANCH_HALT_SKIP, .clkr =3D { .enable_reg =3D 0x71004, .enable_mask =3D BIT(0), --=20 2.41.0 From nobody Sun Feb 8 19:35:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A00E4EB64D8 for ; Thu, 22 Jun 2023 11:58:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229990AbjFVL65 (ORCPT ); Thu, 22 Jun 2023 07:58:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231177AbjFVL6D (ORCPT ); Thu, 22 Jun 2023 07:58:03 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FA1D1FCB for ; Thu, 22 Jun 2023 04:57:59 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2b45e6e1b73so92126191fa.0 for ; Thu, 22 Jun 2023 04:57:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435077; x=1690027077; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ui/BOOndyfM3aIC3fjk2ZOYgUTAS5R3hDINVZmRj27A=; b=G51dqI94M4i4IoL75MXheNZetaeRNUfDFt8S35vZUGj26eZxjgTbZOIzRYJD0HucV8 rAs3iW+wMcnuDoX4mI6iKB+qLUbMm2L7xSSCes9QNqE1o1/akrk+sJw5ELyoDJcY809a tNLjN5qOuj3C8nrdCLNpMxMjEwQiSKJjJKaq3rAPGPix4U25stmqbH08hJxLNcDxqLbI pDZL5bZ+tpTUiazWnAjjXgKGB4OSqD399MM8mwrQ0+9BEzHr/KnD36roAdWj9z9kflWX uPGTIOX5cJ0ytC8hdZPpfyEBUMdIvCNtR2BBnABIQH2oc2NfHFNWkc5O2AQsBRgcDxp/ TzkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435077; x=1690027077; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ui/BOOndyfM3aIC3fjk2ZOYgUTAS5R3hDINVZmRj27A=; b=fKGGzHBnGGv+TEJiPnU5sfMHmQYYhAtRmYzeuONGQleOGLn3EdxElhuEwkAnzFi6DS pgYKwzanIHShFl7q3PFMUcXv5sRawGHWIdrmFxMj62lyA8D8Jlz+1i6Jrg0a3/WCjU3B QgSYBEREva6lGV8y+Vv0Q6ISGF0i0qnKu9HtogBeAqtNERRrLF9dLLTg124oM3W4szNN XrBOSGeskZimZ8QNyQUhLBuPvoICcbpwjB2OX+tDC+lY7G5S93IPLP2WJgof6vbI9SFa DWO6sLjyK6jdGTLFBwd2lEl4Id4hlXsnjZWQqU3UUfiVpCB+IntEo3cLAKjA8/1GwieU m1WA== X-Gm-Message-State: AC+VfDz9/2KUL1cBD8R8JxNKchGp4wJU7T9ssHzLf43HpR4bwtm2sC/5 R096BN18u6kwyWbN3/5jrKjK/g== X-Google-Smtp-Source: ACHHUZ6jZm2wnWtDDlVoHE0YsY6U9Cq2xMNnPCpX781Y1UwaM/Zl4EPP3FI3QQ4a+4v3QKgCCe1EKA== X-Received: by 2002:a19:435a:0:b0:4f8:5905:8e0a with SMTP id m26-20020a19435a000000b004f859058e0amr9990226lfj.6.1687435077710; Thu, 22 Jun 2023 04:57:57 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:57 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:47 +0200 Subject: [PATCH 7/9] clk: qcom: gcc-msm8998: Don't poke at some BIMC GPU clocks MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-7-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=2115; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=xt2xPT5OWFY9FXJ7H/2LPYsGPu00r53wEVIqMuapaII=; b=2hr6uDLk8/eJg7nshvP5I7TXQUvGJL8vGwFfDFLbEISgkyuS7aAIb5FCtKRIygJ5N7EZdjXrW KWdmpt+lRi2ANl52Dl0WnNjZEpFIn2kDxSk8B92YxqJ2G82pnjvV3rB X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Linux should apparently not be concerned with gcc_gpu_bimc_gfx_src_clk and gcc_gpu_bimc_gfx_src_clk on MSM8998, as they're preconfigured for us. Unregister them to prevent issues. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/gcc-msm8998.c | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index ef410f52f09f..980b5a1b58ae 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2136,19 +2136,6 @@ static struct clk_branch gcc_gpu_bimc_gfx_clk =3D { }, }; =20 -static struct clk_branch gcc_gpu_bimc_gfx_src_clk =3D { - .halt_reg =3D 0x7100c, - .halt_check =3D BRANCH_HALT, - .clkr =3D { - .enable_reg =3D 0x7100c, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_gpu_bimc_gfx_src_clk", - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_gpu_cfg_ahb_clk =3D { .halt_reg =3D 0x71004, .halt_check =3D BRANCH_HALT_SKIP, @@ -2168,19 +2155,6 @@ static struct clk_branch gcc_gpu_cfg_ahb_clk =3D { }, }; =20 -static struct clk_branch gcc_gpu_snoc_dvm_gfx_clk =3D { - .halt_reg =3D 0x71018, - .halt_check =3D BRANCH_HALT, - .clkr =3D { - .enable_reg =3D 0x71018, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_gpu_snoc_dvm_gfx_clk", - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_hmss_ahb_clk =3D { .halt_reg =3D 0x48000, .halt_check =3D BRANCH_HALT_VOTED, @@ -3032,9 +3006,7 @@ static struct clk_regmap *gcc_msm8998_clocks[] =3D { [GCC_GP3_CLK] =3D &gcc_gp3_clk.clkr, [GCC_BIMC_GFX_CLK] =3D &gcc_bimc_gfx_clk.clkr, [GCC_GPU_BIMC_GFX_CLK] =3D &gcc_gpu_bimc_gfx_clk.clkr, - [GCC_GPU_BIMC_GFX_SRC_CLK] =3D &gcc_gpu_bimc_gfx_src_clk.clkr, [GCC_GPU_CFG_AHB_CLK] =3D &gcc_gpu_cfg_ahb_clk.clkr, - [GCC_GPU_SNOC_DVM_GFX_CLK] =3D &gcc_gpu_snoc_dvm_gfx_clk.clkr, [GCC_HMSS_AHB_CLK] =3D &gcc_hmss_ahb_clk.clkr, [GCC_HMSS_AT_CLK] =3D &gcc_hmss_at_clk.clkr, [GCC_HMSS_RBCPR_CLK] =3D &gcc_hmss_rbcpr_clk.clkr, --=20 2.41.0 From nobody Sun Feb 8 19:35:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CC59EB64D8 for ; Thu, 22 Jun 2023 11:58:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231168AbjFVL6h (ORCPT ); Thu, 22 Jun 2023 07:58:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231214AbjFVL6F (ORCPT ); Thu, 22 Jun 2023 07:58:05 -0400 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3580C1FF5 for ; Thu, 22 Jun 2023 04:58:01 -0700 (PDT) Received: by mail-lj1-x233.google.com with SMTP id 38308e7fff4ca-2b45b6adffbso95921521fa.3 for ; Thu, 22 Jun 2023 04:58:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435079; x=1690027079; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZILjfplVkyXwwY/Vk9vNMVAT/CrFw5qFILje9oH7ZxI=; b=LFBzzcgBhdvdLMdLBlLx7ZI7Tbs8dLvXoX+sZiLRdvnn1fl4QQpTvnEsaiC+BagjKr 2XFndg/MxLlKknPcrXMlBOWXB0SWNWyMyS8FiCFTGRq3utGkWa/T2QpN2rZte6NigmUR tiPBaoyKKNyE5NvyH7vm14STfo/RCdqaLQyd1sYX8ts6f3kg0x4icfNr/+m8YX3YKSJh wrRTGLdPOzbKMFiatMpycMLTtgFmujXhcEdEHewhtQoebwEQLl98pEOSEEdzVBO6XBf6 84UdRTCigMjnJCmQ1wEo8+rMR6grFI6lS6zWRzKt9UdpRw+msamfuH7ZrHBLwDer2YZ9 zXXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435079; x=1690027079; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZILjfplVkyXwwY/Vk9vNMVAT/CrFw5qFILje9oH7ZxI=; b=bauzQtFpLnKkrcRYntImfTQW5fFWV5VsmWFVHatspVq5YVQ0DcS2Jt8KOFdgi+k6Vv uQe8DShCfUDu6uNi4uTsbPuB8BEFAvM3BBL8/IFQk7Z5r+9HbdiQl9/YUb/KDEJYHYks 7vGFIhuAWRzlb8yAe3Odgbv3F3mE3DX9h79itNtosuFRCZaSxJx0PWhgkx6iuDroP0vf YwAqrKDhRirwsQNW+7mq52xNsBMPLHwwsEaSQdTVV/ANhFhS0GzDnsprj19DevtT2trN z9Hk2DtqsrxA+nKHHgIcKORtZQryngaWpNTx/hGQ1b6Dv41EnBx8tWES1dZFlVZbXy7I F/nA== X-Gm-Message-State: AC+VfDzSvc4Mf2iQWLxDrqpkByEbVgFtQY8L8y9MeXOPAOMPwxDYcvaW Sw3j+Vknor5vq9sPfSJrVGqGVg== X-Google-Smtp-Source: ACHHUZ7m4PyiYoTIiAFmkVfe+HaWu+zBYTvJH1Wb7MrWlmzq7NpPoY3WEY2HlcXIYUgaxMcM6zzbWQ== X-Received: by 2002:a19:711c:0:b0:4f6:3000:4d5a with SMTP id m28-20020a19711c000000b004f630004d5amr10848140lfc.38.1687435079156; Thu, 22 Jun 2023 04:57:59 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:58 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:48 +0200 Subject: [PATCH 8/9] arm64: dts: qcom: msm8998: Use the correct GPLL0 leg for GPUCC MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-8-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=738; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=ih+ryM16TgO1zmWBZ5fg0NCby9pNBTJkiA0FEt7oBOI=; b=3x7GPBHGo/0XQ3mC4GY7XNBfXJTntEfg2XEHTbDuKkHQXoTAbrtUce1oLaNP9lDyknU0kLBdt UNjKraJy5nODREE6ElWLP7/tZhZTPee5Ge0CwmJkHSYDHd7PSGbWTdk X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GPUCC has its own GPLL0 leg, switch to it to allow shutting it down when it's unused. Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qc= om/msm8998.dtsi index f0e943ff0046..74bd05579796 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -1574,7 +1574,7 @@ gpucc: clock-controller@5065000 { reg =3D <0x05065000 0x9000>; =20 clocks =3D <&rpmcc RPM_SMD_XO_CLK_SRC>, - <&gcc GPLL0_OUT_MAIN>; + <&gcc GCC_GPU_GPLL0_CLK>; clock-names =3D "xo", "gpll0"; }; --=20 2.41.0 From nobody Sun Feb 8 19:35:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93828EB64DC for ; Thu, 22 Jun 2023 11:58:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231150AbjFVL6d (ORCPT ); Thu, 22 Jun 2023 07:58:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231253AbjFVL6J (ORCPT ); Thu, 22 Jun 2023 07:58:09 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A489210B for ; Thu, 22 Jun 2023 04:58:02 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-4f955850e30so683090e87.1 for ; Thu, 22 Jun 2023 04:58:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687435080; x=1690027080; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qd4+5bYIJSD1AWeQPTgthQXsn71VUDPalDNC260pIEQ=; b=s0PIpjdHBrUCmeQJXzRAvu/7Mwfkh5y9yHnSBMd/UCbKepsIHfBNbp1Ck5i4GSkk6W Ypof/0JQ4qeLyg4e5sM0TyAwowvArVeU+FnQO5mXoIoyqEkvCdwiL/a9jT8baQZVWdjH jjKfLQOfsufM6WNmjlKHKSF0P/FbW/XEtI57A6VQfdtDuaiM8Gb+8DdXzFH6BBk+Mmml c/bL5/g5YiZm2g2pe9Tqrj+8sM7xfOeGQNYsvesoY7ak0ZaU6cDeHfjQn+1EVGrPf79y rwtB4glx+8vV1qCKtbx9jrcnsU1UeQCLQDGvwmw6fG8TZkZo4aUwQkL/ge9wGP9adtl4 E1vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687435080; x=1690027080; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qd4+5bYIJSD1AWeQPTgthQXsn71VUDPalDNC260pIEQ=; b=KM4IPp8G9Vadvdfyt6TeydcH9n6pRj8MTe5SSLr8bq5ueI9UwaQUpLAPZAu8bxqMT0 jHn2khvl/SwNYrbehsHhB/u5AzLjK7sKyjmrRuG9/mdwkMSw+ZAsJJMRu+WtPZXehYyX S1A81WZwIr6x0Jj0w7/txrKp7HnNsR2HKDCJcVqBFAp4D/QhMUw8eFmEyQtKoIEY3Qge teITOEgPBnDnLuGPsQcmbgUPc1Db5Ga1lO0rNlNdE9+mylbjs5vAuJeWgSN0z9tmXj4u a1n+HZs7miPbMKWSleZursN8cr2fW73a/eBRMKmXeUOBVN+fvoLr9+Slw1lyDD72jfuE ZvfQ== X-Gm-Message-State: AC+VfDxgsNmzuWC0SacvvOGXPcHppBKp0n6hU4AQoQTVhmaoxtWZ6YJ4 klyA3N0DA5bm95wwUioxf5vplQ== X-Google-Smtp-Source: ACHHUZ6mSwfTPRX+hOMQU4jgq9OD77Do6O2v/qGaMaDRKmBcy6Ihebui932eq6rSNRtrcEfrp5P2Cw== X-Received: by 2002:a05:6512:12d1:b0:4f7:65a7:4d94 with SMTP id p17-20020a05651212d100b004f765a74d94mr8080678lfg.7.1687435080447; Thu, 22 Jun 2023 04:58:00 -0700 (PDT) Received: from [192.168.1.101] (abyl165.neoplus.adsl.tpnet.pl. [83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:58:00 -0700 (PDT) From: Konrad Dybcio Date: Thu, 22 Jun 2023 13:57:49 +0200 Subject: [PATCH 9/9] arm64: dts: qcom: msm8998: Use the correct GPLL0_DIV leg for MMCC MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230622-topic-8998clk-v1-9-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeffrey Hugo , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=1056; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=gJtjlM23H/np8JPlgrRMMzMMmFruemZY5INaIEO4+Kg=; b=ZOzGxwxyKdjB5CuoCZtPs1vOWhS12y7dZRhQ3MdXQ/4bwzI2xByM4FWZDx1OQatfW2recggXb 6Hy5kqKivQtDFlZuMQ0ki2sV22O+49Wdan7ocq1Q56hCZGjMNz5OB1y X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MMCC has its own GPLL0 legs - one for 1-1 and one for div-2 output. We've already been using the correct one in the non-div case, start doing so for the other one as well. Signed-off-by: Konrad Dybcio Reviewed-by: Jeffrey Hugo --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qc= om/msm8998.dtsi index 74bd05579796..c4faba092368 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2718,7 +2718,8 @@ mmcc: clock-controller@c8c0000 { "dsi1byte", "hdmipll", "dplink", - "dpvco"; + "dpvco", + "gpll0_div"; clocks =3D <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GCC_MMSS_GPLL0_CLK>, <0>, @@ -2727,7 +2728,8 @@ mmcc: clock-controller@c8c0000 { <0>, <0>, <0>, - <0>; + <0>, + <&gcc GCC_MMSS_GPLL0_DIV_CLK>; }; =20 mmss_smmu: iommu@cd00000 { --=20 2.41.0