From nobody Mon Feb 9 16:17:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6036BEB64D7 for ; Tue, 20 Jun 2023 09:48:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232444AbjFTJsP (ORCPT ); Tue, 20 Jun 2023 05:48:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232395AbjFTJsB (ORCPT ); Tue, 20 Jun 2023 05:48:01 -0400 Received: from m12.mail.163.com (m12.mail.163.com [220.181.12.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 318F1133 for ; Tue, 20 Jun 2023 02:47:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version: Content-Type; bh=U0SWL/JdjvOqGx7gC3JlFOSCNm1yICr30bcx3Pn/rOc=; b=k0IPjAgM7wS2e0KXaDA4o0dS4eUrwmCClAe12ml0sn2RoUBLAxLaYckkvZxY/x yjylrv815ow7DwRvC74/8BK9iCfjVaB007+txm7K8Yfg1AwBLhxL3oE7M+EqZccz IRpnlYaZ/jhvOM0neqiPKZ4xSAug0kLPwr2yvZlWSGTbw= Received: from openarena.loongson.cn (unknown [114.242.206.180]) by zwqz-smtp-mta-g4-0 (Coremail) with SMTP id _____wAXg3CldZFkB8yiAQ--.11241S4; Tue, 20 Jun 2023 17:47:18 +0800 (CST) From: Sui Jingfeng <18949883232@163.com> To: Lucas Stach , Russell King , Christian Gmeiner , David Airlie , Daniel Vetter Cc: linux-kernel@vger.kernel.org, etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Sui Jingfeng , Philipp Zabel , Bjorn Helgaas Subject: [PATCH v10 02/11] drm/etnaviv: Add a dedicated function to get various clocks Date: Tue, 20 Jun 2023 17:47:07 +0800 Message-Id: <20230620094716.2231414-3-18949883232@163.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230620094716.2231414-1-18949883232@163.com> References: <20230620094716.2231414-1-18949883232@163.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wAXg3CldZFkB8yiAQ--.11241S4 X-Coremail-Antispam: 1Uf129KBjvJXoWxXFW3Zr13Cw1DWr4rJFWUJwb_yoW5ur1kpa 1fJ3W5Kr1UCryUK3yxAF13tr1a9r1fCayxCwnYvrnavws8KF4Utw4YkFyYqF45uryrXFWS kr15GF4UCFyF9rUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jpWlkUUUUU= X-Originating-IP: [114.242.206.180] X-CM-SenderInfo: jprymkizyyjjits6il2tof0z/xtbBaQeU0VXl0TKDvQAAsG Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sui Jingfeng Because it is also platform-dependent, there are systems where we don't have DT-based clock drivers supported. For example, discrete PCI GPUs. Therefire, don't quit if there is no clock subsystem support. =C2=A0 =C2=A0=C2=A0 For the GPU in LS7A1000 and LS2K1000, the working frequency of the GPU is rely on the GFX PLL to generate the clock. Typically, the GFX PLL is configured by the platform firmware. Cc: Lucas Stach Cc: Christian Gmeiner Cc: Philipp Zabel Cc: Bjorn Helgaas Cc: Daniel Vetter Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 53 ++++++++++++++++----------- 1 file changed, 32 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnavi= v/etnaviv_gpu.c index a03e81337d8f..5e88fa95dac2 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -1565,6 +1565,35 @@ static irqreturn_t irq_handler(int irq, void *data) return ret; } =20 +static int etnaviv_gpu_clk_get(struct etnaviv_gpu *gpu) +{ + struct device *dev =3D gpu->dev; + + gpu->clk_reg =3D devm_clk_get_optional(dev, "reg"); + DBG("clk_reg: %p", gpu->clk_reg); + if (IS_ERR(gpu->clk_reg)) + return PTR_ERR(gpu->clk_reg); + + gpu->clk_bus =3D devm_clk_get_optional(dev, "bus"); + DBG("clk_bus: %p", gpu->clk_bus); + if (IS_ERR(gpu->clk_bus)) + return PTR_ERR(gpu->clk_bus); + + gpu->clk_core =3D devm_clk_get(dev, "core"); + DBG("clk_core: %p", gpu->clk_core); + if (IS_ERR(gpu->clk_core)) + return PTR_ERR(gpu->clk_core); + gpu->base_rate_core =3D clk_get_rate(gpu->clk_core); + + gpu->clk_shader =3D devm_clk_get_optional(dev, "shader"); + DBG("clk_shader: %p", gpu->clk_shader); + if (IS_ERR(gpu->clk_shader)) + return PTR_ERR(gpu->clk_shader); + gpu->base_rate_shader =3D clk_get_rate(gpu->clk_shader); + + return 0; +} + static int etnaviv_gpu_clk_enable(struct etnaviv_gpu *gpu) { int ret; @@ -1863,27 +1892,9 @@ static int etnaviv_gpu_platform_probe(struct platfor= m_device *pdev) return err; =20 /* Get Clocks: */ - gpu->clk_reg =3D devm_clk_get_optional(&pdev->dev, "reg"); - DBG("clk_reg: %p", gpu->clk_reg); - if (IS_ERR(gpu->clk_reg)) - return PTR_ERR(gpu->clk_reg); - - gpu->clk_bus =3D devm_clk_get_optional(&pdev->dev, "bus"); - DBG("clk_bus: %p", gpu->clk_bus); - if (IS_ERR(gpu->clk_bus)) - return PTR_ERR(gpu->clk_bus); - - gpu->clk_core =3D devm_clk_get(&pdev->dev, "core"); - DBG("clk_core: %p", gpu->clk_core); - if (IS_ERR(gpu->clk_core)) - return PTR_ERR(gpu->clk_core); - gpu->base_rate_core =3D clk_get_rate(gpu->clk_core); - - gpu->clk_shader =3D devm_clk_get_optional(&pdev->dev, "shader"); - DBG("clk_shader: %p", gpu->clk_shader); - if (IS_ERR(gpu->clk_shader)) - return PTR_ERR(gpu->clk_shader); - gpu->base_rate_shader =3D clk_get_rate(gpu->clk_shader); + err =3D etnaviv_gpu_clk_get(gpu); + if (err) + return err; =20 /* TODO: figure out max mapped size */ dev_set_drvdata(dev, gpu); --=20 2.25.1