From nobody Fri Dec 19 22:07:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB61DEB64D9 for ; Sat, 17 Jun 2023 18:25:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346423AbjFQSZz (ORCPT ); Sat, 17 Jun 2023 14:25:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346363AbjFQSZv (ORCPT ); Sat, 17 Jun 2023 14:25:51 -0400 Received: from s.wrqvtzvf.outbound-mail.sendgrid.net (s.wrqvtzvf.outbound-mail.sendgrid.net [149.72.126.143]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 539D919A2 for ; Sat, 17 Jun 2023 11:25:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=from:subject:in-reply-to:references:mime-version:to:cc: content-transfer-encoding:content-type:cc:content-type:from:subject:to; s=s1; bh=LWxFuiloBtSlshgsCgy8wxWXAkKewftYNZ4msk9aWKQ=; b=GaMWjNHnbbFPSJA9K/qlyA84uPJpLjs4KPkeTd8Wk9SvFCPkIuKbldOevd3I3E4o4htd oWRRu9hCsSd3HKxhb7Q1jPjQOm2DGc00YeHL9aQOnUGRZXpDUFBb7CFb33/zfBqXEleklg uCN1Aox48HXpontb38o1y467t3aCNYPZI0kReJawkT15zquV6JSpmo+g5lFV1R166gzpwp hwLfT/xf8iIPgmmVTXeR226yEFj0cRl/WVu3V/a4RWXPaR9bsA4plrTpPdQiVzMutSXAiK UaBL1yZyNgyyk+mnpFFgQG2fg1cZ41+mhjsQDJdo3VV3yhR+aSW0zMLVMFydABEA== Received: by filterdrecv-84b96456cb-vm9rv with SMTP id filterdrecv-84b96456cb-vm9rv-1-648DFAA9-8 2023-06-17 18:25:45.571793879 +0000 UTC m=+3264420.325817917 Received: from bionic.localdomain (unknown) by geopod-ismtpd-9 (SG) with ESMTP id GaPCRIizSC-ctweejSKLYw Sat, 17 Jun 2023 18:25:45.250 +0000 (UTC) From: Jonas Karlman Subject: [PATCH v3 1/2] iommu: rockchip: Fix directory table address encoding Date: Sat, 17 Jun 2023 18:25:45 +0000 (UTC) Message-Id: <20230617182540.3091374-2-jonas@kwiboo.se> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230617182540.3091374-1-jonas@kwiboo.se> References: <20230617182540.3091374-1-jonas@kwiboo.se> MIME-Version: 1.0 X-SG-EID: =?us-ascii?Q?TdbjyGynYnRZWhH+7lKUQJL+ZxmxpowvO2O9SQF5CwCVrYgcwUXgU5DKUU3QxA?= =?us-ascii?Q?fZekEeQsTe+RrMu3cja6a0h0Zdccs3IepNUXkdY?= =?us-ascii?Q?Kdo=2Fxe54HqwcNSufpeRferWqQCC7Tu4j3VYXjoX?= =?us-ascii?Q?mCMNHo6iMb1iri4cGfy3o2n1rCEimXkXtR08ZRL?= =?us-ascii?Q?7Wa1G=2FelGLVmFMdw1KJ14W8D68toRjsrfMMY1ZA?= =?us-ascii?Q?b4dmg4Vq2W+V8qP+0QgixppLoz4Jf+0ICgCoZj?= To: Joerg Roedel , Will Deacon , Robin Murphy , Heiko Stuebner , Benjamin Gaignard Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , Joerg Roedel X-Entity-ID: P7KYpSJvGCELWjBME/J5tg== Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The physical address to the directory table is currently encoded using the following bit layout for IOMMU v2. 31:12 - Address bit 31:0 11: 4 - Address bit 39:32 This is also the bit layout used by the vendor kernel. However, testing has shown that addresses to the directory/page tables and memory pages are all encoded using the same bit layout. IOMMU v1: 31:12 - Address bit 31:0 IOMMU v2: 31:12 - Address bit 31:0 11: 8 - Address bit 35:32 7: 4 - Address bit 39:36 Change to use the mk_dtentries ops to encode the directory table address correctly. The value written to DTE_ADDR may include the valid bit set, a bit that is ignored and DTE_ADDR reg read it back as 0. This also update the bit layout comment for the page address and the number of nybbles that are read back for DTE_ADDR comment. These changes render the dte_addr_phys and dma_addr_dte ops unused and is removed. Fixes: 227014b33f62 ("iommu: rockchip: Add internal ops to handle variants") Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") Fixes: c987b65a574f ("iommu/rockchip: Fix physical address decoding") Signed-off-by: Jonas Karlman Reviewed-by: Robin Murphy --- v3: - squash removal of unused ops into this patch - update commit message v2: - replace currently with correctly in commit message drivers/iommu/rockchip-iommu.c | 43 ++++------------------------------ 1 file changed, 5 insertions(+), 38 deletions(-) diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index 4054030c3237..ae42959bc490 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -98,8 +98,6 @@ struct rk_iommu_ops { phys_addr_t (*pt_address)(u32 dte); u32 (*mk_dtentries)(dma_addr_t pt_dma); u32 (*mk_ptentries)(phys_addr_t page, int prot); - phys_addr_t (*dte_addr_phys)(u32 addr); - u32 (*dma_addr_dte)(dma_addr_t dt_dma); u64 dma_bit_mask; }; =20 @@ -278,8 +276,8 @@ static u32 rk_mk_pte(phys_addr_t page, int prot) /* * In v2: * 31:12 - Page address bit 31:0 - * 11:9 - Page address bit 34:32 - * 8:4 - Page address bit 39:35 + * 11: 8 - Page address bit 35:32 + * 7: 4 - Page address bit 39:36 * 3 - Security * 2 - Writable * 1 - Readable @@ -506,7 +504,7 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu) =20 /* * Check if register DTE_ADDR is working by writing DTE_ADDR_DUMMY - * and verifying that upper 5 nybbles are read back. + * and verifying that upper 5 (v1) or 7 (v2) nybbles are read back. */ for (i =3D 0; i < iommu->num_mmu; i++) { dte_addr =3D rk_ops->pt_address(DTE_ADDR_DUMMY); @@ -531,33 +529,6 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu) return 0; } =20 -static inline phys_addr_t rk_dte_addr_phys(u32 addr) -{ - return (phys_addr_t)addr; -} - -static inline u32 rk_dma_addr_dte(dma_addr_t dt_dma) -{ - return dt_dma; -} - -#define DT_HI_MASK GENMASK_ULL(39, 32) -#define DTE_BASE_HI_MASK GENMASK(11, 4) -#define DT_SHIFT 28 - -static inline phys_addr_t rk_dte_addr_phys_v2(u32 addr) -{ - u64 addr64 =3D addr; - return (phys_addr_t)(addr64 & RK_DTE_PT_ADDRESS_MASK) | - ((addr64 & DTE_BASE_HI_MASK) << DT_SHIFT); -} - -static inline u32 rk_dma_addr_dte_v2(dma_addr_t dt_dma) -{ - return (dt_dma & RK_DTE_PT_ADDRESS_MASK) | - ((dt_dma & DT_HI_MASK) >> DT_SHIFT); -} - static void log_iova(struct rk_iommu *iommu, int index, dma_addr_t iova) { void __iomem *base =3D iommu->bases[index]; @@ -577,7 +548,7 @@ static void log_iova(struct rk_iommu *iommu, int index,= dma_addr_t iova) page_offset =3D rk_iova_page_offset(iova); =20 mmu_dte_addr =3D rk_iommu_read(base, RK_MMU_DTE_ADDR); - mmu_dte_addr_phys =3D rk_ops->dte_addr_phys(mmu_dte_addr); + mmu_dte_addr_phys =3D rk_ops->pt_address(mmu_dte_addr); =20 dte_addr_phys =3D mmu_dte_addr_phys + (4 * dte_index); dte_addr =3D phys_to_virt(dte_addr_phys); @@ -967,7 +938,7 @@ static int rk_iommu_enable(struct rk_iommu *iommu) =20 for (i =3D 0; i < iommu->num_mmu; i++) { rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, - rk_ops->dma_addr_dte(rk_domain->dt_dma)); + rk_ops->mk_dtentries(rk_domain->dt_dma)); rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE); rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, RK_MMU_IRQ_MASK); } @@ -1405,8 +1376,6 @@ static struct rk_iommu_ops iommu_data_ops_v1 =3D { .pt_address =3D &rk_dte_pt_address, .mk_dtentries =3D &rk_mk_dte, .mk_ptentries =3D &rk_mk_pte, - .dte_addr_phys =3D &rk_dte_addr_phys, - .dma_addr_dte =3D &rk_dma_addr_dte, .dma_bit_mask =3D DMA_BIT_MASK(32), }; =20 @@ -1414,8 +1383,6 @@ static struct rk_iommu_ops iommu_data_ops_v2 =3D { .pt_address =3D &rk_dte_pt_address_v2, .mk_dtentries =3D &rk_mk_dte_v2, .mk_ptentries =3D &rk_mk_pte_v2, - .dte_addr_phys =3D &rk_dte_addr_phys_v2, - .dma_addr_dte =3D &rk_dma_addr_dte_v2, .dma_bit_mask =3D DMA_BIT_MASK(40), }; =20 --=20 2.40.1 From nobody Fri Dec 19 22:07:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1057AEB64DB for ; Sat, 17 Jun 2023 18:26:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346458AbjFQS0B (ORCPT ); Sat, 17 Jun 2023 14:26:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346427AbjFQSZw (ORCPT ); Sat, 17 Jun 2023 14:25:52 -0400 Received: from s.wrqvtbkv.outbound-mail.sendgrid.net (s.wrqvtbkv.outbound-mail.sendgrid.net [149.72.123.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 281F919A0 for ; Sat, 17 Jun 2023 11:25:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=from:subject:in-reply-to:references:mime-version:to:cc: content-transfer-encoding:content-type:cc:content-type:from:subject:to; s=s1; bh=8prRfbE+6BMjBYkBg8J9q7EYZh9DJvA0OE++z4Z4keE=; b=ZhZMK7R6ej9z8VN1hjk9bVnrycXXqn/4jMsTTlNtagZhUsDaF/J22/omdiwDdlFybEzR Od9N8qcTvXYd4JAn/TmfPsP28WgwY6Pca4/aDvoaHYpldx0KBz1YeT6cF8rOO0xrztVNgL HPZcwfwxxfzMbzvnS3NQbv9m4900wbSaUQSIwe0xc/t0Y53+2+vxj455KZOoo0RCn7wtlE 8eB/TGw1ENXAIZ3HSFOHjwb/7dpcO9P1CUaEnD4Xtsqn111d0Hjv1phsUly3R96CvqfzBB BZjdKxKPNB1HFy8VmHriTHyMCBxS8/Slb/JIFuXr3qd7hUh+/Ayrc11h+dZE7jdA== Received: by filterdrecv-66949dbc98-556jz with SMTP id filterdrecv-66949dbc98-556jz-1-648DFAAA-23 2023-06-17 18:25:46.920953702 +0000 UTC m=+3264358.699757555 Received: from bionic.localdomain (unknown) by geopod-ismtpd-9 (SG) with ESMTP id bSTYm9X4SBijI0tVW31gnw Sat, 17 Jun 2023 18:25:46.700 +0000 (UTC) From: Jonas Karlman Subject: [PATCH v3 2/2] iommu: rockchip: Allocate tables from all available memory for IOMMU v2 Date: Sat, 17 Jun 2023 18:25:47 +0000 (UTC) Message-Id: <20230617182540.3091374-3-jonas@kwiboo.se> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230617182540.3091374-1-jonas@kwiboo.se> References: <20230617182540.3091374-1-jonas@kwiboo.se> MIME-Version: 1.0 X-SG-EID: =?us-ascii?Q?TdbjyGynYnRZWhH+7lKUQJL+ZxmxpowvO2O9SQF5CwCVrYgcwUXgU5DKUU3QxA?= =?us-ascii?Q?fZekEeQsTe+RrMu3cja6a0h6BI1m9mIfF17oGYg?= =?us-ascii?Q?zhIBYZRmTzhrjNczQSLhl6u7WvKsd+ZpARA1fE8?= =?us-ascii?Q?B3XOD8sCVjnurgnuXDQ1qBePWUajf=2F4w8UYS5wq?= =?us-ascii?Q?mf3pOo4RsYVQk9gjL8FyT8tfswBp5Va3Y3VuYnW?= =?us-ascii?Q?8fzgWg8px1QcOts0ALg7MXzXNIWfAqVWYDu6uw?= To: Joerg Roedel , Will Deacon , Robin Murphy , Heiko Stuebner Cc: Benjamin Gaignard , iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman X-Entity-ID: P7KYpSJvGCELWjBME/J5tg== Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" IOMMU v2 found in newer Rockchip SoCs, e.g. RK356x and RK3588, support placing directory and page tables in up to 40-bit addressable physical memory. Remove the use of GFP_DMA32 flag for IOMMU v2 now that the physical address to the directory table is correctly written to DTE_ADDR. Signed-off-by: Jonas Karlman Reviewed-by: Robin Murphy --- v3: - rework to only affect IOMMU v2 v2: - no change drivers/iommu/rockchip-iommu.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index ae42959bc490..8ff69fbf9f65 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -99,6 +99,7 @@ struct rk_iommu_ops { u32 (*mk_dtentries)(dma_addr_t pt_dma); u32 (*mk_ptentries)(phys_addr_t page, int prot); u64 dma_bit_mask; + gfp_t gfp_flags; }; =20 struct rk_iommu { @@ -727,7 +728,7 @@ static u32 *rk_dte_get_page_table(struct rk_iommu_domai= n *rk_domain, if (rk_dte_is_pt_valid(dte)) goto done; =20 - page_table =3D (u32 *)get_zeroed_page(GFP_ATOMIC | GFP_DMA32); + page_table =3D (u32 *)get_zeroed_page(GFP_ATOMIC | rk_ops->gfp_flags); if (!page_table) return ERR_PTR(-ENOMEM); =20 @@ -1076,7 +1077,7 @@ static struct iommu_domain *rk_iommu_domain_alloc(uns= igned type) * Each level1 (dt) and level2 (pt) table has 1024 4-byte entries. * Allocate one 4 KiB page for each table. */ - rk_domain->dt =3D (u32 *)get_zeroed_page(GFP_KERNEL | GFP_DMA32); + rk_domain->dt =3D (u32 *)get_zeroed_page(GFP_KERNEL | rk_ops->gfp_flags); if (!rk_domain->dt) goto err_free_domain; =20 @@ -1377,6 +1378,7 @@ static struct rk_iommu_ops iommu_data_ops_v1 =3D { .mk_dtentries =3D &rk_mk_dte, .mk_ptentries =3D &rk_mk_pte, .dma_bit_mask =3D DMA_BIT_MASK(32), + .gfp_flags =3D GFP_DMA32, }; =20 static struct rk_iommu_ops iommu_data_ops_v2 =3D { @@ -1384,6 +1386,7 @@ static struct rk_iommu_ops iommu_data_ops_v2 =3D { .mk_dtentries =3D &rk_mk_dte_v2, .mk_ptentries =3D &rk_mk_pte_v2, .dma_bit_mask =3D DMA_BIT_MASK(40), + .gfp_flags =3D 0, }; =20 static const struct of_device_id rk_iommu_dt_ids[] =3D { --=20 2.40.1