From nobody Fri Sep 20 16:38:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C3B3EB64D9 for ; Sat, 17 Jun 2023 06:27:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233169AbjFQG1L (ORCPT ); Sat, 17 Jun 2023 02:27:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229562AbjFQG1F (ORCPT ); Sat, 17 Jun 2023 02:27:05 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C896E5E; Fri, 16 Jun 2023 23:27:04 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-519c0ad1223so1933048a12.0; Fri, 16 Jun 2023 23:27:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686983222; x=1689575222; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5ETqwYFXP5yK+TdJrVYXjdQ9fA9ImE5ftxIHWarTd9o=; b=nHqrT9Mlkid+cur0QneFzCexGoIZbmibWBPkqs3PdPFkCbHzEGDi6tS3rW9MeMp7kA 6xj70Fb6CgxwR48B1T1mDcmIy/JyPiYywgIlFblOxFBGXAMhk5bMU6JG2tXv9npBCfCW UvAlPILreEnqyS/vzi8/O7fEfhIIZIy7uy6cW5FaB+ySGofd61lLaXTnacpYa4OgQQuN c7rr0LtUsM+J0HeVb1W7uLk2CnUSZgV2crmL7b7MXZ2jpUAYRkCcX96NByV4jQQWOdu7 HMw5meASQYoX/eebQ9I+wu0cApbRln6lktClpaz5G6ntgN/BbV6HTXS8uQ7dWqng+bcQ fI9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686983222; x=1689575222; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5ETqwYFXP5yK+TdJrVYXjdQ9fA9ImE5ftxIHWarTd9o=; b=auNaCyZfN+qL5L5pLpDtbFg9Fb6OvS70iIRxiXcsFTe+iaBO2TRVyztfdkMBH6eZyI LwQUaW/SjjWXRJQvKn+olSaXGG81jfUxKJ9Fef5kLNJn6ZxeuTDFDDYeSjNEFXcc2k7L RT+YVu5oBM1f13CGI1rbjyeQgk47ajplw4wVoYq9g7KMPPBU//jS+A7OkM8vzdmeZ6JM Hpe0PGGLt2f+d6dMSenRgvMt5LMUcXbjGcZN2+Gn/2HurSZrU/oX04GM5ca2tB/wyh6M s8Qt9JVEId1WVCUPqCLONOtS0EQqKQON3mbBQDwAUrTNhEwOkqm5MWi8x8TnBodZFnsX +e9Q== X-Gm-Message-State: AC+VfDwC+1PQgayrZCVH3uK7xmsRDwhc3BT2ZParG/bx0+4omYA0XmtB 5fCcOhWZiPHJY1W2LBqd7As= X-Google-Smtp-Source: ACHHUZ64/5pmb6uBvnL4fx+4nHvtRhpIfWy208CSYFEWvOTketFEdZ8wF29wkOF2XVlGxgs0tAvpAA== X-Received: by 2002:a05:6402:1496:b0:504:8929:71ca with SMTP id e22-20020a056402149600b00504892971camr2580162edv.6.1686983222257; Fri, 16 Jun 2023 23:27:02 -0700 (PDT) Received: from arinc9-PC.. ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id n6-20020a056402514600b0051a313a66e8sm1799638edd.45.2023.06.16.23.26.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 23:27:01 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Russell King , Landen Chao , Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net v6 1/6] net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP Date: Sat, 17 Jun 2023 09:26:44 +0300 Message-Id: <20230617062649.28444-2-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230617062649.28444-1-arinc.unal@arinc9.com> References: <20230617062649.28444-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU frames (further restricted by PCR_MATRIX). Currently the driver sets the first CPU port as the single port in this bit mask, which works fine regardless of whether the device tree defines port 5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's logic of picking the first CPU port as the CPU port that all user ports are affine to, by default. An upcoming change would like to influence DSA's selection of the default CPU port to no longer be the first one, and in that case, this logic needs adaptation. Since there is no observed leakage or duplication of frames if all CPU ports are defined in this bit mask, simply include them all. Suggested-by: Russell King (Oracle) Suggested-by: Vladimir Oltean Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Vladimir Oltean Reviewed-by: Russell King (Oracle) Reviewed-by: Florian Fainelli --- drivers/net/dsa/mt7530.c | 15 ++++++++------- drivers/net/dsa/mt7530.h | 1 + 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 9bc54e1348cb..f8503155f179 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1010,6 +1010,13 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int po= rt) if (priv->id =3D=3D ID_MT7621) mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); =20 + /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on + * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that + * is affine to the inbound user port. + */ + if (priv->id =3D=3D ID_MT7531 || priv->id =3D=3D ID_MT7988) + mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port))); + /* CPU port gets connected to all user ports of * the switch. */ @@ -2352,15 +2359,9 @@ static int mt7531_setup_common(struct dsa_switch *ds) { struct mt7530_priv *priv =3D ds->priv; - struct dsa_port *cpu_dp; int ret, i; =20 - /* BPDU to CPU port */ - dsa_switch_for_each_cpu_port(cpu_dp, ds) { - mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK, - BIT(cpu_dp->index)); - break; - } + /* Trap BPDUs to the CPU port(s) */ mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, MT753X_BPDU_CPU_ONLY); =20 diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 5084f48a8869..e590cf43f3ae 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -54,6 +54,7 @@ enum mt753x_id { #define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK) #define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16) #define MT7531_CPU_PMAP_MASK GENMASK(7, 0) +#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x) =20 #define MT753X_MIRROR_REG(id) ((((id) =3D=3D ID_MT7531) || ((id) =3D=3D I= D_MT7988)) ? \ MT7531_CFC : MT7530_MFC) --=20 2.39.2 From nobody Fri Sep 20 16:38:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D9F5EB64DA for ; Sat, 17 Jun 2023 06:27:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231292AbjFQG1P (ORCPT ); Sat, 17 Jun 2023 02:27:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233135AbjFQG1H (ORCPT ); Sat, 17 Jun 2023 02:27:07 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1BB5E66; Fri, 16 Jun 2023 23:27:06 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-51a200fc3eeso2073379a12.3; Fri, 16 Jun 2023 23:27:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686983225; x=1689575225; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=d0TmHFX5MJGKVziIQt0gsGjAnYc/wjRnba9gkrJwLog=; b=ddplcb92+TtA1iBNeeDDBppuGzqMrRkcBbQJBV2l6Yx+1RADclXjZapDeaFOjqpKN7 KpVp7I+8ML7xWVAgdFVn5j1lgd55ASElBrFotnUBQAMwhOxtClLfzjmwIBJIfgQbdOei zsabOmlWRXN45AGctCr4uttlS9IrXVsfokuL/o0sfy7A1CeQkW/flo8ePdFG2qXRJSo8 rOZ3ntnD1pDEManpsfEMXWjn4/bkF/WHTvoCPjmR2BxaqQ8FeEPNsLzv20tz1RRzTFUP sG6D/zqF23Yd5LBqa8TXAqq38uRYaxAq4LZJSOv2v1L77kmgITGHmV09WHAp2yduC5Zy +LeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686983225; x=1689575225; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=d0TmHFX5MJGKVziIQt0gsGjAnYc/wjRnba9gkrJwLog=; b=d2Ak7BaxSlIZWKdoxy8DmbB07lWc5TnRMFcA7IRDFqsYIZXmgW+8FBg4IFOyRnMJJu qEI4FIEKXEWdv68Gl2Uh/4VDmgvPpkxBDF1JYRH+Pc9FbodBhYWJ3sfr1YT/tilynNLS 3GD2r2QDuHtfAsz75WDVT+JS4wsPIGFa8KS/r0qAKysvBYUmgYiSwRGykssm07F+H9vb 3+FxDHErJeMFpks1h15AkJxzEtoLeD+2dcrSZk3wMW6cfrgzCd4UJ4DtQ+mxISHMaTr4 d81XuezUbz1lIQxv2jteURRax+8nDsg6myDE47RNHXH88aqHj/PSLC4EUPE5ousoupL8 FjlQ== X-Gm-Message-State: AC+VfDx9vz4plo++CQ83rBNmlePbfszS9JE6FVivLGgdshEv35kDQalA C5I5T6hyOv1pR8QjBbtyHAE= X-Google-Smtp-Source: ACHHUZ68Uj9Tfc9FKIpyHXL7KyLXD9DxuetacXrrVOugCWOATvVu6VPJ2mJU/wvTm6oqO1Wp3x6ZIg== X-Received: by 2002:aa7:d912:0:b0:51a:3e94:b567 with SMTP id a18-20020aa7d912000000b0051a3e94b567mr2551978edr.11.1686983225191; Fri, 16 Jun 2023 23:27:05 -0700 (PDT) Received: from arinc9-PC.. ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id n6-20020a056402514600b0051a313a66e8sm1799638edd.45.2023.06.16.23.27.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 23:27:04 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Landen Chao , Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net v6 2/6] net: dsa: mt7530: fix trapping frames on non-MT7621 SoC MT7530 switch Date: Sat, 17 Jun 2023 09:26:45 +0300 Message-Id: <20230617062649.28444-3-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230617062649.28444-1-arinc.unal@arinc9.com> References: <20230617062649.28444-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL All MT7530 switch IP variants share the MT7530_MFC register, but the current driver only writes it for the switch variant that is integrated in the MT7621 SoC. Modify the code to include all MT7530 derivatives. Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 sw= itch") Suggested-by: Vladimir Oltean Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Vladimir Oltean Reviewed-by: Florian Fainelli Reviewed-by: Russell King (Oracle) --- drivers/net/dsa/mt7530.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index f8503155f179..8c9acf109a4e 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1007,7 +1007,7 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int por= t) UNU_FFP(BIT(port))); =20 /* Set CPU port number */ - if (priv->id =3D=3D ID_MT7621) + if (priv->id =3D=3D ID_MT7530 || priv->id =3D=3D ID_MT7621) mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); =20 /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on --=20 2.39.2 From nobody Fri Sep 20 16:38:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BF13EB64DA for ; Sat, 17 Jun 2023 06:27:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233135AbjFQG1W (ORCPT ); Sat, 17 Jun 2023 02:27:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233450AbjFQG1K (ORCPT ); Sat, 17 Jun 2023 02:27:10 -0400 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A026CE66; Fri, 16 Jun 2023 23:27:09 -0700 (PDT) Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-51a270e4d57so2114760a12.3; Fri, 16 Jun 2023 23:27:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686983228; x=1689575228; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=k5fN3EkFghwlzEiC3xrHYKgc695PJWNEMXB0KcT9YJw=; b=WaIs+3+81vr1zsFAegdIECwEy3rUepcmk8CbeKzMxvTBRDxoEXE8tgh4D0UU2bsKSb 9tlajdHoAn7fmMWiENSw02lGwGyBaLfbq3HTfG+lejGruNai6BcvwFBGh19igaNY0rym AS4n3W1BfhP8nDiAldXC+yBw+5CbiXT0oyIRibqkyx1lz/Q3yxPvwNa56y8IVf005pV7 N98GO8vZ3CGw/5l0SUQuBa3XRkGad+qx9SDRuhl7NiF9+MB0WGDUH0BWOTU4D0ljURXt WG7gEawtpT7Ozdj7sv4ORXau/bdWtIWSiE4E4t1dmm1zCAL4Ju0Rlvv/x8SicMTJpMdu tiKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686983228; x=1689575228; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=k5fN3EkFghwlzEiC3xrHYKgc695PJWNEMXB0KcT9YJw=; b=jkDUECa3vpxINKhabGCZf0oxm6YR/JEsklBzwa+NB0hxgOCKy22O8KwJiL2KO1XtsX r49X5FZEiEr85+7iQq9Nf3UpVP5CTeCVrIxmlFnjq3M81mUkkxdWRYl3PWNHdJUVD/i6 /zLUAhACVyb8ft6iFgh6D/sTrE2gIXU6IymkNzUy1Nm+IFGcGWTD8Ge0RAMC9t9htP60 o4HIYmGCEluwAokJVUvy0lupS7rub3qyWDhyc80KXAucxZlB9Cvoi06K9EjRKb8qKXWF ILw6cettWQ7FXjvDJhcVPVWGhQbItusbWZ9873ZFK6HYjA025zYbAVOopGCLHHHaFU5Z XSNQ== X-Gm-Message-State: AC+VfDwCfqHV+8IPH5rmotCuj5FsyxdxSbOrMI7Bh9HdXundTksfXCsr QQf5LzkR5Ozg81FoyUoY10boi6FC+HdWXmMY X-Google-Smtp-Source: ACHHUZ4zPj3j+dn7OU0YBDZ7fQBf4NLJ6n6rTnKf1MOCJHcwkPkHARayhhHP+DNG2EwpCrt1IGRZ7g== X-Received: by 2002:aa7:c3da:0:b0:518:7902:d244 with SMTP id l26-20020aa7c3da000000b005187902d244mr2728423edr.6.1686983228095; Fri, 16 Jun 2023 23:27:08 -0700 (PDT) Received: from arinc9-PC.. ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id n6-20020a056402514600b0051a313a66e8sm1799638edd.45.2023.06.16.23.27.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 23:27:07 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Landen Chao , Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net v6 3/6] net: dsa: mt7530: fix handling of BPDUs on MT7530 switch Date: Sat, 17 Jun 2023 09:26:46 +0300 Message-Id: <20230617062649.28444-4-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230617062649.28444-1-arinc.unal@arinc9.com> References: <20230617062649.28444-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL BPDUs are link-local frames, therefore they must be trapped to the CPU port. Currently, the MT7530 switch treats BPDUs as regular multicast frames, therefore flooding them to user ports. To fix this, set BPDUs to be trapped to the CPU port. Group this on mt7530_setup() and mt7531_setup_common() into mt753x_trap_frames() and call that. Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 sw= itch") Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Florian Fainelli Reviewed-by: Russell King (Oracle) Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 8c9acf109a4e..5e4f6965cebd 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -985,6 +985,14 @@ static void mt7530_setup_port5(struct dsa_switch *ds, = phy_interface_t interface) mutex_unlock(&priv->reg_mutex); } =20 +static void +mt753x_trap_frames(struct mt7530_priv *priv) +{ + /* Trap BPDUs to the CPU port(s) */ + mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, + MT753X_BPDU_CPU_ONLY); +} + static int mt753x_cpu_port_enable(struct dsa_switch *ds, int port) { @@ -2262,6 +2270,8 @@ mt7530_setup(struct dsa_switch *ds) =20 priv->p6_interface =3D PHY_INTERFACE_MODE_NA; =20 + mt753x_trap_frames(priv); + /* Enable and reset MIB counters */ mt7530_mib_reset(ds); =20 @@ -2361,9 +2371,7 @@ mt7531_setup_common(struct dsa_switch *ds) struct mt7530_priv *priv =3D ds->priv; int ret, i; =20 - /* Trap BPDUs to the CPU port(s) */ - mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, - MT753X_BPDU_CPU_ONLY); + mt753x_trap_frames(priv); =20 /* Enable and reset MIB counters */ mt7530_mib_reset(ds); --=20 2.39.2 From nobody Fri Sep 20 16:38:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8546BEB64D9 for ; Sat, 17 Jun 2023 06:27:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232513AbjFQG11 (ORCPT ); Sat, 17 Jun 2023 02:27:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233662AbjFQG1O (ORCPT ); Sat, 17 Jun 2023 02:27:14 -0400 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEF671BC9; Fri, 16 Jun 2023 23:27:12 -0700 (PDT) Received: by mail-ej1-x62d.google.com with SMTP id a640c23a62f3a-970028cfb6cso230701266b.1; Fri, 16 Jun 2023 23:27:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686983231; x=1689575231; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OzUSkHsCSsJmBb6bzGF4ZwyaQhgjnGKQWYEkiJxrxaM=; b=rYi/RtSyLqy5bWLqGt0ua8fuOhEhe8K7JBEXGi9K32coh6Vyow3MwESyU4oYq4U/Or 2Uzdp6WX0f+qifPKKJqkkatcGM87eJBslx85vBKgiWwSzczCJZfbqzfbdFrEPWPcXEaA rYVQuqly74HU9tEmc7vMKkCxK24fPw7GcMKJL4IUCdQ6dbp22HHWgcX7ksI4qSyf4lIi vpz8xqE5bLl4gYJxcWcUXER0zcl3tAE0iXkBLlDl5g4i6bH9FC24no7NLVYuf07iac/I nNzRhFFyqXfPxZlNZrZKCpp34tQ3DEWpVYfeI6LNNb51N5+4Tmrh68KYWfzb6Q4Unbhq Yq5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686983231; x=1689575231; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OzUSkHsCSsJmBb6bzGF4ZwyaQhgjnGKQWYEkiJxrxaM=; b=bsuFgmAQnHFN6gDF4Ipz5PvDMZ4rCo1zZ2B9o7/SVUa9yPmQyxHQL+IjV0FQo+pkc+ TpbJSHEOAtIxuxXaEQZoyYANH4r6cKCA5HKYygwFRRH+DTHUK+uL0ZcL1x3VevATFhOQ ABIxBXBWzp+vhGxCTOH14eSk4PJMY7nXjJTVkT7ZkAJKpP7o1RfhJEP6605fC3BgpDzW n08oxN+drbEWZiG0B4ipRzfd2cvyTjfDwfcjGvBT+9Uws2X8/aejO2U8ZphKCNNb5YxK g2m5o5lsFbq80zAR+Iy7Ic+FlV5IoTBWwSsufNIWeC8sd2SElB+rIVBA5bJU4d9S72LB tKJg== X-Gm-Message-State: AC+VfDxuYzTd5I5rgj6bomlwhKIvE8tvbfPsAwysenFfR9SzrMxlDRFW 5nCxNkCwWeSvJMSu1dP/5Y4= X-Google-Smtp-Source: ACHHUZ4mu9ZC+w/4oUQSxU3JhJ2Q5DNpED7Z8RdUfHgaWnIgkiFZ49jbu/IdKY2HZnYFIIK1MHECxA== X-Received: by 2002:a17:907:9621:b0:982:26c4:e4b0 with SMTP id gb33-20020a170907962100b0098226c4e4b0mr5446197ejc.6.1686983231304; Fri, 16 Jun 2023 23:27:11 -0700 (PDT) Received: from arinc9-PC.. ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id n6-20020a056402514600b0051a313a66e8sm1799638edd.45.2023.06.16.23.27.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 23:27:10 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Landen Chao , Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net v6 4/6] net: dsa: mt7530: fix handling of LLDP frames Date: Sat, 17 Jun 2023 09:26:47 +0300 Message-Id: <20230617062649.28444-5-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230617062649.28444-1-arinc.unal@arinc9.com> References: <20230617062649.28444-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL LLDP frames are link-local frames, therefore they must be trapped to the CPU port. Currently, the MT753X switches treat LLDP frames as regular multicast frames, therefore flooding them to user ports. To fix this, set LLDP frames to be trapped to the CPU port(s). Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 sw= itch") Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Florian Fainelli Reviewed-by: Russell King (Oracle) Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 4 ++++ drivers/net/dsa/mt7530.h | 5 +++++ 2 files changed, 9 insertions(+) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 5e4f6965cebd..6d6ff293900c 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -991,6 +991,10 @@ mt753x_trap_frames(struct mt7530_priv *priv) /* Trap BPDUs to the CPU port(s) */ mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, MT753X_BPDU_CPU_ONLY); + + /* Trap LLDP frames with :0E MAC DA to the CPU port(s) */ + mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_PORT_FW_MASK, + MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY)); } =20 static int diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index e590cf43f3ae..08045b035e6a 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -67,6 +67,11 @@ enum mt753x_id { #define MT753X_BPC 0x24 #define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0) =20 +/* Register for :03 and :0E MAC DA frame control */ +#define MT753X_RGAC2 0x2c +#define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16) +#define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x) + enum mt753x_bpdu_port_fw { MT753X_BPDU_FOLLOW_MFC, MT753X_BPDU_CPU_EXCLUDE =3D 4, --=20 2.39.2 From nobody Fri Sep 20 16:38:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FBEDEB64DA for ; Sat, 17 Jun 2023 06:27:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233704AbjFQG1t (ORCPT ); Sat, 17 Jun 2023 02:27:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232158AbjFQG13 (ORCPT ); Sat, 17 Jun 2023 02:27:29 -0400 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2E352944; Fri, 16 Jun 2023 23:27:15 -0700 (PDT) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-5149aafef44so1812679a12.0; Fri, 16 Jun 2023 23:27:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686983234; x=1689575234; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lqI5cDNIBrR7/E1b9DJiMzHshDJxsDxbovF+U9PzMxY=; b=mpGppwvDLkeIjNLePaZUluQoHEzO2ftl9pUqB22Lz1CQQn6hWsEcnXkPXMiWXAyYej 2GhyH0iIW+zQhiBjAqzdTQoopX+v7h55nuXQqq+Vck+++UFOhQheYz29JIcG8Ti81kYu RPObSvJS1b775jB7TZyMYqW5EahpWNzG9jatUa2298n4sX96/rOkauoTrhrmIA7MrUyw /jEsAXkZEYklmOSauZbxicnno93gLWDPSU55h6Hkv/4lSG1/c7dwMvgF5nHeo4MZxODc YgaunI26l1p9H2lRbYjwke3dk9eEgJlme0zbUicNWs986z9rA1FI7wCujbw2yerSxmNs 4Ybw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686983234; x=1689575234; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lqI5cDNIBrR7/E1b9DJiMzHshDJxsDxbovF+U9PzMxY=; b=UmjXfsbzA2TaZfjOt0ZSGXP1t0LYYBehIF/TgjW5kGOei+5knelLZKAP3yuSm8XzHY evC1SDnOgDz++5feASxpwOiX7ZmDMdLDszw+OY/iQNdK0ljcOW/4hRwEC1XwdtvQ28m5 wF9w0vsRgSKTMwamM9gtQkoR7LrXku+Y4dk8u+Srai1SNxJvMNicheu55uqeIhxd50+j MNXmyFIf3cR6F3TM0/e2bUeoeY4YeRJrHvFqen7dT5HA7L3+wPysjIKgAO4MMm+w7c83 VPombCVdu6LU3xNkipnV7Y1awz0256kGXZ1J6GG9tqSHteuowQs+MWY1CXBdMhdzTMak Zwgg== X-Gm-Message-State: AC+VfDxVQ5tJSXCs7Nn1Ox93s2RIrA94usL43WGoR2UnjXQOXHfMHH1b 8yWp/nsus/tWyDrolUyyvMs= X-Google-Smtp-Source: ACHHUZ5Bgvkbw4mpHWqksFxYjlxmzvGH8wXj7lV7woGVuvHFAVri5tH4T3IDda4YcNyroJ5rZLkf8g== X-Received: by 2002:aa7:da96:0:b0:514:a0a7:7e7d with SMTP id q22-20020aa7da96000000b00514a0a77e7dmr2922329eds.1.1686983234200; Fri, 16 Jun 2023 23:27:14 -0700 (PDT) Received: from arinc9-PC.. ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id n6-20020a056402514600b0051a313a66e8sm1799638edd.45.2023.06.16.23.27.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 23:27:13 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Landen Chao , Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net v6 5/6] net: dsa: introduce preferred_default_local_cpu_port and use on MT7530 Date: Sat, 17 Jun 2023 09:26:48 +0300 Message-Id: <20230617062649.28444-6-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230617062649.28444-1-arinc.unal@arinc9.com> References: <20230617062649.28444-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vladimir Oltean Since the introduction of the OF bindings, DSA has always had a policy that in case multiple CPU ports are present in the device tree, the numerically smallest one is always chosen. The MT7530 switch family, except the switch on the MT7988 SoC, has 2 CPU ports, 5 and 6, where port 6 is preferable on the MT7531BE switch because it has higher bandwidth. The MT7530 driver developers had 3 options: - to modify DSA when the MT7531 switch support was introduced, such as to prefer the better port - to declare both CPU ports in device trees as CPU ports, and live with the sub-optimal performance resulting from not preferring the better port - to declare just port 6 in the device tree as a CPU port Of course they chose the path of least resistance (3rd option), kicking the can down the road. The hardware description in the device tree is supposed to be stable - developers are not supposed to adopt the strategy of piecemeal hardware description, where the device tree is updated in lockstep with the features that the kernel currently supports. Now, as a result of the fact that they did that, any attempts to modify the device tree and describe both CPU ports as CPU ports would make DSA change its default selection from port 6 to 5, effectively resulting in a performance degradation visible to users with the MT7531BE switch as can be seen below. Without preferring port 6: [ ID][Role] Interval Transfer Bitrate Retr [ 5][TX-C] 0.00-20.00 sec 374 MBytes 157 Mbits/sec 734 sender [ 5][TX-C] 0.00-20.00 sec 373 MBytes 156 Mbits/sec receiver [ 7][RX-C] 0.00-20.00 sec 1.81 GBytes 778 Mbits/sec 0 sender [ 7][RX-C] 0.00-20.00 sec 1.81 GBytes 777 Mbits/sec receiver With preferring port 6: [ ID][Role] Interval Transfer Bitrate Retr [ 5][TX-C] 0.00-20.00 sec 1.99 GBytes 856 Mbits/sec 273 sender [ 5][TX-C] 0.00-20.00 sec 1.99 GBytes 855 Mbits/sec receiver [ 7][RX-C] 0.00-20.00 sec 1.72 GBytes 737 Mbits/sec 15 sender [ 7][RX-C] 0.00-20.00 sec 1.71 GBytes 736 Mbits/sec receiver Using one port for WAN and the other ports for LAN is a very popular use case which is what this test emulates. As such, this change proposes that we retroactively modify stable kernels (which don't support the modification of the CPU port assignments, so as to let user space fix the problem and restore the throughput) to keep the mt7530 driver preferring port 6 even with device trees where the hardware is more fully described. Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") Signed-off-by: Vladimir Oltean Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Florian Fainelli Reviewed-by: Russell King (Oracle) --- drivers/net/dsa/mt7530.c | 15 +++++++++++++++ include/net/dsa.h | 8 ++++++++ net/dsa/dsa.c | 24 +++++++++++++++++++++++- 3 files changed, 46 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 6d6ff293900c..7e773c4ba046 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -399,6 +399,20 @@ static void mt7530_pll_setup(struct mt7530_priv *priv) core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN); } =20 +/* If port 6 is available as a CPU port, always prefer that as the default, + * otherwise don't care. + */ +static struct dsa_port * +mt753x_preferred_default_local_cpu_port(struct dsa_switch *ds) +{ + struct dsa_port *cpu_dp =3D dsa_to_port(ds, 6); + + if (dsa_port_is_cpu(cpu_dp)) + return cpu_dp; + + return NULL; +} + /* Setup port 6 interface mode and TRGMII TX circuit */ static int mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) @@ -3098,6 +3112,7 @@ static int mt7988_setup(struct dsa_switch *ds) const struct dsa_switch_ops mt7530_switch_ops =3D { .get_tag_protocol =3D mtk_get_tag_protocol, .setup =3D mt753x_setup, + .preferred_default_local_cpu_port =3D mt753x_preferred_default_local_cpu_= port, .get_strings =3D mt7530_get_strings, .get_ethtool_stats =3D mt7530_get_ethtool_stats, .get_sset_count =3D mt7530_get_sset_count, diff --git a/include/net/dsa.h b/include/net/dsa.h index 8903053fa5aa..ab0f0a5b0860 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -958,6 +958,14 @@ struct dsa_switch_ops { struct phy_device *phy); void (*port_disable)(struct dsa_switch *ds, int port); =20 + /* + * Compatibility between device trees defining multiple CPU ports and + * drivers which are not OK to use by default the numerically smallest + * CPU port of a switch for its local ports. This can return NULL, + * meaning "don't know/don't care". + */ + struct dsa_port *(*preferred_default_local_cpu_port)(struct dsa_switch *d= s); + /* * Port's MAC EEE settings */ diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c index ab1afe67fd18..1afed89e03c0 100644 --- a/net/dsa/dsa.c +++ b/net/dsa/dsa.c @@ -403,6 +403,24 @@ static int dsa_tree_setup_default_cpu(struct dsa_switc= h_tree *dst) return 0; } =20 +static struct dsa_port * +dsa_switch_preferred_default_local_cpu_port(struct dsa_switch *ds) +{ + struct dsa_port *cpu_dp; + + if (!ds->ops->preferred_default_local_cpu_port) + return NULL; + + cpu_dp =3D ds->ops->preferred_default_local_cpu_port(ds); + if (!cpu_dp) + return NULL; + + if (WARN_ON(!dsa_port_is_cpu(cpu_dp) || cpu_dp->ds !=3D ds)) + return NULL; + + return cpu_dp; +} + /* Perform initial assignment of CPU ports to user ports and DSA links in = the * fabric, giving preference to CPU ports local to each switch. Default to * using the first CPU port in the switch tree if the port does not have a= CPU @@ -410,12 +428,16 @@ static int dsa_tree_setup_default_cpu(struct dsa_swit= ch_tree *dst) */ static int dsa_tree_setup_cpu_ports(struct dsa_switch_tree *dst) { - struct dsa_port *cpu_dp, *dp; + struct dsa_port *preferred_cpu_dp, *cpu_dp, *dp; =20 list_for_each_entry(cpu_dp, &dst->ports, list) { if (!dsa_port_is_cpu(cpu_dp)) continue; =20 + preferred_cpu_dp =3D dsa_switch_preferred_default_local_cpu_port(cpu_dp-= >ds); + if (preferred_cpu_dp && preferred_cpu_dp !=3D cpu_dp) + continue; + /* Prefer a local CPU port */ dsa_switch_for_each_port(dp, cpu_dp->ds) { /* Prefer the first local CPU port found */ --=20 2.39.2 From nobody Fri Sep 20 16:38:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5FD7EB64D9 for ; Sat, 17 Jun 2023 06:28:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234112AbjFQG2K (ORCPT ); Sat, 17 Jun 2023 02:28:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233973AbjFQG1r (ORCPT ); Sat, 17 Jun 2023 02:27:47 -0400 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCEFFE66; Fri, 16 Jun 2023 23:27:18 -0700 (PDT) Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-51a2c60c529so1910064a12.3; Fri, 16 Jun 2023 23:27:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686983237; x=1689575237; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AIVXF0NWT+mxXgpNldoq9Ep8Ze5GWaI0IQCYTwDNGis=; b=hMBy/DBGMMhKjgj4TvwZGAL6qHd6IBXDB3RDWrOdOSy+rj/i9cPRGEqtOlYC3JsZBh 5+yU+K4HJ8jIrYvzovdn8DDvzEX3N5yemPVyhdzG9TDH+0ym9tppqwZRtw4B69X05g9f 81szHbTxo+P0zKLrdq7STupOPzGA3mFskVZ7M66uwXRq3MqR9WnLpnZwvnLYiScvlEbE xiNoaxR55FHW6aQvvtBOah9pmuHrvEZgLiWV0x+JIo5Hc84GF/BlL2RY1pNR83nlMzH0 C+CCporkgq6zO++bOwNtbCPPBP9wrkHJvN0q8RP38tswYG4vXVSK70hGb+ZMEXHjEgBs 9PHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686983237; x=1689575237; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AIVXF0NWT+mxXgpNldoq9Ep8Ze5GWaI0IQCYTwDNGis=; b=NLKt/qsgrcY5opQ3o+1DYITZ0dPDE50L4aGnv0Jnijv2KtISiDqKb05Rwh36q6clSf 36M1dYmEF+TX83hKatTGjSscgPLk9L3TsylgOo2VURl2QGXE7O3q5kbpNSr7GPlTeYYn rr8D94S8DM0/cZfB9+OPRp2G++1SaP+tPgJt9WENIx9c3e/dTG/cQvWv1gTdmRkgM0hn P3uav1VtdUk5KQMeE/5xDAhnJQkd4EVzHgFzMSYXe7lRcbCsQtN7vOvpuktQohggc92v VDsUSiLVQDhob7Bl5+1NDhgvlQ0B8oRyL0WOpAY42kib28ukqWWifsdHCHfO00jYMIku ghdg== X-Gm-Message-State: AC+VfDxTA4UrX4E4DYIQrt+9cZhkYYMYNktrQWk9FRJ+ETelJCJxeEdT qEvOYrjRMImIRruvp1ntWiU= X-Google-Smtp-Source: ACHHUZ5AWBGrll0vvLcPazt97hroaD4i3taa1f8HY5D2SOh6aex4tQMbuG8SSe5+r0QCoqQHZtUoIQ== X-Received: by 2002:a17:906:fe0e:b0:96f:f19b:887a with SMTP id wy14-20020a170906fe0e00b0096ff19b887amr3628004ejb.56.1686983237211; Fri, 16 Jun 2023 23:27:17 -0700 (PDT) Received: from arinc9-PC.. ([149.91.1.15]) by smtp.gmail.com with ESMTPSA id n6-20020a056402514600b0051a313a66e8sm1799638edd.45.2023.06.16.23.27.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jun 2023 23:27:16 -0700 (PDT) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: Landen Chao , Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net v6 6/6] MAINTAINERS: add me as maintainer of MEDIATEK SWITCH DRIVER Date: Sat, 17 Jun 2023 09:26:49 +0300 Message-Id: <20230617062649.28444-7-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230617062649.28444-1-arinc.unal@arinc9.com> References: <20230617062649.28444-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ar=C4=B1n=C3=A7 =C3=9CNAL Add me as a maintainer of the MediaTek MT7530 DSA subdriver. List maintainers in alphabetical order by first name. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Vladimir Oltean Reviewed-by: Florian Fainelli Reviewed-by: Matthias Brugger --- MAINTAINERS | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index a73e5a98503a..c58d7fbb40ed 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13259,10 +13259,11 @@ F: drivers/memory/mtk-smi.c F: include/soc/mediatek/smi.h =20 MEDIATEK SWITCH DRIVER -M: Sean Wang +M: Ar=C4=B1n=C3=A7 =C3=9CNAL +M: Daniel Golle M: Landen Chao M: DENG Qingfang -M: Daniel Golle +M: Sean Wang L: netdev@vger.kernel.org S: Maintained F: drivers/net/dsa/mt7530-mdio.c --=20 2.39.2