From nobody Tue Feb 10 19:16:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28CE3EB64D7 for ; Fri, 16 Jun 2023 10:06:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244747AbjFPKGM (ORCPT ); Fri, 16 Jun 2023 06:06:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233955AbjFPKFn (ORCPT ); Fri, 16 Jun 2023 06:05:43 -0400 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB2C02D6A; Fri, 16 Jun 2023 03:05:41 -0700 (PDT) X-GND-Sasl: alexis.lothore@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1686909940; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t2Z5u2pdOFyGeWrHTpiauz2Y6DQCmtBj67ZZlH6r9Yw=; b=VlB+mmJ2KMVQ8xlzcP3HMRvb5AeWgOC78aVXaAdm09rhishVYbGo+PWKobqI3HDIUmYt2g 9H26shu1MISdr0Dia4H4wI2xmUuJX6x7PfTBr6o7bwSKeqNcq+SjtLTaIuzTSDGJiV2CTc eMZtWGVB03cIOL/+zTHKONDW9IVPnQ2JXqMX7Sh8ngeoZVSBwebjDYE/5hFvPuQ9kypHdO Gr0yiCKawtD8wSSvJjkdLmo0WZc6XL1ODdy2i94C7PBAt9Y19PpLySKigSUxM74dGF6eSn XWBgVNi/8rf6CjbYOie1iT5GEko7xJWXEPVqJQsGNDkOdydVBmyZKLTNTdEXEg== X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com X-GND-Sasl: alexis.lothore@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 70DAC20014; Fri, 16 Jun 2023 10:05:39 +0000 (UTC) From: alexis.lothore@bootlin.com To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Thomas Petazzoni , Nicolas Carrier Subject: [PATCH net-next 8/8] net: stmmac: enable timestamp external trigger for dwmac1000 Date: Fri, 16 Jun 2023 12:04:09 +0200 Message-ID: <20230616100409.164583-9-alexis.lothore@bootlin.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230616100409.164583-1-alexis.lothore@bootlin.com> References: <20230616100409.164583-1-alexis.lothore@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alexis Lothor=C3=A9 The code is pretty similar to dwmac4 snapshot external trigger code. The difference is mostly about used registers addresses and/or bits offset in registers Signed-off-by: Alexis Lothor=C3=A9 --- .../ethernet/stmicro/stmmac/dwmac-socfpga.c | 2 + .../net/ethernet/stmicro/stmmac/dwmac1000.h | 12 ++- .../ethernet/stmicro/stmmac/dwmac1000_core.c | 83 +++++++++++++++++++ 3 files changed, 95 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/= net/ethernet/stmicro/stmmac/dwmac-socfpga.c index 6267bcb60206..98f5413cefee 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c @@ -17,6 +17,7 @@ =20 #include "stmmac.h" #include "stmmac_platform.h" +#include "dwmac1000.h" =20 #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0 #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1 @@ -428,6 +429,7 @@ static int socfpga_dwmac_probe(struct platform_device *= pdev) dwmac->ops =3D ops; plat_dat->bsp_priv =3D dwmac; plat_dat->fix_mac_speed =3D socfpga_dwmac_fix_mac_speed; + plat_dat->ext_snapshot_num =3D GMAC_TC_ATSEN0; =20 ret =3D stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); if (ret) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/= ethernet/stmicro/stmmac/dwmac1000.h index 4296ddda8aaa..d17929ea63e0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h @@ -41,8 +41,7 @@ #define GMAC_INT_DISABLE_PCS (GMAC_INT_DISABLE_RGMII | \ GMAC_INT_DISABLE_PCSLINK | \ GMAC_INT_DISABLE_PCSAN) -#define GMAC_INT_DEFAULT_MASK (GMAC_INT_DISABLE_TIMESTAMP | \ - GMAC_INT_DISABLE_PCS) +#define GMAC_INT_DEFAULT_MASK GMAC_INT_DISABLE_PCS =20 /* PMT Control and Status */ #define GMAC_PMT 0x0000002c @@ -329,5 +328,14 @@ enum rtc_control { #define GMAC_MMC_RX_CSUM_OFFLOAD 0x208 #define GMAC_EXTHASH_BASE 0x500 =20 +/* Timestamping registers */ +#define GMAC_TIMESTAMP_C0NTROL 0x00000700 +#define GMAC_TC_ATSFC BIT(24) +#define GMAC_TC_ATSEN0 BIT(25) +#define GMAC_TIMESTAMP_STATUS 0x00000728 +#define GMAC_AT_NS 0x00000730 +#define GMAC_AT_NS_MASK 0x7FFFFFFF +#define GMAC_AT_S 0x00000734 + extern const struct stmmac_dma_ops dwmac1000_dma_ops; #endif /* __DWMAC1000_H__ */ diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers= /net/ethernet/stmicro/stmmac/dwmac1000_core.c index 3927609abc44..97d94b009014 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c @@ -19,6 +19,7 @@ #include "stmmac.h" #include "stmmac_pcs.h" #include "dwmac1000.h" +#include "stmmac_ptp.h" =20 static void dwmac1000_core_init(struct mac_device_info *hw, struct net_device *dev) @@ -294,9 +295,58 @@ static void dwmac1000_rgsmii(void __iomem *ioaddr, str= uct stmmac_extra_stats *x) } } =20 +static void get_ptptime(void __iomem *ioaddr, u64 *ptp_time) +{ + u64 ns; + + ns =3D (readl(ioaddr + GMAC_AT_NS) & GMAC_AT_NS_MASK); + *ptp_time =3D ns; + ns =3D readl(ioaddr + GMAC_AT_S); + *ptp_time +=3D ns * NSEC_PER_SEC; +} + +static void dwmac1000_ptp_isr(struct stmmac_priv *priv) +{ + struct ptp_clock_event event; + u32 status_reg, num_snapshot; + unsigned long flags; + u64 ptp_time; + int i =3D 0; + + if (priv->plat->int_snapshot_en) { + wake_up(&priv->tstamp_busy_wait); + return; + } + + /* Read timestamp status to clear interrupt from either external + * timestamp or start/end of PPS. + */ + status_reg =3D readl(priv->ioaddr + GMAC_TIMESTAMP_STATUS); + + if (!priv->plat->ext_snapshot_en) + return; + + num_snapshot =3D (status_reg & GMAC_TIMESTAMP_ATSNS_MASK) >> + GMAC_TIMESTAMP_ATSNS_SHIFT; + if (!num_snapshot) + return; + + for (i =3D 0; i < num_snapshot; i++) { + read_lock_irqsave(&priv->ptp_lock, flags); + get_ptptime(priv->ioaddr, &ptp_time); + read_unlock_irqrestore(&priv->ptp_lock, flags); + event.type =3D PTP_CLOCK_EXTTS; + event.index =3D 0; + event.timestamp =3D ptp_time; + ptp_clock_event(priv->ptp_clock, &event); + } +} + static int dwmac1000_irq_status(struct mac_device_info *hw, struct stmmac_extra_stats *x) { + struct stmmac_priv *priv =3D + container_of(x, struct stmmac_priv, xstats); void __iomem *ioaddr =3D hw->pcsr; u32 intr_status =3D readl(ioaddr + GMAC_INT_STATUS); u32 intr_mask =3D readl(ioaddr + GMAC_INT_MASK); @@ -318,6 +368,9 @@ static int dwmac1000_irq_status(struct mac_device_info = *hw, x->irq_receive_pmt_irq_n++; } =20 + if (intr_status & GMAC_INT_STATUS_TSTAMP) + dwmac1000_ptp_isr(priv); + /* MAC tx/rx EEE LPI entry/exit interrupts */ if (intr_status & GMAC_INT_STATUS_LPIIS) { /* Clean LPI interrupt by reading the Reg 12 */ @@ -502,6 +555,34 @@ static void dwmac1000_set_mac_loopback(void __iomem *i= oaddr, bool enable) writel(value, ioaddr + GMAC_CONTROL); } =20 +static void dwmac1000_extts_configure(void __iomem *ioaddr, int ext_snapsh= ot_num, + bool on, struct net_device *dev) +{ + u32 acr_value; + + /* Since DWMAC1000 has only one external trigger input, + * ext_snapshot_num is not used + */ + acr_value =3D readl(ioaddr + GMAC_TIMESTAMP_C0NTROL); + acr_value &=3D ~GMAC_TC_ATSEN0; + if (on) { + acr_value |=3D GMAC_TC_ATSEN0; + acr_value |=3D GMAC_TC_ATSFC; + netdev_dbg(dev, "Auxiliary Snapshot 0 enabled.\n"); + } else { + netdev_dbg(dev, "Auxiliary Snapshot 0 disabled.\n"); + } + writel(acr_value, ioaddr + GMAC_TIMESTAMP_C0NTROL); +} + +static int dwmac1000_clear_snapshot_fifo(void __iomem *ioaddr) +{ + u32 acr_value; + + return readl_poll_timeout(ioaddr + GMAC_TIMESTAMP_C0NTROL, acr_value, + !(acr_value & GMAC_TC_ATSFC), 10, 10000); +} + const struct stmmac_ops dwmac1000_ops =3D { .core_init =3D dwmac1000_core_init, .set_mac =3D stmmac_set_mac, @@ -522,6 +603,8 @@ const struct stmmac_ops dwmac1000_ops =3D { .pcs_rane =3D dwmac1000_rane, .pcs_get_adv_lp =3D dwmac1000_get_adv_lp, .set_mac_loopback =3D dwmac1000_set_mac_loopback, + .extts_configure =3D dwmac1000_extts_configure, + .clear_snapshot_fifo =3D dwmac1000_clear_snapshot_fifo }; =20 int dwmac1000_setup(struct stmmac_priv *priv) --=20 2.41.0