From nobody Fri Dec 19 21:51:54 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52D82EB64DA for ; Thu, 15 Jun 2023 17:12:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238058AbjFORMG (ORCPT ); Thu, 15 Jun 2023 13:12:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238099AbjFORMB (ORCPT ); Thu, 15 Jun 2023 13:12:01 -0400 Received: from s.wrqvtzvf.outbound-mail.sendgrid.net (s.wrqvtzvf.outbound-mail.sendgrid.net [149.72.126.143]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D3C91BF9 for ; Thu, 15 Jun 2023 10:11:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=from:subject:in-reply-to:references:mime-version:to:cc: content-transfer-encoding:content-type:cc:content-type:from:subject:to; s=s1; bh=SwUrQGtfdJAfbPGuPioQpX3ZwqUQutzSyANTQ3rAAzw=; b=AMwf2Hpdyvkd7i69t99g+qZJ9jtyPG9rteVAsinO8lpeNRIbbOB9Y1NHTAqw1kEUboIX Wp2ypBdurEoTq1nzyETIhOgWse33pC7/jmORGjvT2ccuTy6Lp75x1OxW1A7sx/QfQRbKm+ oCw26goRml136PvKzb+ClgRrs1L5xYP4J6VSE3oQpg0GkpGrVfLf7v6ygI92QAQNXu0pfn 8QbeZFChndwjVbMh9Un6LAL77QrYTbT65UEWvmHKIupaThEQJ4uoZGTh5bQTn4gBMZ5rf+ o1ABoCJIAhM8tpJ/LNd7zpA+FM7UtgdicRgHwt0Ht89ZepMry/kMdFRM630qEuJg== Received: by filterdrecv-84b96456cb-6l8hp with SMTP id filterdrecv-84b96456cb-6l8hp-1-648B45FD-25 2023-06-15 17:10:21.532681887 +0000 UTC m=+3087112.128091413 Received: from bionic.localdomain (unknown) by geopod-ismtpd-2 (SG) with ESMTP id A-l5S23OQY-HMDmXz1kwpQ Thu, 15 Jun 2023 17:10:21.207 +0000 (UTC) From: Jonas Karlman Subject: [PATCH v4 4/6] phy/rockchip: inno-hdmi: do not power on rk3328 post pll on reg write Date: Thu, 15 Jun 2023 17:10:21 +0000 (UTC) Message-Id: <20230615171005.2251032-5-jonas@kwiboo.se> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230615171005.2251032-1-jonas@kwiboo.se> References: <20230615171005.2251032-1-jonas@kwiboo.se> MIME-Version: 1.0 X-SG-EID: =?us-ascii?Q?TdbjyGynYnRZWhH+7lKUQJL+ZxmxpowvO2O9SQF5CwCVrYgcwUXgU5DKUU3QxA?= =?us-ascii?Q?fZekEeQsTe+RrMu3cja6a0h444tarc9ufij5dRA?= =?us-ascii?Q?eI1cNBIYAT3oqUvqrtRFevHr5kMKRB2WdkvXiol?= =?us-ascii?Q?zFWREqpE=2FjoQJRA6K5mU0FvT1bQmfn4z9+iu8Tr?= =?us-ascii?Q?7PXSUrh0pjH8Rh7C0fOso=2Ftc4rVvlGnlxouZLaV?= =?us-ascii?Q?3n1gkIx2donKFMJeoVnYRwcqRTUTUJlPCQaXaS?= To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner , Zheng Yang Cc: Alex Bee , linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman , Kishon Vijay Abraham I X-Entity-ID: P7KYpSJvGCELWjBME/J5tg== Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" inno_write is used to configure 0xaa reg, that also hold the POST_PLL_POWER_DOWN bit. When POST_PLL_REFCLK_SEL_TMDS is configured the power down bit is not taken into consideration. Fix this by keeping the power down bit until configuration is complete. Also reorder the reg write order for consistency. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Jonas Karlman --- v3: - no change drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/ro= ckchip/phy-rockchip-inno-hdmi.c index f027e0a2e26b..fe7fa9a43ec0 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -1020,9 +1020,10 @@ inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *= inno, =20 inno_write(inno, 0xac, RK3328_POST_PLL_FB_DIV_7_0(cfg->fbdiv)); if (cfg->postdiv =3D=3D 1) { - inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS); inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | RK3328_POST_PLL_PRE_DIV(cfg->prediv)); + inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS | + RK3328_POST_PLL_POWER_DOWN); } else { v =3D (cfg->postdiv / 2) - 1; v &=3D RK3328_POST_PLL_POST_DIV_MASK; @@ -1030,7 +1031,8 @@ inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *i= nno, inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | RK3328_POST_PLL_PRE_DIV(cfg->prediv)); inno_write(inno, 0xaa, RK3328_POST_PLL_POST_DIV_ENABLE | - RK3328_POST_PLL_REFCLK_SEL_TMDS); + RK3328_POST_PLL_REFCLK_SEL_TMDS | + RK3328_POST_PLL_POWER_DOWN); } =20 for (v =3D 0; v < 14; v++) --=20 2.40.1