From nobody Sun Feb 8 02:55:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26C14EB64D9 for ; Thu, 15 Jun 2023 15:14:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345016AbjFOPOu (ORCPT ); Thu, 15 Jun 2023 11:14:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344075AbjFOPOk (ORCPT ); Thu, 15 Jun 2023 11:14:40 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D9C51FD5; Thu, 15 Jun 2023 08:14:39 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 35FFESMG040525; Thu, 15 Jun 2023 10:14:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1686842068; bh=d3IjOmeHBT9iECzuxbSEhMxM8UxZR7YHlkqlL1LkzL8=; h=From:To:CC:Subject:Date; b=So+Md2NqdKS+rsh8EHTwAZPBkZ7V7KgwnaYp6fSZLctV903Mr4wyHrYLARtcL1mxb 6zwoWZG+jych13Bxw8AI4t0JLd07z/QdNC286LwCDCct7KLrgRWoz7ag8CK76s+hVa 62MP1KDzFsOMMknd46GTbgtnhwiQKUnwYlGvqFnU= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 35FFESfP048997 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Jun 2023 10:14:28 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Jun 2023 10:14:28 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Jun 2023 10:14:28 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 35FFESK1035994; Thu, 15 Jun 2023 10:14:28 -0500 From: Nishanth Menon To: Tony Lindgren , Wadim Egorov , Conor Dooley , Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon Subject: [PATCH] arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Fixup reference to phandles array Date: Thu, 15 Jun 2023 10:14:27 -0500 Message-ID: <20230615151427.1780219-1-nm@ti.com> X-Mailer: git-send-email 2.40.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When referring to array of phandles, using <> to separate the array entries is better notation as it makes potential errors with phandle and cell arguments easier to catch. Fix the outliers to be consistent with the rest of the usage. Cc: Wadim Egorov Fixes: 0ad58871f63c ("arm64: dts: ti: Add basic support for phyBOARD-Lyra-A= M625") Signed-off-by: Nishanth Menon --- Vignesh, I missed in the review, just noticed. just cosmetic though, might be worthw= hile to pick or squash. arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/a= rm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts index 5024f1e38fc4..a438baf542c2 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts @@ -57,7 +57,7 @@ key-menu { leds { compatible =3D "gpio-leds"; pinctrl-names =3D "default"; - pinctrl-0 =3D <&leds_pins_default &user_leds_pins_default>; + pinctrl-0 =3D <&leds_pins_default>, <&user_leds_pins_default>; =20 led-1 { gpios =3D <&main_gpio0 32 GPIO_ACTIVE_HIGH>; @@ -167,8 +167,7 @@ AM62X_IOPAD(0x084, PIN_OUTPUT, 7) /* (L23) GPMC0_ADVn_A= LE.GPIO0_32 */ =20 &cpsw3g { pinctrl-names =3D "default"; - pinctrl-0 =3D <&main_rgmii1_pins_default - &main_rgmii2_pins_default>; + pinctrl-0 =3D <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>; }; =20 &cpsw_port2 { --=20 2.40.0