From nobody Sun Feb 8 16:31:51 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 977C3EB64DC for ; Thu, 15 Jun 2023 12:15:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344793AbjFOMPr (ORCPT ); Thu, 15 Jun 2023 08:15:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344791AbjFOMO7 (ORCPT ); Thu, 15 Jun 2023 08:14:59 -0400 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D98292960 for ; Thu, 15 Jun 2023 05:14:50 -0700 (PDT) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-310e6e6a8d4so1640625f8f.2 for ; Thu, 15 Jun 2023 05:14:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686831289; x=1689423289; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4LJNYlud7nrLWcLjYZWRISbOkEhmJfj+HftG3WBZPio=; b=hucoXbWBf1OiSRCTQeWm56yitj5Lp14xbM8m91gPocDl3fphaLX8DBWtyGjbKmsIC2 zggeH1Qo5FAiNBr9uyhWSCxy+1zVw3QWAFjFzffMpObdnrsBikUKA9Kao16lghrmXiGG IAC6n5IjzEIbvIgeSMyryxFO9KwQDwMJd6qy1pPz2GmC+oPnTMUw66lGRy3w2a0QR6uY P/dd7Ae27WkzZ0Ans+P8pGvte7DcfBTPrhQu+sn0XiB6Iliw1nyTjtWk80KRq2xpmgZN CvMVFmEePhpDMD187F77kXBZy83TcLpGZg5WPU76GOeW8ZmvbPI4e68XtgDxluX1i4kS q5wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686831289; x=1689423289; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4LJNYlud7nrLWcLjYZWRISbOkEhmJfj+HftG3WBZPio=; b=ZBoSoYYsJf3sdwPPz2onK0bnIUdK6JL6VB8h7IbEFGucoylUujnTPXH2Qhmzdk2H0s n1+UIbVBsmgk1qS08THNucwEr97lqWBTpWm7xUq71/6i8wP7s4vDTg4LVUckg/GO4JZL aFKoGAEvG11i62RMcNLXyuLr7IwScBocVSWoScW+1959acF/yJ+tFDxjiDWhPanwtJ1n +rhLWGSAWrs4JCEcQ1SnZh53iktGpQCxyUtkdnHUSlSK6WZ5zcFs6pSmk0mkLEb0V1ty ouVpv+8PiMaUqtmsXA7FA/fqApttl/k+vlXUOdg+KL6pHe3eGpPY8iCdiRUX7A+A2z86 6Qsg== X-Gm-Message-State: AC+VfDwyZEZmDuCVzncpANiaoTpODyr10ny3lAqKtmiyOmwpfV9SYNSt qCZQhXzvGYccQFrRav+OT2uKHw== X-Google-Smtp-Source: ACHHUZ7dhQeRZTyspniXEVTLFPnO1UuPerWwotxm94aJWSlmAjYzhXbHXkVd8P9CDW1neaFjB7KBLQ== X-Received: by 2002:a5d:6147:0:b0:30a:f143:25d2 with SMTP id y7-20020a5d6147000000b0030af14325d2mr10110697wrt.5.1686831289396; Thu, 15 Jun 2023 05:14:49 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:2ad4:65a7:d9f3:a64e]) by smtp.gmail.com with ESMTPSA id k17-20020a5d4291000000b003047ea78b42sm20918012wrq.43.2023.06.15.05.14.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jun 2023 05:14:48 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH v2 12/23] net: stmmac: dwmac-qcom-ethqos: add support for the optional serdes phy Date: Thu, 15 Jun 2023 14:14:08 +0200 Message-Id: <20230615121419.175862-13-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230615121419.175862-1-brgl@bgdev.pl> References: <20230615121419.175862-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski On sa8775p platforms, there's a SGMII SerDes PHY between the MAC and external PHY that we need to enable and configure. Signed-off-by: Bartosz Golaszewski --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/driv= ers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index ec3bbd199501..042733b5e80b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -6,6 +6,7 @@ #include #include #include +#include #include =20 #include "stmmac.h" @@ -93,6 +94,7 @@ struct qcom_ethqos { =20 unsigned int rgmii_clk_rate; struct clk *rgmii_clk; + struct phy *serdes_phy; unsigned int speed; =20 const struct ethqos_emac_por *por; @@ -565,6 +567,30 @@ static void ethqos_fix_mac_speed(void *priv, unsigned = int speed) ethqos_configure(ethqos); } =20 +static int qcom_ethqos_serdes_powerup(struct net_device *ndev, void *priv) +{ + struct qcom_ethqos *ethqos =3D priv; + int ret; + + ret =3D phy_init(ethqos->serdes_phy); + if (ret) + return ret; + + ret =3D phy_power_on(ethqos->serdes_phy); + if (ret) + return ret; + + return phy_set_speed(ethqos->serdes_phy, ethqos->speed); +} + +static void qcom_ethqos_serdes_powerdown(struct net_device *ndev, void *pr= iv) +{ + struct qcom_ethqos *ethqos =3D priv; + + phy_power_off(ethqos->serdes_phy); + phy_exit(ethqos->serdes_phy); +} + static int ethqos_clks_config(void *priv, bool enabled) { struct qcom_ethqos *ethqos =3D priv; @@ -650,6 +676,12 @@ static int qcom_ethqos_probe(struct platform_device *p= dev) if (ret) goto out_config_dt; =20 + ethqos->serdes_phy =3D devm_phy_optional_get(dev, "serdes"); + if (IS_ERR(ethqos->serdes_phy)) { + ret =3D PTR_ERR(ethqos->serdes_phy); + goto out_config_dt; + } + ethqos->speed =3D SPEED_1000; ethqos_update_rgmii_clk(ethqos, SPEED_1000); ethqos_set_func_clk_en(ethqos); @@ -665,6 +697,11 @@ static int qcom_ethqos_probe(struct platform_device *p= dev) if (of_device_is_compatible(np, "qcom,qcs404-ethqos")) plat_dat->rx_clk_runs_in_lpi =3D 1; =20 + if (ethqos->serdes_phy) { + plat_dat->serdes_powerup =3D qcom_ethqos_serdes_powerup; + plat_dat->serdes_powerdown =3D qcom_ethqos_serdes_powerdown; + } + ret =3D stmmac_dvr_probe(dev, plat_dat, &stmmac_res); if (ret) goto out_config_dt; --=20 2.39.2