From nobody Mon Feb 9 17:21:53 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 317FAEB64D9 for ; Thu, 15 Jun 2023 10:59:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244494AbjFOK66 (ORCPT ); Thu, 15 Jun 2023 06:58:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343756AbjFOK6x (ORCPT ); Thu, 15 Jun 2023 06:58:53 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9D012711 for ; Thu, 15 Jun 2023 03:58:40 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id 2adb3069b0e04-4f841b7a697so1020973e87.3 for ; Thu, 15 Jun 2023 03:58:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rasmusvillemoes.dk; s=google; t=1686826719; x=1689418719; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LYfZJ0PxZixY0dLK5zmM+/mrSboE1mU7I13VvIoENDw=; b=PmuxOTSVjQn1kT6lIyY95Bndpk5NDtK6UeKpy3xHbzizb3puAVukBDCtUxEPKQQjHA rQ3dN0xutz377HnXe/t98WxB455hiS0Ot4M2IwFEzX3had6VAfBEGlmSmP1509pLvZXp WJqGClZ0ivwsespZ3HxA/nCKE0l3PKt4bEwKc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686826719; x=1689418719; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LYfZJ0PxZixY0dLK5zmM+/mrSboE1mU7I13VvIoENDw=; b=H9zd+4NfNhhsLc9demv7pa6NvwZGKqES5FMmJpVqjEYQjjuaWjwdl8aJJ2Z3Q2MrRL R6BD5W+Q/8LXCBbMpDWH1SnLg6tWarqeDa+DvQwjSQ0TGzclfIG67MKWGdyubiVyOPVR K3Y045o3ijHm0xon2YaTdFNhIQZKIIkN5LGrgq5bqnBxTNRgVTTLZXY5gGRuOPn5n/pv 80Q2amfnMsAGNwyfABnemPTvS+3hJl07+HXk3QGq5b5WjuGIcaNzhmVKwqtlzU3OjHus leSVjzCI3lnIEnzwXGf49zZnGhMrBwMXBSSyRmfhxvnKLs9Qa3dzjH5V6yF5VqQKYQzG WPdA== X-Gm-Message-State: AC+VfDzkLD6mptYv2207QYFQW6rNZBWCd6TEZo7CgbuQr8FUbRiKM8i+ VjQuPSbdLQiXk0akKdMYdtb9VA== X-Google-Smtp-Source: ACHHUZ4Ki/3UyNWljzTgPUtV1FL38EtSQGnHyLqfoIZ+0hG7grzuUa8EpnVtVNvrik6Id4QlmX/GMA== X-Received: by 2002:a19:5007:0:b0:4f6:29b2:f92a with SMTP id e7-20020a195007000000b004f629b2f92amr10870918lfb.21.1686826719087; Thu, 15 Jun 2023 03:58:39 -0700 (PDT) Received: from prevas-ravi.prevas.se ([81.216.59.226]) by smtp.gmail.com with ESMTPSA id h7-20020ac25967000000b004f13f4ec267sm165364lfp.186.2023.06.15.03.58.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jun 2023 03:58:38 -0700 (PDT) From: Rasmus Villemoes To: Alessandro Zummo , Alexandre Belloni Cc: Andy Shevchenko , devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-rtc@vger.kernel.org, Rasmus Villemoes , linux-kernel@vger.kernel.org Subject: [PATCH v3 4/8] rtc: isl12022: add support for trip level DT binding Date: Thu, 15 Jun 2023 12:58:22 +0200 Message-Id: <20230615105826.411953-5-linux@rasmusvillemoes.dk> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230615105826.411953-1-linux@rasmusvillemoes.dk> References: <20230612113059.247275-1-linux@rasmusvillemoes.dk> <20230615105826.411953-1-linux@rasmusvillemoes.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Implement support for using the values given in the isil,battery-trip-levels-microvolt property to set appropriate values in the VB85TP/VB75TP bits in the PWR_VBAT register. Signed-off-by: Rasmus Villemoes --- drivers/rtc/rtc-isl12022.c | 39 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/rtc/rtc-isl12022.c b/drivers/rtc/rtc-isl12022.c index ebd66b835cef..6a757f0a4736 100644 --- a/drivers/rtc/rtc-isl12022.c +++ b/drivers/rtc/rtc-isl12022.c @@ -9,6 +9,7 @@ */ =20 #include +#include #include #include #include @@ -31,6 +32,8 @@ #define ISL12022_REG_SR 0x07 #define ISL12022_REG_INT 0x08 =20 +#define ISL12022_REG_PWR_VBAT 0x0a + #define ISL12022_REG_BETA 0x0d #define ISL12022_REG_TEMP_L 0x28 =20 @@ -42,6 +45,9 @@ =20 #define ISL12022_INT_WRTC (1 << 6) =20 +#define ISL12022_REG_VB85_MASK GENMASK(5, 3) +#define ISL12022_REG_VB75_MASK GENMASK(2, 0) + #define ISL12022_BETA_TSE (1 << 7) =20 static umode_t isl12022_hwmon_is_visible(const void *data, @@ -209,6 +215,38 @@ static const struct regmap_config regmap_config =3D { .use_single_write =3D true, }; =20 +static const u32 trip_levels[2][7] =3D { + { 2125000, 2295000, 2550000, 2805000, 3060000, 4250000, 4675000 }, + { 1875000, 2025000, 2250000, 2475000, 2700000, 3750000, 4125000 }, +}; + +static void isl12022_set_trip_levels(struct device *dev) +{ + struct regmap *regmap =3D dev_get_drvdata(dev); + u32 levels[2] =3D {0, 0}; + int ret, i, j, x[2]; + u8 val, mask; + + device_property_read_u32_array(dev, "isil,battery-trip-levels-microvolt", + levels, 2); + + for (i =3D 0; i < 2; i++) { + for (j =3D 0; j < ARRAY_SIZE(trip_levels[i]) - 1; j++) { + if (levels[i] <=3D trip_levels[i][j]) + break; + } + x[i] =3D j; + } + + val =3D FIELD_PREP(ISL12022_REG_VB85_MASK, x[0]) | + FIELD_PREP(ISL12022_REG_VB75_MASK, x[1]); + mask =3D ISL12022_REG_VB85_MASK | ISL12022_REG_VB75_MASK; + + ret =3D regmap_update_bits(regmap, ISL12022_REG_PWR_VBAT, mask, val); + if (ret) + dev_warn(dev, "unable to set battery alarm levels: %d\n", ret); +} + static int isl12022_probe(struct i2c_client *client) { struct rtc_device *rtc; @@ -225,6 +263,7 @@ static int isl12022_probe(struct i2c_client *client) =20 dev_set_drvdata(&client->dev, regmap); =20 + isl12022_set_trip_levels(&client->dev); isl12022_hwmon_register(&client->dev); =20 rtc =3D devm_rtc_allocate_device(&client->dev); --=20 2.37.2