From nobody Sun Feb 8 14:12:41 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31B0FC001B1 for ; Tue, 13 Jun 2023 22:51:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240890AbjFMWvs (ORCPT ); Tue, 13 Jun 2023 18:51:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241135AbjFMWvi (ORCPT ); Tue, 13 Jun 2023 18:51:38 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAE891732; Tue, 13 Jun 2023 15:51:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686696696; x=1718232696; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=liv5qZIzM+Le5APnzo6PyFKea9u3jjhGd/AsZAO4fxw=; b=Z1KO35VId/eEo659ZvNCWlJ2mTbaxmIE71ckLJVOvpmuUI4ZFZdxWbiJ Q4OLjK2Ssmk5Xzw7o8x1qfUuMPDYbtpj8SB7IkoHeCPxkii2ndwey4Nqc fbJrpeRDjBN4sZ0EK4puKhnUKAo3x8QRalmfEonnBJCL8P0ZayIyg2NQZ lZkW0Cwnodio3CXl1nmSBjtCM9r9mv/14Dlef6DloUutNKBZeXqULPDuL jO21dOaiU/BAp8vNpkqaVuBzdUMKAa0W1ckl6bpUtR2KPeYa9W10f+sNm bZgBLhf3jjatDOUegpj2vLULfiD1bzAFZDjzaH/wiKnH8tPg5ti+1EUqJ w==; X-IronPort-AV: E=McAfee;i="6600,9927,10740"; a="444842178" X-IronPort-AV: E=Sophos;i="6.00,241,1681196400"; d="scan'208";a="444842178" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jun 2023 15:51:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10740"; a="824589634" X-IronPort-AV: E=Sophos;i="6.00,241,1681196400"; d="scan'208";a="824589634" Received: from linux.intel.com ([10.54.29.200]) by fmsmga002.fm.intel.com with ESMTP; 13 Jun 2023 15:51:35 -0700 Received: from rjingar-desk5.amr.corp.intel.com (hciettox-mobl.amr.corp.intel.com [10.212.23.107]) by linux.intel.com (Postfix) with ESMTP id 55DE3580D61; Tue, 13 Jun 2023 15:51:35 -0700 (PDT) From: Rajvi Jingar To: david.e.box@linux.intel.com, ilpo.jarvinen@linux.intel.com, irenic.rajneesh@gmail.com, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, hdegoede@redhat.com Cc: xi.pardee@intel.com Subject: [PATCH 2/8] platform/x86:intel/pmc: Combine core_init() and core_configure() Date: Tue, 13 Jun 2023 15:53:41 -0700 Message-Id: <20230613225347.2720665-3-rajvi.jingar@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230613225347.2720665-1-rajvi.jingar@linux.intel.com> References: <20230613225347.2720665-1-rajvi.jingar@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xi Pardee Combine core_init() and core_configure() functions to have a cleaner setup for platforms. Signed-off-by: Xi Pardee Reviewed-by: Ilpo J=C3=A4rvinen --- drivers/platform/x86/intel/pmc/adl.c | 15 +++++---- drivers/platform/x86/intel/pmc/cnp.c | 15 ++++++++- drivers/platform/x86/intel/pmc/core.c | 47 +++++++++++++++------------ drivers/platform/x86/intel/pmc/core.h | 19 +++++------ drivers/platform/x86/intel/pmc/icl.c | 3 +- drivers/platform/x86/intel/pmc/mtl.c | 26 ++++++++------- drivers/platform/x86/intel/pmc/spt.c | 3 +- drivers/platform/x86/intel/pmc/tgl.c | 15 +++++---- 8 files changed, 85 insertions(+), 58 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/adl.c b/drivers/platform/x86/in= tel/pmc/adl.c index 5cbd40979f2a..f678ce308cc7 100644 --- a/drivers/platform/x86/intel/pmc/adl.c +++ b/drivers/platform/x86/intel/pmc/adl.c @@ -309,17 +309,20 @@ const struct pmc_reg_map adl_reg_map =3D { .lpm_live_status_offset =3D ADL_LPM_LIVE_STATUS_OFFSET, }; =20 -void adl_core_configure(struct pmc_dev *pmcdev) +int adl_core_init(struct pmc_dev *pmcdev) { + int ret; + + pmcdev->map =3D &adl_reg_map; + ret =3D get_primary_reg_base(pmcdev); + if (ret) + return ret; + /* Due to a hardware limitation, the GBE LTR blocks PC10 * when a cable is attached. Tell the PMC to ignore it. */ dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n"); pmc_core_send_ltr_ignore(pmcdev, 3); -} =20 -void adl_core_init(struct pmc_dev *pmcdev) -{ - pmcdev->map =3D &adl_reg_map; - pmcdev->core_configure =3D adl_core_configure; + return 0; } diff --git a/drivers/platform/x86/intel/pmc/cnp.c b/drivers/platform/x86/in= tel/pmc/cnp.c index 7fb38815c4eb..5fb2d191ce30 100644 --- a/drivers/platform/x86/intel/pmc/cnp.c +++ b/drivers/platform/x86/intel/pmc/cnp.c @@ -204,7 +204,20 @@ const struct pmc_reg_map cnp_reg_map =3D { .etr3_offset =3D ETR3_OFFSET, }; =20 -void cnp_core_init(struct pmc_dev *pmcdev) +int cnp_core_init(struct pmc_dev *pmcdev) { + int ret; + pmcdev->map =3D &cnp_reg_map; + ret =3D get_primary_reg_base(pmcdev); + if (ret) + return ret; + + /* Due to a hardware limitation, the GBE LTR blocks PC10 + * when a cable is attached. Tell the PMC to ignore it. + */ + dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n"); + pmc_core_send_ltr_ignore(pmcdev, 3); + + return 0; } diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/i= ntel/pmc/core.c index ed91ef9d1cf6..0d4cda7c1833 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -948,6 +948,25 @@ static void pmc_core_get_low_power_modes(struct platfo= rm_device *pdev) } } =20 +int get_primary_reg_base(struct pmc_dev *pmcdev) +{ + u64 slp_s0_addr; + + if (lpit_read_residency_count_address(&slp_s0_addr)) { + pmcdev->base_addr =3D PMC_BASE_ADDR_DEFAULT; + + if (page_is_ram(PHYS_PFN(pmcdev->base_addr))) + return -ENODEV; + } else { + pmcdev->base_addr =3D slp_s0_addr - pmcdev->map->slp_s0_offset; + } + + pmcdev->regbase =3D ioremap(pmcdev->base_addr, pmcdev->map->regmap_length= ); + if (!pmcdev->regbase) + return -ENOMEM; + return 0; +} + static void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev) { debugfs_remove_recursive(pmcdev->dbgfs_dir); @@ -1099,8 +1118,8 @@ static int pmc_core_probe(struct platform_device *pde= v) static bool device_initialized; struct pmc_dev *pmcdev; const struct x86_cpu_id *cpu_id; - void (*core_init)(struct pmc_dev *pmcdev); - u64 slp_s0_addr; + int (*core_init)(struct pmc_dev *pmcdev); + int ret; =20 if (device_initialized) return -ENODEV; @@ -1116,7 +1135,7 @@ static int pmc_core_probe(struct platform_device *pde= v) if (!cpu_id) return -ENODEV; =20 - core_init =3D (void (*)(struct pmc_dev *))cpu_id->driver_data; + core_init =3D (int (*)(struct pmc_dev *))cpu_id->driver_data; =20 /* * Coffee Lake has CPU ID of Kaby Lake and Cannon Lake PCH. So here @@ -1127,26 +1146,12 @@ static int pmc_core_probe(struct platform_device *p= dev) core_init =3D cnp_core_init; =20 mutex_init(&pmcdev->lock); - core_init(pmcdev); - - - if (lpit_read_residency_count_address(&slp_s0_addr)) { - pmcdev->base_addr =3D PMC_BASE_ADDR_DEFAULT; - - if (page_is_ram(PHYS_PFN(pmcdev->base_addr))) - return -ENODEV; - } else { - pmcdev->base_addr =3D slp_s0_addr - pmcdev->map->slp_s0_offset; + ret =3D core_init(pmcdev); + if (ret) { + mutex_destroy(&pmcdev->lock); + return ret; } =20 - pmcdev->regbase =3D ioremap(pmcdev->base_addr, - pmcdev->map->regmap_length); - if (!pmcdev->regbase) - return -ENOMEM; - - if (pmcdev->core_configure) - pmcdev->core_configure(pmcdev); - pmcdev->pmc_xram_read_bit =3D pmc_core_check_read_lock_bit(pmcdev); pmc_core_get_low_power_modes(pdev); pmc_core_do_dmi_quirks(pmcdev); diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/i= ntel/pmc/core.h index 86d38270000a..a672659b8659 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -334,7 +334,6 @@ struct pmc_reg_map { * @num_lpm_modes: Count of enabled modes * @lpm_en_modes: Array of enabled modes from lowest to highest priority * @lpm_req_regs: List of substate requirements - * @core_configure: Function pointer to configure the platform * @resume: Function to perform platform specific resume * * pmc_dev contains info about power management controller device. @@ -353,7 +352,6 @@ struct pmc_dev { int num_lpm_modes; int lpm_en_modes[LPM_MAX_NUM_MODES]; u32 *lpm_req_regs; - void (*core_configure)(struct pmc_dev *pmcdev); int (*resume)(struct pmc_dev *pmcdev); }; =20 @@ -427,15 +425,14 @@ extern void pmc_core_get_tgl_lpm_reqs(struct platform= _device *pdev); extern int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value); =20 int pmc_core_resume_common(struct pmc_dev *pmcdev); -void spt_core_init(struct pmc_dev *pmcdev); -void cnp_core_init(struct pmc_dev *pmcdev); -void icl_core_init(struct pmc_dev *pmcdev); -void tgl_core_init(struct pmc_dev *pmcdev); -void adl_core_init(struct pmc_dev *pmcdev); -void mtl_core_init(struct pmc_dev *pmcdev); -void tgl_core_configure(struct pmc_dev *pmcdev); -void adl_core_configure(struct pmc_dev *pmcdev); -void mtl_core_configure(struct pmc_dev *pmcdev); +int get_primary_reg_base(struct pmc_dev *pmcdev); + +int spt_core_init(struct pmc_dev *pmcdev); +int cnp_core_init(struct pmc_dev *pmcdev); +int icl_core_init(struct pmc_dev *pmcdev); +int tgl_core_init(struct pmc_dev *pmcdev); +int adl_core_init(struct pmc_dev *pmcdev); +int mtl_core_init(struct pmc_dev *pmcdev); =20 #define pmc_for_each_mode(i, mode, pmcdev) \ for (i =3D 0, mode =3D pmcdev->lpm_en_modes[i]; \ diff --git a/drivers/platform/x86/intel/pmc/icl.c b/drivers/platform/x86/in= tel/pmc/icl.c index 2f11b1a6daeb..a671d7e86431 100644 --- a/drivers/platform/x86/intel/pmc/icl.c +++ b/drivers/platform/x86/intel/pmc/icl.c @@ -50,7 +50,8 @@ const struct pmc_reg_map icl_reg_map =3D { .etr3_offset =3D ETR3_OFFSET, }; =20 -void icl_core_init(struct pmc_dev *pmcdev) +int icl_core_init(struct pmc_dev *pmcdev) { pmcdev->map =3D &icl_reg_map; + return get_primary_reg_base(pmcdev); } diff --git a/drivers/platform/x86/intel/pmc/mtl.c b/drivers/platform/x86/in= tel/pmc/mtl.c index cdcf743b5e2c..a2fc96f9ef11 100644 --- a/drivers/platform/x86/intel/pmc/mtl.c +++ b/drivers/platform/x86/intel/pmc/mtl.c @@ -467,15 +467,6 @@ const struct pmc_reg_map mtl_socm_reg_map =3D { .lpm_live_status_offset =3D MTL_LPM_LIVE_STATUS_OFFSET, }; =20 -void mtl_core_configure(struct pmc_dev *pmcdev) -{ - /* Due to a hardware limitation, the GBE LTR blocks PC10 - * when a cable is attached. Tell the PMC to ignore it. - */ - dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n"); - pmc_core_send_ltr_ignore(pmcdev, 3); -} - #define MTL_GNA_PCI_DEV 0x7e4c #define MTL_IPU_PCI_DEV 0x7d19 #define MTL_VPU_PCI_DEV 0x7d1d @@ -515,12 +506,25 @@ static int mtl_resume(struct pmc_dev *pmcdev) return pmc_core_resume_common(pmcdev); } =20 -void mtl_core_init(struct pmc_dev *pmcdev) +int mtl_core_init(struct pmc_dev *pmcdev) { + int ret; + pmcdev->map =3D &mtl_socm_reg_map; - pmcdev->core_configure =3D mtl_core_configure; =20 mtl_d3_fixup(); =20 pmcdev->resume =3D mtl_resume; + + ret =3D get_primary_reg_base(pmcdev); + if (ret) + return ret; + + /* Due to a hardware limitation, the GBE LTR blocks PC10 + * when a cable is attached. Tell the PMC to ignore it. + */ + dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n"); + pmc_core_send_ltr_ignore(pmcdev, 3); + + return 0; } diff --git a/drivers/platform/x86/intel/pmc/spt.c b/drivers/platform/x86/in= tel/pmc/spt.c index e16982236778..f34015692bb8 100644 --- a/drivers/platform/x86/intel/pmc/spt.c +++ b/drivers/platform/x86/intel/pmc/spt.c @@ -134,7 +134,8 @@ const struct pmc_reg_map spt_reg_map =3D { .pm_vric1_offset =3D SPT_PMC_VRIC1_OFFSET, }; =20 -void spt_core_init(struct pmc_dev *pmcdev) +int spt_core_init(struct pmc_dev *pmcdev) { pmcdev->map =3D &spt_reg_map; + return get_primary_reg_base(pmcdev); } diff --git a/drivers/platform/x86/intel/pmc/tgl.c b/drivers/platform/x86/in= tel/pmc/tgl.c index c245ada849d0..90807bd947ed 100644 --- a/drivers/platform/x86/intel/pmc/tgl.c +++ b/drivers/platform/x86/intel/pmc/tgl.c @@ -252,18 +252,21 @@ void pmc_core_get_tgl_lpm_reqs(struct platform_device= *pdev) ACPI_FREE(out_obj); } =20 -void tgl_core_configure(struct pmc_dev *pmcdev) +int tgl_core_init(struct pmc_dev *pmcdev) { + int ret; + + pmcdev->map =3D &tgl_reg_map; + ret =3D get_primary_reg_base(pmcdev); + if (ret) + return ret; + pmc_core_get_tgl_lpm_reqs(pmcdev->pdev); /* Due to a hardware limitation, the GBE LTR blocks PC10 * when a cable is attached. Tell the PMC to ignore it. */ dev_dbg(&pmcdev->pdev->dev, "ignoring GBE LTR\n"); pmc_core_send_ltr_ignore(pmcdev, 3); -} =20 -void tgl_core_init(struct pmc_dev *pmcdev) -{ - pmcdev->map =3D &tgl_reg_map; - pmcdev->core_configure =3D tgl_core_configure; + return 0; } --=20 2.25.1