From nobody Fri Dec 19 21:31:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60BF3C7EE2F for ; Mon, 12 Jun 2023 17:14:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235987AbjFLROP (ORCPT ); Mon, 12 Jun 2023 13:14:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237050AbjFLRNq (ORCPT ); Mon, 12 Jun 2023 13:13:46 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06240188; Mon, 12 Jun 2023 10:13:45 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-210-131.ewe-ip-backbone.de [91.248.210.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id C34516606EE0; Mon, 12 Jun 2023 18:13:43 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1686590023; bh=uHNhWU1jmIOWUBoodh01ywxlZr0fhauLWpShle6WDA0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eo+0Brh05JGSEEIja1s2f8Mg+SuZWAm7KhcmxPXYwqNopH7zqOMlpvkm5zL9DuW68 tlzNLCUxN6sGXaUHv5KsH3vThDYuwX2dH0GsR9o+y4nqNMlvpSlMhxRwSsUn+ERDo/ 1IYBMK1GKEVOBqdgMb1dBKWwHbF4IojwaqcmoJh55ZpsAgkyEoNZbesfEh5Im4kfkG JwBQf2Pw43NdP5+jKusfj5CYJELb5my+YC3bHIJO65KMG56Ae+gf6b88ndi0KUQFEo uVVAquepDPJK1lh+ZtYqyzypwA6VlwrRbUm+KGXGyHKcj2pPhqNEb3LUUYuZEi86vS bj3cjkLxCMWbQ== Received: by jupiter.universe (Postfix, from userid 1000) id AAD1F4807F0; Mon, 12 Jun 2023 19:13:38 +0200 (CEST) From: Sebastian Reichel To: Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Damien Le Moal , Serge Semin , Vinod Koul , Kishon Vijay Abraham I , linux-ide@vger.kernel.org, linux-phy@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v4 5/5] arm64: dts: rockchip: rk3588: add SATA support Date: Mon, 12 Jun 2023 19:13:37 +0200 Message-Id: <20230612171337.74576-6-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612171337.74576-1-sebastian.reichel@collabora.com> References: <20230612171337.74576-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add all three SATA IP blocks to the RK3588 DT. Signed-off-by: Sebastian Reichel --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 23 +++++++++++ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 48 +++++++++++++++++++++++ 2 files changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts= /rockchip/rk3588.dtsi index 9d8539b5309b..b9508cea34f1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -129,6 +129,29 @@ gmac0_mtl_tx_setup: tx-queues-config { }; }; =20 + sata1: sata@fe220000 { + compatible =3D "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; + reg =3D <0 0xfe220000 0 0x1000>; + clocks =3D <&cru ACLK_SATA1>, <&cru CLK_PMALIVE1>, + <&cru CLK_RXOOB1>, <&cru CLK_PIPEPHY1_REF>, + <&cru CLK_PIPEPHY1_PIPE_ASIC_G>; + clock-names =3D "sata", "pmalive", "rxoob", "ref", "asic"; + interrupts =3D ; + ports-implemented =3D <0x1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + + sata-port@0 { + reg =3D <0>; + hba-port-cap =3D ; + phys =3D <&combphy1_ps PHY_TYPE_SATA>; + phy-names =3D "sata-phy"; + snps,rx-ts-max =3D <32>; + snps,tx-ts-max =3D <32>; + }; + }; + combphy1_ps: phy@fee10000 { compatible =3D "rockchip,rk3588-naneng-combphy"; reg =3D <0x0 0xfee10000 0x0 0x100>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dt= s/rockchip/rk3588s.dtsi index 45ae457a22a4..00a91b08e3bb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -9,6 +9,8 @@ #include #include #include +#include +#include =20 / { compatible =3D "rockchip,rk3588"; @@ -1717,6 +1719,52 @@ gmac1_mtl_tx_setup: tx-queues-config { }; }; =20 + sata0: sata@fe210000 { + compatible =3D "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; + reg =3D <0 0xfe210000 0 0x1000>; + clocks =3D <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>, + <&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>, + <&cru CLK_PIPEPHY0_PIPE_ASIC_G>; + clock-names =3D "sata", "pmalive", "rxoob", "ref", "asic"; + interrupts =3D ; + ports-implemented =3D <0x1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + + sata-port@0 { + reg =3D <0>; + hba-port-cap =3D ; + phys =3D <&combphy0_ps PHY_TYPE_SATA>; + phy-names =3D "sata-phy"; + snps,rx-ts-max =3D <32>; + snps,tx-ts-max =3D <32>; + }; + }; + + sata2: sata@fe230000 { + compatible =3D "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci"; + reg =3D <0 0xfe230000 0 0x1000>; + clocks =3D <&cru ACLK_SATA2>, <&cru CLK_PMALIVE2>, + <&cru CLK_RXOOB2>, <&cru CLK_PIPEPHY2_REF>, + <&cru CLK_PIPEPHY2_PIPE_ASIC_G>; + clock-names =3D "sata", "pmalive", "rxoob", "ref", "asic"; + interrupts =3D ; + ports-implemented =3D <0x1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + + sata-port@0 { + reg =3D <0>; + hba-port-cap =3D ; + phys =3D <&combphy2_psu PHY_TYPE_SATA>; + phy-names =3D "sata-phy"; + snps,rx-ts-max =3D <32>; + snps,tx-ts-max =3D <32>; + }; + }; + sdmmc: mmc@fe2c0000 { compatible =3D "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; reg =3D <0x0 0xfe2c0000 0x0 0x4000>; --=20 2.39.2