From nobody Sat Feb 7 15:26:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66B1BC7EE43 for ; Mon, 12 Jun 2023 09:32:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233120AbjFLJcf (ORCPT ); Mon, 12 Jun 2023 05:32:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231654AbjFLJay (ORCPT ); Mon, 12 Jun 2023 05:30:54 -0400 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 370864EC6 for ; Mon, 12 Jun 2023 02:24:58 -0700 (PDT) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-3f732d37d7bso29602485e9.0 for ; Mon, 12 Jun 2023 02:24:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20221208.gappssmtp.com; s=20221208; t=1686561896; x=1689153896; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=daR94dVplG+ZI9i0IDfMIEFWnwE1eSwGkl16IK6pqwI=; b=uoRxZiUPtxnfmNryRY5Rnwq1ha8eB/FcnBi2lahhDqg941OiFCwgMJdV5vgRId9uq4 /TyZwSbQWan6lMJfE7LV4PJs/RmG9lUGpm9CQl3UDwa8I4V9rGcvZR3ICmwfe7UURu5C Bqb5yljGhjDVR0x36RuIYypr9JevX+iHfhUG4LIEvPPOyNEbG48oRl4XsmphWMAb7iLy +Zn0VrCahCaKLP0tPf4sEfrnJNcHkyEIPP2IZw7fTxGKacoGuzEulIEIATBzR26s9AuA Rw6qAUeAkGBlwewnJvAEzhUnUvU32AjdHyn9AZpXKWcMh65K+O05T+95QC/Kof8VMOzR cG3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686561896; x=1689153896; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=daR94dVplG+ZI9i0IDfMIEFWnwE1eSwGkl16IK6pqwI=; b=TGqL+kPUP70T/9kDWgK4B0jCU5kybG6mH6CnJJZvsn4peBBo6jUFoORbNL2LRUv2FY 5X7vqk14UDsZXvWqAVTFeyyPY0ftrR91LqMXU/pXRRuqYDdM0juyzzbPOToIvzhSo6iJ hlareNUBFGeEpwY5wp+3S6YTVKMB4y212zl+LHSRb35PS+0+6jNhAuRxP4rwpTGP7Eaz /qfy/Lkqpr4niOhVskRzn9wyngZZdeKvH6OhCoWWQh3T8m9EEe48WjkANCI8+FPW7GAt waxNLVMj4fZZ5RG5K4u4tFB6kn5C/Q+fj4lfwtRWBXPrZglB20/5nhF/rW7eK3awFGZn SS0Q== X-Gm-Message-State: AC+VfDwCjCM7/YTv/rorKj1YogdVj7ganS8hmyw7GftAqYOcwB2Mg4ac oCJSDVd9CgZnRIJY4ck7yuVACw== X-Google-Smtp-Source: ACHHUZ4cn5tCD9DUU4uEafGOaguGceHqrEtxN9LZgaLUZ8+0eUk7TqL8Z4NXEU23GZsCCJkFLtDV6Q== X-Received: by 2002:a05:600c:224d:b0:3f8:1110:60c2 with SMTP id a13-20020a05600c224d00b003f8111060c2mr4009580wmm.33.1686561896419; Mon, 12 Jun 2023 02:24:56 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a222:bbe9:c688:33ae]) by smtp.gmail.com with ESMTPSA id p14-20020a7bcc8e000000b003f727764b10sm10892044wma.4.2023.06.12.02.24.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 02:24:56 -0700 (PDT) From: Bartosz Golaszewski To: Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Bartosz Golaszewski Subject: [PATCH 21/26] net: stmmac: dwmac-qcom-ethqos: add support for emac4 on sa8775p platforms Date: Mon, 12 Jun 2023 11:23:50 +0200 Message-Id: <20230612092355.87937-22-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230612092355.87937-1-brgl@bgdev.pl> References: <20230612092355.87937-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski sa8775p uses EMAC version 4, add the relevant defines, rename the has_emac3 switch to has_emac_ge_3 (has emac greater-or-equal than 3) and add the new compatible. Signed-off-by: Bartosz Golaszewski --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 64 +++++++++++++++---- 1 file changed, 50 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/driv= ers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 247e3888cca0..047c569e5480 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -89,7 +89,8 @@ struct ethqos_emac_driver_data { const struct ethqos_emac_por *por; unsigned int num_por; bool rgmii_config_loopback_en; - bool has_emac3; + bool has_emac_ge_3; + bool has_integrated_pcs; struct dwmac4_addrs dwmac4_addrs; }; =20 @@ -109,7 +110,7 @@ struct qcom_ethqos { const struct ethqos_emac_por *por; unsigned int num_por; bool rgmii_config_loopback_en; - bool has_emac3; + bool has_emac_ge_3; }; =20 static int rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset) @@ -203,7 +204,7 @@ static const struct ethqos_emac_driver_data emac_v2_3_0= _data =3D { .por =3D emac_v2_3_0_por, .num_por =3D ARRAY_SIZE(emac_v2_3_0_por), .rgmii_config_loopback_en =3D true, - .has_emac3 =3D false, + .has_emac_ge_3 =3D false, }; =20 static const struct ethqos_emac_por emac_v2_1_0_por[] =3D { @@ -219,7 +220,7 @@ static const struct ethqos_emac_driver_data emac_v2_1_0= _data =3D { .por =3D emac_v2_1_0_por, .num_por =3D ARRAY_SIZE(emac_v2_1_0_por), .rgmii_config_loopback_en =3D false, - .has_emac3 =3D false, + .has_emac_ge_3 =3D false, }; =20 static const struct ethqos_emac_por emac_v3_0_0_por[] =3D { @@ -235,7 +236,40 @@ static const struct ethqos_emac_driver_data emac_v3_0_= 0_data =3D { .por =3D emac_v3_0_0_por, .num_por =3D ARRAY_SIZE(emac_v3_0_0_por), .rgmii_config_loopback_en =3D false, - .has_emac3 =3D true, + .has_emac_ge_3 =3D true, + .dwmac4_addrs =3D { + .dma_chan =3D 0x00008100, + .dma_chan_offset =3D 0x1000, + .mtl_chan =3D 0x00008000, + .mtl_chan_offset =3D 0x1000, + .mtl_ets_ctrl =3D 0x00008010, + .mtl_ets_ctrl_offset =3D 0x1000, + .mtl_txq_weight =3D 0x00008018, + .mtl_txq_weight_offset =3D 0x1000, + .mtl_send_slp_cred =3D 0x0000801c, + .mtl_send_slp_cred_offset =3D 0x1000, + .mtl_high_cred =3D 0x00008020, + .mtl_high_cred_offset =3D 0x1000, + .mtl_low_cred =3D 0x00008024, + .mtl_low_cred_offset =3D 0x1000, + }, +}; + +static const struct ethqos_emac_por emac_v4_0_0_por[] =3D { + { .offset =3D RGMII_IO_MACRO_CONFIG, .value =3D 0x40c01343 }, + { .offset =3D SDCC_HC_REG_DLL_CONFIG, .value =3D 0x2004642c }, + { .offset =3D SDCC_HC_REG_DDR_CONFIG, .value =3D 0x80040800 }, + { .offset =3D SDCC_HC_REG_DLL_CONFIG2, .value =3D 0x00200000 }, + { .offset =3D SDCC_USR_CTL, .value =3D 0x00010800 }, + { .offset =3D RGMII_IO_MACRO_CONFIG2, .value =3D 0x00002060 }, +}; + +static const struct ethqos_emac_driver_data emac_v4_0_0_data =3D { + .por =3D emac_v4_0_0_por, + .num_por =3D ARRAY_SIZE(emac_v3_0_0_por), + .rgmii_config_loopback_en =3D false, + .has_emac_ge_3 =3D true, + .has_integrated_pcs =3D true, .dwmac4_addrs =3D { .dma_chan =3D 0x00008100, .dma_chan_offset =3D 0x1000, @@ -276,7 +310,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *eth= qos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN, SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG); =20 - if (!ethqos->has_emac3) { + if (!ethqos->has_emac_ge_3) { rgmii_updatel(ethqos, SDCC_DLL_MCLK_GATING_EN, 0, SDCC_HC_REG_DLL_CONFIG); =20 @@ -317,7 +351,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *eth= qos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_HC_REG_DLL_CONFIG2); =20 - if (!ethqos->has_emac3) { + if (!ethqos->has_emac_ge_3) { rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS, 0, SDCC_HC_REG_DLL_CONFIG2); =20 @@ -387,7 +421,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *= ethqos) /* PRG_RCLK_DLY =3D TCXO period * TCXO_CYCLES_CNT / 2 * RX delay ns, * in practice this becomes PRG_RCLK_DLY =3D 52 * 4 / 2 * RX delay ns */ - if (ethqos->has_emac3) { + if (ethqos->has_emac_ge_3) { /* 0.9 ns */ rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY, 115, SDCC_HC_REG_DDR_CONFIG); @@ -422,7 +456,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *= ethqos) rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, 0, RGMII_IO_MACRO_CONFIG2); =20 - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_IO_MACRO_CONFIG2); @@ -462,7 +496,7 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *= ethqos) RGMII_IO_MACRO_CONFIG); rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, 0, RGMII_IO_MACRO_CONFIG2); - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_CONFIG2_RX_PROG_SWAP, RGMII_IO_MACRO_CONFIG2); @@ -512,7 +546,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *e= thqos) rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN, SDCC_DLL_CONFIG_PDN, SDCC_HC_REG_DLL_CONFIG); =20 - if (ethqos->has_emac3) { + if (ethqos->has_emac_ge_3) { if (ethqos->speed =3D=3D SPEED_1000) { rgmii_writel(ethqos, 0x1800000, SDCC_TEST_CTL); rgmii_writel(ethqos, 0x2C010800, SDCC_USR_CTL); @@ -542,7 +576,7 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *e= thqos) SDCC_HC_REG_DLL_CONFIG); =20 /* Set USR_CTL bit 26 with mask of 3 bits */ - if (!ethqos->has_emac3) + if (!ethqos->has_emac_ge_3) rgmii_updatel(ethqos, GENMASK(26, 24), BIT(26), SDCC_USR_CTL); =20 @@ -729,7 +763,7 @@ static int qcom_ethqos_probe(struct platform_device *pd= ev) ethqos->por =3D data->por; ethqos->num_por =3D data->num_por; ethqos->rgmii_config_loopback_en =3D data->rgmii_config_loopback_en; - ethqos->has_emac3 =3D data->has_emac3; + ethqos->has_emac_ge_3 =3D data->has_emac_ge_3; =20 ethqos->rgmii_clk =3D devm_clk_get_optional(dev, "rgmii"); if (IS_ERR(ethqos->rgmii_clk)) { @@ -769,12 +803,13 @@ static int qcom_ethqos_probe(struct platform_device *= pdev) plat_dat->fix_mac_speed =3D ethqos_fix_mac_speed; plat_dat->dump_debug_regs =3D rgmii_dump; plat_dat->has_gmac4 =3D 1; - if (ethqos->has_emac3) + if (ethqos->has_emac_ge_3) plat_dat->dwmac4_addrs =3D &data->dwmac4_addrs; plat_dat->pmt =3D 1; plat_dat->tso_en =3D of_property_read_bool(np, "snps,tso"); if (of_device_is_compatible(np, "qcom,qcs404-ethqos")) plat_dat->rx_clk_runs_in_lpi =3D 1; + plat_dat->has_integrated_pcs =3D data->has_integrated_pcs; =20 if (ethqos->serdes_phy) { plat_dat->serdes_powerup =3D qcom_ethqos_serdes_powerup; @@ -795,6 +830,7 @@ static int qcom_ethqos_probe(struct platform_device *pd= ev) =20 static const struct of_device_id qcom_ethqos_match[] =3D { { .compatible =3D "qcom,qcs404-ethqos", .data =3D &emac_v2_3_0_data}, + { .compatible =3D "qcom,sa8775p-ethqos", .data =3D &emac_v4_0_0_data}, { .compatible =3D "qcom,sc8280xp-ethqos", .data =3D &emac_v3_0_0_data}, { .compatible =3D "qcom,sm8150-ethqos", .data =3D &emac_v2_1_0_data}, { } --=20 2.39.2