From nobody Sun Feb 8 02:55:50 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFA96C7EE29 for ; Fri, 9 Jun 2023 19:52:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230094AbjFITwn (ORCPT ); Fri, 9 Jun 2023 15:52:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49984 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229524AbjFITwl (ORCPT ); Fri, 9 Jun 2023 15:52:41 -0400 Received: from finn.localdomain (finn.gateworks.com [108.161.129.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 198B61730; Fri, 9 Jun 2023 12:52:36 -0700 (PDT) Received: from 068-189-091-139.biz.spectrum.com ([68.189.91.139] helo=tharvey.pdc.gateworks.com) by finn.localdomain with esmtp (Exim 4.93) (envelope-from ) id 1q7i9m-006Cop-EF; Fri, 09 Jun 2023 19:52:22 +0000 From: Tim Harvey To: linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Tim Harvey Subject: [PATCH v3] arm64: dts: imx8mp-venice-gw74xx: update to revB PCB Date: Fri, 9 Jun 2023 12:52:19 -0700 Message-Id: <20230609195220.3399055-1-tharvey@gateworks.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Update the imx8mp-venice-gw74xx for revB: - add CAN1 - add TIS-TPM on SPI2 - add FAN controller - fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for backward compatible option) - M2 socket GPIO's moved Signed-off-by: Tim Harvey --- v3: - add missing address-cells and size-cells to gsc node causing dtbs_check warnings v2: - fix fan-controller unit-address --- .../dts/freescale/imx8mp-venice-gw74xx.dts | 263 +++++++++++------- 1 file changed, 161 insertions(+), 102 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/= arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts index 92514b71b5f4..3473423ac939 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts @@ -125,12 +125,22 @@ reg_usb2_vbus: regulator-usb2 { regulator-max-microvolt =3D <5000000>; }; =20 + reg_can1_stby: regulator-can1-stby { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_reg_can1>; + regulator-name =3D "can1_stby"; + gpio =3D <&gpio3 19 GPIO_ACTIVE_LOW>; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + reg_can2_stby: regulator-can2-stby { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_reg_can>; + pinctrl-0 =3D <&pinctrl_reg_can2>; regulator-name =3D "can2_stby"; - gpio =3D <&gpio3 19 GPIO_ACTIVE_LOW>; + gpio =3D <&gpio5 5 GPIO_ACTIVE_LOW>; regulator-min-microvolt =3D <3300000>; regulator-max-microvolt =3D <3300000>; }; @@ -164,6 +174,21 @@ &A53_3 { cpu-supply =3D <®_arm>; }; =20 +&ecspi1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_spi1>; + cs-gpios =3D <&gpio5 9 GPIO_ACTIVE_LOW>; + status =3D "okay"; + + tpm@0 { + compatible =3D "tcg,tpm_tis-spi"; + #address-cells =3D <0x1>; + #size-cells =3D <0x1>; + reg =3D <0x0>; + spi-max-frequency =3D <36000000>; + }; +}; + /* off-board header */ &ecspi2 { pinctrl-names =3D "default"; @@ -204,6 +229,13 @@ fixed-link { }; }; =20 +&flexcan1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_flexcan1>; + xceiver-supply =3D <®_can1_stby>; + status =3D "okay"; +}; + &flexcan2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_flexcan2>; @@ -214,38 +246,38 @@ &flexcan2 { &gpio1 { gpio-line-names =3D "", "", "", "", "", "", "", "", - "", "", "dio0", "", "dio1", "", "", "", + "", "dio0", "", "dio1", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""; }; =20 &gpio2 { gpio-line-names =3D - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "pcie3_wdis#", "", + "", "", "", "", "", "", "m2_pin20", "", + "", "", "", "", "", "pcie1_wdis#", "pcie3_wdis#", "", "", "", "pcie2_wdis#", "", "", "", "", "", "", "", "", "", "", "", "", ""; }; =20 &gpio3 { gpio-line-names =3D - "m2_gdis#", "", "", "", "", "", "", "m2_rst#", + "", "", "", "", "", "", "m2_rst", "", + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - "m2_off#", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""; }; =20 &gpio4 { gpio-line-names =3D + "", "", "m2_off#", "", "", "", "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "m2_wdis#", "", "", "", - "", "", "", "", "", "", "", "uart_rs485"; + "", "", "m2_wdis#", "", "", "", "", "", + "", "", "", "", "", "", "", "rs485_en"; }; =20 &gpio5 { gpio-line-names =3D - "uart_half", "uart_term", "", "", "", "", "", "", + "rs485_hd", "rs485_term", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""; @@ -268,6 +300,8 @@ gsc: gsc@20 { interrupts =3D <20 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; =20 adc { compatible =3D "gw,gsc-adc"; @@ -286,6 +320,12 @@ channel@8 { label =3D "vdd_bat"; }; =20 + channel@16 { + gw,mode =3D <4>; + reg =3D <0x16>; + label =3D "fan_tach"; + }; + channel@82 { gw,mode =3D <2>; reg =3D <0x82>; @@ -358,6 +398,11 @@ channel@a2 { gw,voltage-divider-ohms =3D <10000 10000>; }; }; + + fan-controller@a { + compatible =3D "gw,gsc-fan"; + reg =3D <0x0a>; + }; }; =20 gpio: gpio@23 { @@ -369,85 +414,6 @@ gpio: gpio@23 { interrupts =3D <4>; }; =20 - pmic@25 { - compatible =3D "nxp,pca9450c"; - reg =3D <0x25>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_pmic>; - interrupt-parent =3D <&gpio3>; - interrupts =3D <7 IRQ_TYPE_LEVEL_LOW>; - - regulators { - BUCK1 { - regulator-name =3D "BUCK1"; - regulator-min-microvolt =3D <720000>; - regulator-max-microvolt =3D <1000000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay =3D <3125>; - }; - - reg_arm: BUCK2 { - regulator-name =3D "BUCK2"; - regulator-min-microvolt =3D <720000>; - regulator-max-microvolt =3D <1025000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay =3D <3125>; - nxp,dvs-run-voltage =3D <950000>; - nxp,dvs-standby-voltage =3D <850000>; - }; - - BUCK4 { - regulator-name =3D "BUCK4"; - regulator-min-microvolt =3D <3000000>; - regulator-max-microvolt =3D <3600000>; - regulator-boot-on; - regulator-always-on; - }; - - BUCK5 { - regulator-name =3D "BUCK5"; - regulator-min-microvolt =3D <1650000>; - regulator-max-microvolt =3D <1950000>; - regulator-boot-on; - regulator-always-on; - }; - - BUCK6 { - regulator-name =3D "BUCK6"; - regulator-min-microvolt =3D <1045000>; - regulator-max-microvolt =3D <1155000>; - regulator-boot-on; - regulator-always-on; - }; - - LDO1 { - regulator-name =3D "LDO1"; - regulator-min-microvolt =3D <1650000>; - regulator-max-microvolt =3D <1950000>; - regulator-boot-on; - regulator-always-on; - }; - - LDO3 { - regulator-name =3D "LDO3"; - regulator-min-microvolt =3D <1710000>; - regulator-max-microvolt =3D <1890000>; - regulator-boot-on; - regulator-always-on; - }; - - LDO5 { - regulator-name =3D "LDO5"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; - eeprom@50 { compatible =3D "atmel,24c02"; reg =3D <0x50>; @@ -559,7 +525,6 @@ fixed-link { }; }; =20 -/* off-board header */ &i2c3 { clock-frequency =3D <400000>; pinctrl-names =3D "default", "gpio"; @@ -568,6 +533,85 @@ &i2c3 { scl-gpios =3D <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios =3D <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "okay"; + + pmic@25 { + compatible =3D "nxp,pca9450c"; + reg =3D <0x25>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pmic>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <7 IRQ_TYPE_LEVEL_LOW>; + + regulators { + BUCK1 { + regulator-name =3D "BUCK1"; + regulator-min-microvolt =3D <720000>; + regulator-max-microvolt =3D <1000000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay =3D <3125>; + }; + + reg_arm: BUCK2 { + regulator-name =3D "BUCK2"; + regulator-min-microvolt =3D <720000>; + regulator-max-microvolt =3D <1025000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay =3D <3125>; + nxp,dvs-run-voltage =3D <950000>; + nxp,dvs-standby-voltage =3D <850000>; + }; + + BUCK4 { + regulator-name =3D "BUCK4"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3600000>; + regulator-boot-on; + regulator-always-on; + }; + + BUCK5 { + regulator-name =3D "BUCK5"; + regulator-min-microvolt =3D <1650000>; + regulator-max-microvolt =3D <1950000>; + regulator-boot-on; + regulator-always-on; + }; + + BUCK6 { + regulator-name =3D "BUCK6"; + regulator-min-microvolt =3D <1045000>; + regulator-max-microvolt =3D <1155000>; + regulator-boot-on; + regulator-always-on; + }; + + LDO1 { + regulator-name =3D "LDO1"; + regulator-min-microvolt =3D <1650000>; + regulator-max-microvolt =3D <1950000>; + regulator-boot-on; + regulator-always-on; + }; + + LDO3 { + regulator-name =3D "LDO3"; + regulator-min-microvolt =3D <1710000>; + regulator-max-microvolt =3D <1890000>; + regulator-boot-on; + regulator-always-on; + }; + + LDO5 { + regulator-name =3D "LDO5"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; =20 /* off-board header */ @@ -726,12 +770,14 @@ pinctrl_hog: hoggrp { fsl,pins =3D < MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40000040 /* DIO0 */ MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x40000040 /* DIO1 */ - MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000040 /* M2SKT_OFF# */ - MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000150 /* PCIE2_WDIS# */ + MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x40000040 /* M2SKT_OFF# */ + MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS# */ + MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40000040 /* M2SKT_PIN20 */ + MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x40000040 /* M2SKT_PIN22 */ + MX8MP_IOMUXC_SD2_CLK__GPIO2_IO13 0x40000150 /* PCIE1_WDIS# */ MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14 0x40000150 /* PCIE3_WDIS# */ + MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000150 /* PCIE2_WDIS# */ MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06 0x40000040 /* M2SKT_RST# */ - MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS# */ - MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00 0x40000150 /* M2SKT_GDIS# */ MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x40000104 /* UART_TERM */ MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x40000104 /* UART_RS485 */ MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x40000104 /* UART_HALF */ @@ -784,6 +830,13 @@ MX8MP_IOMUXC_SAI1_RXC__ENET1_1588_EVENT0_OUT 0x140 >; }; =20 + pinctrl_flexcan1: flexcan1grp { + fsl,pins =3D < + MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 + MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 + >; + }; + pinctrl_flexcan2: flexcan2grp { fsl,pins =3D < MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154 @@ -869,7 +922,7 @@ MX8MP_IOMUXC_SD2_DATA1__GPIO2_IO16 0x10 =20 pinctrl_pcie0: pciegrp { fsl,pins =3D < - MX8MP_IOMUXC_SD2_DATA2__GPIO2_IO17 0x110 + MX8MP_IOMUXC_SD2_DATA2__GPIO2_IO17 0x106 >; }; =20 @@ -885,12 +938,18 @@ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x140 >; }; =20 - pinctrl_reg_can: regcangrp { + pinctrl_reg_can1: regcan1grp { fsl,pins =3D < MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x154 >; }; =20 + pinctrl_reg_can2: regcan2grp { + fsl,pins =3D < + MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x154 + >; + }; + pinctrl_reg_usb2: regusb2grp { fsl,pins =3D < MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x140 @@ -903,12 +962,12 @@ MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09 0x110 >; }; =20 - pinctrl_sai2: sai2grp { + pinctrl_spi1: spi1grp { fsl,pins =3D < - MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6 - MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6 - MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6 - MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK 0xd6 + MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x82 + MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x82 + MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x82 + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140 >; }; =20 --=20 2.34.1