From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A621C8300C for ; Fri, 9 Jun 2023 08:53:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240568AbjFIIw6 (ORCPT ); Fri, 9 Jun 2023 04:52:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238928AbjFIIwZ (ORCPT ); Fri, 9 Jun 2023 04:52:25 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B8FB95; Fri, 9 Jun 2023 01:52:21 -0700 (PDT) X-UUID: ef24577406a211ee9cb5633481061a41-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=dLIYRoXshZCYjSVWIjyzdBAAVLO0fisUp3j6Z8T0P4A=; b=WJcos5W5Et208j+7Ov+VCgujf7AwzkGwRkTxArFJGzYkL8TAaLTC4lMzBwC7fgJes8ALOKUW7INM3bjiqWljN23pNxG7wtFKdtuZDpzS9U4lRTo9P7w0+emRgTROjmpYTABl4Er5ZBZAbYrxhQ+CMbQo2nKlmiB53O5S7C1AiH8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:70af0df7-d156-4991-861e-a728b95b32fb,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:47,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:47 X-CID-INFO: VERSION:1.1.26,REQID:70af0df7-d156-4991-861e-a728b95b32fb,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:47,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:47 X-CID-META: VersionHash:cb9a4e1,CLOUDID:15f8ea3d-de1e-4348-bc35-c96f92f1dcbb,B ulkID:230609165216951NQGEH,BulkQuantity:0,Recheck:0,SF:48|101|38|29|28|100 |17|19|102,TC:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:nil,QS:ni l,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_ULN,TF_CID_SPAM_SNR,TF_CID_SPAM_SDM,TF_CID_SPAM_FAS, TF_CID_SPAM_FSD X-UUID: ef24577406a211ee9cb5633481061a41-20230609 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1656020971; Fri, 09 Jun 2023 16:52:16 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:15 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , Willix Yeh Subject: [PATCH v4 1/9] docs: geniezone: Introduce GenieZone hypervisor Date: Fri, 9 Jun 2023 16:52:06 +0800 Message-ID: <20230609085214.31071-2-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Yi-De Wu" GenieZone is MediaTek proprietary hypervisor solution, and it is running in EL2 stand alone as a type-I hypervisor. It is a pure EL2 implementation which implies it does not rely any specific host VM, and this behavior improves GenieZone's security as it limits its interface. Signed-off-by: Yingshiuan Pan Signed-off-by: Liju Chen Signed-off-by: Yi-De Wu --- Documentation/virt/geniezone/introduction.rst | 79 +++++++++++++++++++ MAINTAINERS | 6 ++ 2 files changed, 85 insertions(+) create mode 100644 Documentation/virt/geniezone/introduction.rst diff --git a/Documentation/virt/geniezone/introduction.rst b/Documentation/= virt/geniezone/introduction.rst new file mode 100644 index 000000000000..872c66f60e7f --- /dev/null +++ b/Documentation/virt/geniezone/introduction.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +GenieZone Introduction +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Overview +=3D=3D=3D=3D=3D=3D=3D=3D + +GenieZone hypervisor(gzvm) is a type-1 hypervisor that supports various vi= rtual +machine types and provides security features such as TEE-like scenarios and +secure boot. It can create guest VMs for security use cases and has +virtualization capabilities for both platform and interrupt. Although the +hypervisor can be booted independently, it requires the assistance of Geni= eZone +hypervisor kernel driver(gzvm-ko) to leverage the ability of Linux kernel = for +vCPU scheduling, memory management, inter-VM communication and virtio back= end +support. + +Supported Architecture +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +GenieZone now only supports MediaTek ARM64 SoC. + +Features +=3D=3D=3D=3D=3D=3D=3D=3D + +- vCPU Management +VM manager aims to provide vCPUs on the basis of time sharing on physical = CPUs. +It requires Linux kernel in host VM for vCPU scheduling and VM power manag= ement. + +- Memory Management +Direct use of physical memory from VMs is forbidden and designed to be dic= tated +to the privilege models managed by GenieZone hypervisor for security reaso= n. +With the help of gzvm-ko, the hypervisor would be able to manipulate memor= y as +objects. + +- Virtual Platform +We manage to emulate a virtual mobile platform for guest OS running on gue= st +VM. The platform supports various architecture-defined devices, such as +virtual virtual arch timer, GIC, MMIO, PSCI, and exception watching...etc. + +- Inter-VM Communication +Communication among guest VMs was provided mainly on RPC. More communicati= on +mechanisms were to be provided in the future based on VirtIO-vsock. + +- Device Virtualization +The solution is provided using the well-known VirtIO. The gzvm-ko would +redirect MMIO traps back to VMM where the virtual devices are mostly emula= ted. +Ioeventfd is implemented using eventfd for signaling host VM that some IO +events in guest VMs need to be processed. + +- Interrupt virtualization +All Interrupts during some guest VMs running would be handled by GenieZone +hypervisor with the help of gzvm-ko, both virtual and physical ones. In ca= se +there's no guest VM running out there, physical interrupts would be handle= d by +host VM directly for performance reason. Irqfd is also implemented using +eventfd for accepting vIRQ requests in gzvm-ko. + +Platform architecture component +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D + +- vm +The vm component is responsible for setting up the capability and memory +management for the protected VMs. The capability is mainly about the lifec= ycle +control and boot context initialization. And the memory management is high= ly +integrated with ARM 2-stage translation tables to convert VA to IPA to PA = under +proper security measures required by protected VMs. + +- vcpu +The vcpu component is the core of virtualizing aarch64 physical CPU runnab= le, +and it controls the vCPU lifecycle including creating, running and destroy= ing. +With self-defined exit handler, the vm component would be able to act +accordingly before terminated. + +- vgic +The vgic component exposes control interfaces to Linux kernel via irqchip,= and +we intend to support all SPI, PPI, and SGI. When it comes to virtual +interrupts, the GenieZone hypervisor would write to list registers and tri= gger +vIRQ injection in guest VMs via GIC. diff --git a/MAINTAINERS b/MAINTAINERS index 3a05599017b4..1b1db2073f8b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8745,6 +8745,12 @@ F: include/vdso/ F: kernel/time/vsyscall.c F: lib/vdso/ =20 +GENIEZONE HYPERVISOR DRIVER +M: Yingshiuan Pan +M: Ze-Yu Wang +M: Yi-De Wu +F: Documentation/virt/geniezone/ + GENWQE (IBM Generic Workqueue Card) M: Frank Haverkamp S: Supported --=20 2.18.0 From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB38CC83005 for ; Fri, 9 Jun 2023 08:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240981AbjFIIxn (ORCPT ); Fri, 9 Jun 2023 04:53:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240537AbjFIIwd (ORCPT ); Fri, 9 Jun 2023 04:52:33 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6AA50172E; Fri, 9 Jun 2023 01:52:25 -0700 (PDT) X-UUID: ef7e5a4406a211eeb20a276fd37b9834-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=geYPtsmtWtmA95TJ/Rnw80aI6crqfydBbxMLQhPHLWA=; b=ibxzb84faRzm4yRFet9JpqyWp+LdtMAsM74B1oyvhaqUXXNvdbNnBiM2lRLJQ2+Db8/nI/aYw2LA6IMTAtLEIdiFjWi13CDDSFl5PNyrOcdQLxPv0MYstIPPqUG1ueWsZwn/7MY4JRQYZ50ROw7l3vOwJPVJc8hQNVYfgKGxoDY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:512389e0-6bc2-4726-be55-89266b5d6c52,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:47,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:22 X-CID-INFO: VERSION:1.1.26,REQID:512389e0-6bc2-4726-be55-89266b5d6c52,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:47,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:22 X-CID-META: VersionHash:cb9a4e1,CLOUDID:02a78f6e-2f20-4998-991c-3b78627e4938,B ulkID:23060916521772YWOAW5,BulkQuantity:2,Recheck:0,SF:17|19|48|101|38|29| 28|100|102,TC:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:43,QS:nil ,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_FAS,TF_CID_SPAM_FSD,TF_CID_SPAM_ULN,TF_CID_SPAM_SNR, TF_CID_SPAM_SDM X-UUID: ef7e5a4406a211eeb20a276fd37b9834-20230609 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1224547990; Fri, 09 Jun 2023 16:52:16 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:15 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , Willix Yeh Subject: [PATCH v4 2/9] virt: geniezone: Add GenieZone hypervisor support Date: Fri, 9 Jun 2023 16:52:07 +0800 Message-ID: <20230609085214.31071-3-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Yingshiuan Pan" GenieZone is MediaTek hypervisor solution, and it is running in EL2 stand alone as a type-I hypervisor. This patch exports a set of ioctl interfaces for userspace VMM (e.g., crosvm) to operate guest VMs lifecycle (creation and destroy) on GenieZone. Signed-off-by: Yingshiuan Pan Signed-off-by: Jerry Wang Signed-off-by: Liju Chen Signed-off-by: Yi-De Wu --- MAINTAINERS | 6 + arch/arm64/Kbuild | 1 + arch/arm64/geniezone/Makefile | 9 + arch/arm64/geniezone/gzvm_arch_common.h | 70 +++++ arch/arm64/geniezone/vm.c | 201 ++++++++++++ arch/arm64/include/uapi/asm/gzvm_arch.h | 20 ++ drivers/virt/Kconfig | 2 + drivers/virt/geniezone/Kconfig | 16 + drivers/virt/geniezone/Makefile | 10 + drivers/virt/geniezone/gzvm_main.c | 141 +++++++++ drivers/virt/geniezone/gzvm_vm.c | 390 ++++++++++++++++++++++++ include/linux/gzvm_drv.h | 95 ++++++ include/uapi/asm-generic/Kbuild | 1 + include/uapi/asm-generic/gzvm_arch.h | 10 + include/uapi/linux/gzvm.h | 73 +++++ 15 files changed, 1045 insertions(+) create mode 100644 arch/arm64/geniezone/Makefile create mode 100644 arch/arm64/geniezone/gzvm_arch_common.h create mode 100644 arch/arm64/geniezone/vm.c create mode 100644 arch/arm64/include/uapi/asm/gzvm_arch.h create mode 100644 drivers/virt/geniezone/Kconfig create mode 100644 drivers/virt/geniezone/Makefile create mode 100644 drivers/virt/geniezone/gzvm_main.c create mode 100644 drivers/virt/geniezone/gzvm_vm.c create mode 100644 include/linux/gzvm_drv.h create mode 100644 include/uapi/asm-generic/gzvm_arch.h create mode 100644 include/uapi/linux/gzvm.h diff --git a/MAINTAINERS b/MAINTAINERS index 1b1db2073f8b..af9f12c33b5c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8750,6 +8750,12 @@ M: Yingshiuan Pan M: Ze-Yu Wang M: Yi-De Wu F: Documentation/virt/geniezone/ +F: arch/arm64/geniezone/ +F: arch/arm64/include/uapi/asm/gzvm_arch.h +F: drivers/virt/geniezone/ +F: include/linux/gzvm_drv.h +F include/uapi/asm-generic/gzvm_arch.h +F: include/uapi/linux/gzvm.h =20 GENWQE (IBM Generic Workqueue Card) M: Frank Haverkamp diff --git a/arch/arm64/Kbuild b/arch/arm64/Kbuild index 5bfbf7d79c99..0c3cca572919 100644 --- a/arch/arm64/Kbuild +++ b/arch/arm64/Kbuild @@ -4,6 +4,7 @@ obj-$(CONFIG_KVM) +=3D kvm/ obj-$(CONFIG_XEN) +=3D xen/ obj-$(subst m,y,$(CONFIG_HYPERV)) +=3D hyperv/ obj-$(CONFIG_CRYPTO) +=3D crypto/ +obj-$(CONFIG_MTK_GZVM) +=3D geniezone/ =20 # for cleaning subdir- +=3D boot diff --git a/arch/arm64/geniezone/Makefile b/arch/arm64/geniezone/Makefile new file mode 100644 index 000000000000..2957898cdd05 --- /dev/null +++ b/arch/arm64/geniezone/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Main Makefile for gzvm, this one includes drivers/virt/geniezone/Makefile +# +include $(srctree)/drivers/virt/geniezone/Makefile + +gzvm-y +=3D vm.o + +obj-$(CONFIG_MTK_GZVM) +=3D gzvm.o diff --git a/arch/arm64/geniezone/gzvm_arch_common.h b/arch/arm64/geniezone= /gzvm_arch_common.h new file mode 100644 index 000000000000..797989468c88 --- /dev/null +++ b/arch/arm64/geniezone/gzvm_arch_common.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#ifndef __GZVM_ARCH_COMMON_H__ +#define __GZVM_ARCH_COMMON_H__ + +#include + +enum { + GZVM_FUNC_CREATE_VM =3D 0, + GZVM_FUNC_DESTROY_VM, + GZVM_FUNC_CREATE_VCPU, + GZVM_FUNC_DESTROY_VCPU, + GZVM_FUNC_SET_MEMREGION, + GZVM_FUNC_RUN, + GZVM_FUNC_GET_REGS, + GZVM_FUNC_SET_REGS, + GZVM_FUNC_GET_ONE_REG, + GZVM_FUNC_SET_ONE_REG, + GZVM_FUNC_IRQ_LINE, + GZVM_FUNC_CREATE_DEVICE, + GZVM_FUNC_PROBE, + GZVM_FUNC_ENABLE_CAP, + NR_GZVM_FUNC +}; + +#define SMC_ENTITY_MTK 59 +#define GZVM_FUNCID_START (0x1000) +#define GZVM_HCALL_ID(func) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_32, \ + SMC_ENTITY_MTK, (GZVM_FUNCID_START + (func))) + +#define MT_HVC_GZVM_CREATE_VM GZVM_HCALL_ID(GZVM_FUNC_CREATE_VM) +#define MT_HVC_GZVM_DESTROY_VM GZVM_HCALL_ID(GZVM_FUNC_DESTROY_VM) +#define MT_HVC_GZVM_CREATE_VCPU GZVM_HCALL_ID(GZVM_FUNC_CREATE_VCPU) +#define MT_HVC_GZVM_DESTROY_VCPU GZVM_HCALL_ID(GZVM_FUNC_DESTROY_VCPU) +#define MT_HVC_GZVM_SET_MEMREGION GZVM_HCALL_ID(GZVM_FUNC_SET_MEMREGION) +#define MT_HVC_GZVM_RUN GZVM_HCALL_ID(GZVM_FUNC_RUN) +#define MT_HVC_GZVM_GET_REGS GZVM_HCALL_ID(GZVM_FUNC_GET_REGS) +#define MT_HVC_GZVM_SET_REGS GZVM_HCALL_ID(GZVM_FUNC_SET_REGS) +#define MT_HVC_GZVM_GET_ONE_REG GZVM_HCALL_ID(GZVM_FUNC_GET_ONE_REG) +#define MT_HVC_GZVM_SET_ONE_REG GZVM_HCALL_ID(GZVM_FUNC_SET_ONE_REG) +#define MT_HVC_GZVM_IRQ_LINE GZVM_HCALL_ID(GZVM_FUNC_IRQ_LINE) +#define MT_HVC_GZVM_CREATE_DEVICE GZVM_HCALL_ID(GZVM_FUNC_CREATE_DEVICE) +#define MT_HVC_GZVM_PROBE GZVM_HCALL_ID(GZVM_FUNC_PROBE) +#define MT_HVC_GZVM_ENABLE_CAP GZVM_HCALL_ID(GZVM_FUNC_ENABLE_CAP) + +/** + * gzvm_hypercall_wrapper() + * + * Return: The wrapper helps caller to convert geniezone errno to Linux er= rno. + */ +static int gzvm_hypcall_wrapper(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, + unsigned long a4, unsigned long a5, + unsigned long a6, unsigned long a7, + struct arm_smccc_res *res) +{ + arm_smccc_hvc(a0, a1, a2, a3, a4, a5, a6, a7, res); + return gz_err_to_errno(res->a0); +} + +static inline gzvm_id_t get_vmid_from_tuple(unsigned int tuple) +{ + return (gzvm_id_t)(tuple >> 16); +} + +#endif /* __GZVM_ARCH_COMMON_H__ */ diff --git a/arch/arm64/geniezone/vm.c b/arch/arm64/geniezone/vm.c new file mode 100644 index 000000000000..9f1f14f71b99 --- /dev/null +++ b/arch/arm64/geniezone/vm.c @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include +#include +#include + +#include +#include +#include "gzvm_arch_common.h" + +#define PAR_PA47_MASK ((((1UL << 48) - 1) >> 12) << 12) + +int gzvm_arch_probe(void) +{ + struct arm_smccc_res res; + + arm_smccc_hvc(MT_HVC_GZVM_PROBE, 0, 0, 0, 0, 0, 0, 0, &res); + if (res.a0 =3D=3D 0) + return 0; + + return -ENXIO; +} + +int gzvm_arch_set_memregion(gzvm_id_t vm_id, size_t buf_size, + phys_addr_t region) +{ + struct arm_smccc_res res; + + return gzvm_hypcall_wrapper(MT_HVC_GZVM_SET_MEMREGION, vm_id, + buf_size, region, 0, 0, 0, 0, &res); +} + +static int gzvm_cap_arm_vm_ipa_size(void __user *argp) +{ + __u64 value =3D CONFIG_ARM64_PA_BITS; + + if (copy_to_user(argp, &value, sizeof(__u64))) + return -EFAULT; + + return 0; +} + +int gzvm_arch_check_extension(struct gzvm *gzvm, __u64 cap, void __user *a= rgp) +{ + int ret =3D -EOPNOTSUPP; + + switch (cap) { + case GZVM_CAP_ARM_PROTECTED_VM: { + __u64 success =3D 1; + + if (copy_to_user(argp, &success, sizeof(__u64))) + return -EFAULT; + ret =3D 0; + break; + } + case GZVM_CAP_ARM_VM_IPA_SIZE: { + ret =3D gzvm_cap_arm_vm_ipa_size(argp); + break; + } + default: + ret =3D -EOPNOTSUPP; + } + + return ret; +} + +/** + * gzvm_arch_create_vm() + * + * Return: + * * positive value - VM ID + * * -ENOMEM - Memory not enough for storing VM data + */ +int gzvm_arch_create_vm(void) +{ + struct arm_smccc_res res; + int ret; + + ret =3D gzvm_hypcall_wrapper(MT_HVC_GZVM_CREATE_VM, 0, 0, 0, 0, 0, 0, 0, + &res); + + if (ret =3D=3D 0) + return res.a1; + else + return ret; +} + +int gzvm_arch_destroy_vm(gzvm_id_t vm_id) +{ + struct arm_smccc_res res; + + return gzvm_hypcall_wrapper(MT_HVC_GZVM_DESTROY_VM, vm_id, 0, 0, 0, 0, + 0, 0, &res); +} + +static int gzvm_vm_arch_enable_cap(struct gzvm *gzvm, struct gzvm_enable_c= ap *cap, + struct arm_smccc_res *res) +{ + return gzvm_hypcall_wrapper(MT_HVC_GZVM_ENABLE_CAP, gzvm->vm_id, + cap->cap, cap->args[0], cap->args[1], + cap->args[2], cap->args[3], cap->args[4], + res); +} + +/** + * gzvm_vm_ioctl_get_pvmfw_size() - Get pvmfw size from hypervisor, return + * in x1, and return to userspace in args. + * + * Return: + * * 0 - Succeed + * * -EINVAL - Hypervisor return invalid results + * * -EFAULT - Fail to copy back to userspace buffer + */ +static int gzvm_vm_ioctl_get_pvmfw_size(struct gzvm *gzvm, + struct gzvm_enable_cap *cap, + void __user *argp) +{ + struct arm_smccc_res res =3D {0}; + + if (gzvm_vm_arch_enable_cap(gzvm, cap, &res) !=3D 0) + return -EINVAL; + + cap->args[1] =3D res.a1; + if (copy_to_user(argp, cap, sizeof(*cap))) + return -EFAULT; + + return 0; +} + +/** + * gzvm_vm_ioctl_cap_pvm() - Proceed GZVM_CAP_ARM_PROTECTED_VM's subcomman= ds + * + * Return: + * * 0 - Succeed + * * -EINVAL - Invalid subcommand or arguments + */ +static int gzvm_vm_ioctl_cap_pvm(struct gzvm *gzvm, struct gzvm_enable_cap= *cap, + void __user *argp) +{ + int ret =3D -EINVAL; + struct arm_smccc_res res =3D {0}; + + switch (cap->args[0]) { + case GZVM_CAP_ARM_PVM_SET_PVMFW_IPA: + fallthrough; + case GZVM_CAP_ARM_PVM_SET_PROTECTED_VM: + ret =3D gzvm_vm_arch_enable_cap(gzvm, cap, &res); + break; + case GZVM_CAP_ARM_PVM_GET_PVMFW_SIZE: + ret =3D gzvm_vm_ioctl_get_pvmfw_size(gzvm, cap, argp); + break; + default: + ret =3D -EINVAL; + break; + } + + return ret; +} + +int gzvm_vm_ioctl_arch_enable_cap(struct gzvm *gzvm, struct gzvm_enable_ca= p *cap, + void __user *argp) +{ + int ret =3D -EINVAL; + + switch (cap->cap) { + case GZVM_CAP_ARM_PROTECTED_VM: + ret =3D gzvm_vm_ioctl_cap_pvm(gzvm, cap, argp); + break; + default: + ret =3D -EINVAL; + break; + } + + return ret; +} + +/** + * hva_to_pa_arch() - converts hva to pa with arch-specific way + * + * Return: 0 if translation error + */ +u64 hva_to_pa_arch(u64 hva) +{ + u64 par; + unsigned long flags; + + local_irq_save(flags); + asm volatile("at s1e1r, %0" :: "r" (hva)); + isb(); + par =3D read_sysreg_par(); + local_irq_restore(flags); + + if (par & SYS_PAR_EL1_F) + return 0; + + return par & PAR_PA47_MASK; +} diff --git a/arch/arm64/include/uapi/asm/gzvm_arch.h b/arch/arm64/include/u= api/asm/gzvm_arch.h new file mode 100644 index 000000000000..847bb627a65d --- /dev/null +++ b/arch/arm64/include/uapi/asm/gzvm_arch.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#ifndef __GZVM_ARCH_H__ +#define __GZVM_ARCH_H__ + +#include + +#define GZVM_CAP_ARM_VM_IPA_SIZE 165 +#define GZVM_CAP_ARM_PROTECTED_VM 0xffbadab1 + +/* sub-commands put in args[0] for GZVM_CAP_ARM_PROTECTED_VM */ +#define GZVM_CAP_ARM_PVM_SET_PVMFW_IPA 0 +#define GZVM_CAP_ARM_PVM_GET_PVMFW_SIZE 1 +/* GZVM_CAP_ARM_PVM_SET_PROTECTED_VM only sets protected but not load pvmf= w */ +#define GZVM_CAP_ARM_PVM_SET_PROTECTED_VM 2 + +#endif /* __GZVM_ARCH_H__ */ diff --git a/drivers/virt/Kconfig b/drivers/virt/Kconfig index f79ab13a5c28..9bbf0bdf672c 100644 --- a/drivers/virt/Kconfig +++ b/drivers/virt/Kconfig @@ -54,4 +54,6 @@ source "drivers/virt/coco/sev-guest/Kconfig" =20 source "drivers/virt/coco/tdx-guest/Kconfig" =20 +source "drivers/virt/geniezone/Kconfig" + endif diff --git a/drivers/virt/geniezone/Kconfig b/drivers/virt/geniezone/Kconfig new file mode 100644 index 000000000000..2643fb8913cc --- /dev/null +++ b/drivers/virt/geniezone/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config MTK_GZVM + tristate "GenieZone Hypervisor driver for guest VM operation" + depends on ARM64 + help + This driver, gzvm, enables to run guest VMs on MTK GenieZone + hypervisor. It exports kvm-like interfaces for VMM (e.g., crosvm) in + order to operate guest VMs on GenieZone hypervisor. + + GenieZone hypervisor now only supports MediaTek SoC and arm64 + architecture. + + Select M if you want it be built as a module (gzvm.ko). + + If unsure, say N. diff --git a/drivers/virt/geniezone/Makefile b/drivers/virt/geniezone/Makef= ile new file mode 100644 index 000000000000..066efddc0b9c --- /dev/null +++ b/drivers/virt/geniezone/Makefile @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Makefile for GenieZone driver, this file should be include in arch's +# to avoid two ko being generated. +# + +GZVM_DIR ?=3D ../../../drivers/virt/geniezone + +gzvm-y :=3D $(GZVM_DIR)/gzvm_main.o $(GZVM_DIR)/gzvm_vm.o + diff --git a/drivers/virt/geniezone/gzvm_main.c b/drivers/virt/geniezone/gz= vm_main.c new file mode 100644 index 000000000000..230970cb0953 --- /dev/null +++ b/drivers/virt/geniezone/gzvm_main.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct miscdevice *gzvm_debug_dev; + +/** + * gz_err_to_errno() - Convert geniezone return value to standard errno + * + * @err: Return value from geniezone function return + * + * Return: Standard errno + */ +int gz_err_to_errno(unsigned long err) +{ + int gz_err =3D (int)err; + + switch (gz_err) { + case 0: + return 0; + case ERR_NO_MEMORY: + return -ENOMEM; + case ERR_NOT_SUPPORTED: + return -EOPNOTSUPP; + case ERR_NOT_IMPLEMENTED: + return -EOPNOTSUPP; + case ERR_FAULT: + return -EFAULT; + default: + break; + } + + return -EINVAL; +} + +/** + * gzvm_dev_ioctl_check_extension() - Check if given capability is support + * or not + * + * @gzvm: + * @args: Pointer in u64 from userspace + * + * Return: + * * 0 - Support, no error + * * -EOPNOTSUPP - Not support + * * -EFAULT - Failed to get data from userspace + */ +long gzvm_dev_ioctl_check_extension(struct gzvm *gzvm, unsigned long args) +{ + __u64 cap; + void __user *argp =3D (void __user *)args; + + if (copy_from_user(&cap, argp, sizeof(uint64_t))) + return -EFAULT; + return gzvm_arch_check_extension(gzvm, cap, argp); +} + +static long gzvm_dev_ioctl(struct file *filp, unsigned int cmd, + unsigned long user_args) +{ + long ret =3D -ENOTTY; + + switch (cmd) { + case GZVM_CREATE_VM: + ret =3D gzvm_dev_ioctl_create_vm(user_args); + break; + case GZVM_CHECK_EXTENSION: + if (!user_args) + return -EINVAL; + ret =3D gzvm_dev_ioctl_check_extension(NULL, user_args); + break; + default: + ret =3D -ENOTTY; + } + + return ret; +} + +static const struct file_operations gzvm_chardev_ops =3D { + .unlocked_ioctl =3D gzvm_dev_ioctl, + .llseek =3D noop_llseek, +}; + +static struct miscdevice gzvm_dev =3D { + .minor =3D MISC_DYNAMIC_MINOR, + .name =3D MODULE_NAME, + .fops =3D &gzvm_chardev_ops, +}; + +static int gzvm_drv_probe(void) +{ + int ret; + + if (gzvm_arch_probe() !=3D 0) { + pr_err("Not found available conduit\n"); + return -ENODEV; + } + + ret =3D misc_register(&gzvm_dev); + if (ret) + return ret; + gzvm_debug_dev =3D &gzvm_dev; + + return 0; +} + +static int gzvm_drv_remove(void) +{ + destroy_all_vm(); + misc_deregister(&gzvm_dev); + return 0; +} + +static int gzvm_dev_init(void) +{ + return gzvm_drv_probe(); +} + +static void gzvm_dev_exit(void) +{ + gzvm_drv_remove(); +} + +module_init(gzvm_dev_init); +module_exit(gzvm_dev_exit); + +MODULE_AUTHOR("MediaTek"); +MODULE_DESCRIPTION("GenieZone interface for VMM"); +MODULE_LICENSE("GPL"); diff --git a/drivers/virt/geniezone/gzvm_vm.c b/drivers/virt/geniezone/gzvm= _vm.c new file mode 100644 index 000000000000..34a1f024f8e5 --- /dev/null +++ b/drivers/virt/geniezone/gzvm_vm.c @@ -0,0 +1,390 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_MUTEX(gzvm_list_lock); +static LIST_HEAD(gzvm_list); + +/** + * hva_to_pa_fast() - converts hva to pa in generic fast way + * + * Return: 0 if translation error + */ +static u64 hva_to_pa_fast(u64 hva) +{ + struct page *page[1]; + + u64 pfn; + + if (get_user_page_fast_only(hva, 0, page)) { + pfn =3D page_to_phys(page[0]); + put_page((struct page *)page); + return pfn; + } else { + return 0; + } +} + +/** + * hva_to_pa_slow() - note that this function may sleep. + * + * Return: 0 if translation error + */ +static u64 hva_to_pa_slow(u64 hva) +{ + struct page *page; + int npages; + u64 pfn; + + npages =3D get_user_pages_unlocked(hva, 1, &page, 0); + if (npages !=3D 1) + return 0; + + pfn =3D page_to_phys(page); + put_page(page); + + return pfn; +} + +static u64 gzvm_gfn_to_hva_memslot(struct gzvm_memslot *memslot, u64 gfn) +{ + u64 offset =3D gfn - memslot->base_gfn; + + return memslot->userspace_addr + offset * PAGE_SIZE; +} + +static u64 __gzvm_gfn_to_pfn_memslot(struct gzvm_memslot *memslot, u64 gfn) +{ + u64 hva, pa; + + hva =3D gzvm_gfn_to_hva_memslot(memslot, gfn); + + pa =3D hva_to_pa_arch(hva); + if (pa !=3D 0) + return PHYS_PFN(pa); + + pa =3D hva_to_pa_fast(hva); + if (pa) + return PHYS_PFN(pa); + + pa =3D hva_to_pa_slow(hva); + if (pa) + return PHYS_PFN(pa); + + return 0; +} + +/** + * gzvm_gfn_to_pfn_memslot() - Translate gfn (guest ipa) to pfn (host pa), + * result is in @pfn + * + * Return: + * * 0 - Succeed + * * -EFAULT - Failed to convert + */ +static int gzvm_gfn_to_pfn_memslot(struct gzvm_memslot *memslot, u64 gfn, = u64 *pfn) +{ + u64 __pfn; + + if (!memslot) + return -EFAULT; + + __pfn =3D __gzvm_gfn_to_pfn_memslot(memslot, gfn); + if (__pfn =3D=3D 0) { + *pfn =3D 0; + return -EFAULT; + } + + *pfn =3D __pfn; + + return 0; +} + +/** + * fill_constituents() - Populate pa to buffer until full + * + * Return: how many pages we've fill in, negative if error + */ +static int fill_constituents(struct mem_region_addr_range *consti, + int *consti_cnt, int max_nr_consti, u64 gfn, + u32 total_pages, struct gzvm_memslot *slot) +{ + u64 pfn, prev_pfn, gfn_end; + int nr_pages =3D 1; + int i =3D 0; + + if (unlikely(total_pages =3D=3D 0)) + return -EINVAL; + gfn_end =3D gfn + total_pages; + + /* entry 0 */ + if (gzvm_gfn_to_pfn_memslot(slot, gfn, &pfn) !=3D 0) + return -EFAULT; + consti[0].address =3D PFN_PHYS(pfn); + consti[0].pg_cnt =3D 1; + gfn++; + prev_pfn =3D pfn; + + while (i < max_nr_consti && gfn < gfn_end) { + if (gzvm_gfn_to_pfn_memslot(slot, gfn, &pfn) !=3D 0) + return -EFAULT; + if (pfn =3D=3D (prev_pfn + 1)) { + consti[i].pg_cnt++; + } else { + i++; + if (i >=3D max_nr_consti) + break; + consti[i].address =3D PFN_PHYS(pfn); + consti[i].pg_cnt =3D 1; + } + prev_pfn =3D pfn; + gfn++; + nr_pages++; + } + if (i !=3D max_nr_consti) + i++; + *consti_cnt =3D i; + + return nr_pages; +} + +/* register_memslot_addr_range() - Register memory region to GZ */ +static int +register_memslot_addr_range(struct gzvm *gzvm, struct gzvm_memslot *memslo= t) +{ + struct gzvm_memory_region_ranges *region; + u32 buf_size; + int max_nr_consti, remain_pages; + u64 gfn, gfn_end; + + buf_size =3D PAGE_SIZE * 2; + region =3D alloc_pages_exact(buf_size, GFP_KERNEL); + if (!region) + return -ENOMEM; + max_nr_consti =3D (buf_size - sizeof(*region)) / + sizeof(struct mem_region_addr_range); + + region->slot =3D memslot->slot_id; + remain_pages =3D memslot->npages; + gfn =3D memslot->base_gfn; + gfn_end =3D gfn + remain_pages; + while (gfn < gfn_end) { + int nr_pages; + + nr_pages =3D fill_constituents(region->constituents, + ®ion->constituent_cnt, + max_nr_consti, gfn, + remain_pages, memslot); + if (nr_pages < 0) { + pr_err("Failed to fill constituents\n"); + free_pages_exact(region, buf_size); + return nr_pages; + } + region->gpa =3D PFN_PHYS(gfn); + region->total_pages =3D nr_pages; + + remain_pages -=3D nr_pages; + gfn +=3D nr_pages; + + if (gzvm_arch_set_memregion(gzvm->vm_id, buf_size, + virt_to_phys(region))) { + dev_err(gzvm_debug_dev->this_device, + "Failed to register memregion to hypervisor\n"); + free_pages_exact(region, buf_size); + return -EFAULT; + } + } + free_pages_exact(region, buf_size); + return 0; +} + +/** + * gzvm_vm_ioctl_set_memory_region() - Set memory region of guest + * + * @mem: input memory region from user + * + * Return: + * * -EXIO - memslot is out-of-range + * * -EFAULT - Cannot find corresponding vma + * * -EINVAL - region size and vma size does not match + */ +static int +gzvm_vm_ioctl_set_memory_region(struct gzvm *gzvm, + struct gzvm_userspace_memory_region *mem) +{ + struct vm_area_struct *vma; + struct gzvm_memslot *memslot; + unsigned long size; + __u32 slot; + + slot =3D mem->slot; + if (slot >=3D GZVM_MAX_MEM_REGION) + return -ENXIO; + memslot =3D &gzvm->memslot[slot]; + + vma =3D vma_lookup(gzvm->mm, mem->userspace_addr); + if (!vma) + return -EFAULT; + + size =3D vma->vm_end - vma->vm_start; + if (size !=3D mem->memory_size) + return -EINVAL; + + memslot->base_gfn =3D __phys_to_pfn(mem->guest_phys_addr); + memslot->npages =3D size >> PAGE_SHIFT; + memslot->userspace_addr =3D mem->userspace_addr; + memslot->vma =3D vma; + memslot->flags =3D mem->flags; + memslot->slot_id =3D mem->slot; + return register_memslot_addr_range(gzvm, memslot); +} + +static int gzvm_vm_ioctl_enable_cap(struct gzvm *gzvm, + struct gzvm_enable_cap *cap, + void __user *argp) +{ + return gzvm_vm_ioctl_arch_enable_cap(gzvm, cap, argp); +} + +/* gzvm_vm_ioctl() - Ioctl handler of VM FD */ +static long gzvm_vm_ioctl(struct file *filp, unsigned int ioctl, + unsigned long arg) +{ + long ret =3D -ENOTTY; + void __user *argp =3D (void __user *)arg; + struct gzvm *gzvm =3D filp->private_data; + + switch (ioctl) { + case GZVM_CHECK_EXTENSION: { + ret =3D gzvm_dev_ioctl_check_extension(gzvm, arg); + break; + } + case GZVM_SET_USER_MEMORY_REGION: { + struct gzvm_userspace_memory_region userspace_mem; + + ret =3D -EFAULT; + if (copy_from_user(&userspace_mem, argp, + sizeof(userspace_mem))) + goto out; + ret =3D gzvm_vm_ioctl_set_memory_region(gzvm, &userspace_mem); + break; + } + case GZVM_ENABLE_CAP: { + struct gzvm_enable_cap cap; + + ret =3D -EFAULT; + if (copy_from_user(&cap, argp, sizeof(cap))) + goto out; + + ret =3D gzvm_vm_ioctl_enable_cap(gzvm, &cap, argp); + break; + } + default: + ret =3D -ENOTTY; + } +out: + return ret; +} + +static void gzvm_destroy_vm(struct gzvm *gzvm) +{ + dev_info(gzvm_debug_dev->this_device, + "VM-%u is going to be destroyed\n", gzvm->vm_id); + + mutex_lock(&gzvm->lock); + + gzvm_arch_destroy_vm(gzvm->vm_id); + + mutex_lock(&gzvm_list_lock); + list_del(&gzvm->vm_list); + mutex_unlock(&gzvm_list_lock); + + mutex_unlock(&gzvm->lock); + + kfree(gzvm); +} + +static int gzvm_vm_release(struct inode *inode, struct file *filp) +{ + struct gzvm *gzvm =3D filp->private_data; + + gzvm_destroy_vm(gzvm); + return 0; +} + +static const struct file_operations gzvm_vm_fops =3D { + .release =3D gzvm_vm_release, + .unlocked_ioctl =3D gzvm_vm_ioctl, + .llseek =3D noop_llseek, +}; + +static struct gzvm *gzvm_create_vm(unsigned long vm_type) +{ + int ret; + struct gzvm *gzvm; + + gzvm =3D kzalloc(sizeof(*gzvm), GFP_KERNEL); + if (!gzvm) + return ERR_PTR(-ENOMEM); + + ret =3D gzvm_arch_create_vm(); + if (ret < 0) { + kfree(gzvm); + return ERR_PTR(ret); + } + + gzvm->vm_id =3D ret; + gzvm->mm =3D current->mm; + mutex_init(&gzvm->lock); + + mutex_lock(&gzvm_list_lock); + list_add(&gzvm->vm_list, &gzvm_list); + mutex_unlock(&gzvm_list_lock); + + pr_info("VM-%u is created\n", gzvm->vm_id); + + return gzvm; +} + +/** + * gzvm_dev_ioctl_create_vm - Create vm fd + * + * Return: fd of vm, negative if error + */ +int gzvm_dev_ioctl_create_vm(unsigned long vm_type) +{ + struct gzvm *gzvm; + + gzvm =3D gzvm_create_vm(vm_type); + if (IS_ERR(gzvm)) + return PTR_ERR(gzvm); + + return anon_inode_getfd("gzvm-vm", &gzvm_vm_fops, gzvm, + O_RDWR | O_CLOEXEC); +} + +void destroy_all_vm(void) +{ + struct gzvm *gzvm, *tmp; + + mutex_lock(&gzvm_list_lock); + if (list_empty(&gzvm_list)) + goto out; + + list_for_each_entry_safe(gzvm, tmp, &gzvm_list, vm_list) + gzvm_destroy_vm(gzvm); + +out: + mutex_unlock(&gzvm_list_lock); +} diff --git a/include/linux/gzvm_drv.h b/include/linux/gzvm_drv.h new file mode 100644 index 000000000000..c6bbfd9894c1 --- /dev/null +++ b/include/linux/gzvm_drv.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#ifndef __GZVM_DRV_H__ +#define __GZVM_DRV_H__ + +#include +#include +#include +#include +#include + +#define MODULE_NAME "gzvm" +#define GZVM_VCPU_MMAP_SIZE PAGE_SIZE +#define INVALID_VM_ID 0xffff + +/** + * These are the efinitions of APIs between GenieZone hypervisor and drive= r, + * there's no need to be visible to uapi. Furthermore, We need GenieZone + * specific error code in order to map to Linux errno + */ +#define NO_ERROR (0) +#define ERR_NO_MEMORY (-5) +#define ERR_NOT_SUPPORTED (-24) +#define ERR_NOT_IMPLEMENTED (-27) +#define ERR_FAULT (-40) + +/** + * The following data structures are for data transferring between driver = and + * hypervisor, and they're aligned with hypervisor definitions + */ +#define GZVM_MAX_VCPUS 8 +#define GZVM_MAX_MEM_REGION 10 + +/* struct mem_region_addr_range - Identical to ffa memory constituent */ +struct mem_region_addr_range { + /* the base IPA of the constituent memory region, aligned to 4 kiB */ + __u64 address; + /* the number of 4 kiB pages in the constituent memory region. */ + __u32 pg_cnt; + __u32 reserved; +}; + +struct gzvm_memory_region_ranges { + __u32 slot; + __u32 constituent_cnt; + __u64 total_pages; + __u64 gpa; + struct mem_region_addr_range constituents[]; +}; + +/* struct gzvm_memslot - VM's memory slot descriptor */ +struct gzvm_memslot { + u64 base_gfn; /* begin of guest page frame */ + unsigned long npages; /* number of pages this slot covers */ + unsigned long userspace_addr; /* corresponding userspace va */ + struct vm_area_struct *vma; /* vma related to this userspace addr */ + u32 flags; + u32 slot_id; +}; + +struct gzvm { + /* userspace tied to this vm */ + struct mm_struct *mm; + struct gzvm_memslot memslot[GZVM_MAX_MEM_REGION]; + /* lock for list_add*/ + struct mutex lock; + struct list_head vm_list; + gzvm_id_t vm_id; +}; + +long gzvm_dev_ioctl_check_extension(struct gzvm *gzvm, unsigned long args); +int gzvm_dev_ioctl_create_vm(unsigned long vm_type); + +int gz_err_to_errno(unsigned long err); + +void destroy_all_vm(void); + +/* arch-dependant functions */ +int gzvm_arch_probe(void); +int gzvm_arch_set_memregion(gzvm_id_t vm_id, size_t buf_size, + phys_addr_t region); +int gzvm_arch_check_extension(struct gzvm *gzvm, __u64 cap, void __user *a= rgp); +int gzvm_arch_create_vm(void); +int gzvm_arch_destroy_vm(gzvm_id_t vm_id); +int gzvm_vm_ioctl_arch_enable_cap(struct gzvm *gzvm, + struct gzvm_enable_cap *cap, + void __user *argp); +u64 hva_to_pa_arch(u64 hva); + +extern struct miscdevice *gzvm_debug_dev; + +#endif /* __GZVM_DRV_H__ */ diff --git a/include/uapi/asm-generic/Kbuild b/include/uapi/asm-generic/Kbu= ild index ebb180aac74e..5af115a3c1a8 100644 --- a/include/uapi/asm-generic/Kbuild +++ b/include/uapi/asm-generic/Kbuild @@ -34,3 +34,4 @@ mandatory-y +=3D termbits.h mandatory-y +=3D termios.h mandatory-y +=3D types.h mandatory-y +=3D unistd.h +mandatory-y +=3D gzvm_arch.h diff --git a/include/uapi/asm-generic/gzvm_arch.h b/include/uapi/asm-generi= c/gzvm_arch.h new file mode 100644 index 000000000000..c4cc12716c91 --- /dev/null +++ b/include/uapi/asm-generic/gzvm_arch.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#ifndef __ASM_GENERIC_GZVM_ARCH_H +#define __ASM_GENERIC_GZVM_ARCH_H +/* geniezone only supports aarch64 platform for now */ + +#endif /* __ASM_GENERIC_GZVM_ARCH_H */ diff --git a/include/uapi/linux/gzvm.h b/include/uapi/linux/gzvm.h new file mode 100644 index 000000000000..1f06d950043d --- /dev/null +++ b/include/uapi/linux/gzvm.h @@ -0,0 +1,73 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +/** + * DOC: UAPI of GenieZone Hypervisor + * + * This file declares common data structure shared among user space, + * kernel space, and GenieZone hypervisor. + */ +#ifndef __GZVM_H__ +#define __GZVM_H__ + +#include +#include +#include + +#include + +typedef __u16 gzvm_id_t; +typedef __u16 gzvm_vcpu_id_t; + +/* GZVM ioctls */ +#define GZVM_IOC_MAGIC 0x92 /* gz */ + +/* ioctls for /dev/gzvm fds */ +#define GZVM_GET_API_VERSION _IO(GZVM_IOC_MAGIC, 0x00) +#define GZVM_CREATE_VM _IO(GZVM_IOC_MAGIC, 0x01) + +#define GZVM_CHECK_EXTENSION _IO(GZVM_IOC_MAGIC, 0x03) + +/* ioctls for VM fds */ +/* for GZVM_SET_MEMORY_REGION */ +struct gzvm_memory_region { + __u32 slot; + __u32 flags; + __u64 guest_phys_addr; + __u64 memory_size; /* bytes */ +}; + +#define GZVM_SET_MEMORY_REGION _IOW(GZVM_IOC_MAGIC, 0x40, \ + struct gzvm_memory_region) + +/* for GZVM_SET_USER_MEMORY_REGION */ +struct gzvm_userspace_memory_region { + __u32 slot; + __u32 flags; + __u64 guest_phys_addr; + /* bytes */ + __u64 memory_size; + /* start of the userspace allocated memory */ + __u64 userspace_addr; +}; + +#define GZVM_SET_USER_MEMORY_REGION _IOW(GZVM_IOC_MAGIC, 0x46, \ + struct gzvm_userspace_memory_region) + +/* for GZVM_ENABLE_CAP */ +struct gzvm_enable_cap { + /* in */ + __u64 cap; + /** + * we have total 5 (8 - 3) registers can be used for + * additional args + */ + __u64 args[5]; +}; + +#define GZVM_ENABLE_CAP _IOW(GZVM_IOC_MAGIC, 0xa3, \ + struct gzvm_enable_cap) + +#endif /* __GZVM_H__ */ --=20 2.18.0 From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB342C7EE29 for ; Fri, 9 Jun 2023 08:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236312AbjFIIxj (ORCPT ); Fri, 9 Jun 2023 04:53:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239813AbjFIIw1 (ORCPT ); Fri, 9 Jun 2023 04:52:27 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B144F5; Fri, 9 Jun 2023 01:52:24 -0700 (PDT) X-UUID: ef4692a806a211eeb20a276fd37b9834-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=EsL9GPyqYjhOLJ/D28n2jiNopiopks90ZcQ4fiT4abk=; b=JBDtvuguyFY4NHCBaOtW7lKshabr6oxqgUcMPsmxVAGQ9osGEbT53Bs59rqdiK0BjSuLcwanbMBng3zz+9mMzZewn1oocGD022iyYtdSWIvd7OMUrvgs04RpsQ7vS53AIZz+9ml3b/V1GHm90z6k00PNpBd6HeE6QVO5tZzDlwU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:8a70db86-b485-4cc1-ada7-6205a0a8d0d1,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:cb9a4e1,CLOUDID:fea68f6e-2f20-4998-991c-3b78627e4938,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: ef4692a806a211eeb20a276fd37b9834-20230609 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1799832156; Fri, 09 Jun 2023 16:52:16 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:15 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , Willix Yeh Subject: [PATCH v4 3/9] virt: geniezone: Add vcpu support Date: Fri, 9 Jun 2023 16:52:08 +0800 Message-ID: <20230609085214.31071-4-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Yingshiuan Pan" VMM use this interface to create vcpu instance which is a fd, and this fd will be for any vcpu operations, such as setting vcpu registers and accepts the most important ioctl GZVM_VCPU_RUN which requests GenieZone hypervisor to do context switch to execute VM's vcpu context. Signed-off-by: Yingshiuan Pan Signed-off-by: Jerry Wang Signed-off-by: Liju Chen Signed-off-by: Yi-De Wu --- arch/arm64/geniezone/Makefile | 2 +- arch/arm64/geniezone/gzvm_arch_common.h | 19 ++ arch/arm64/geniezone/vcpu.c | 84 +++++++++ arch/arm64/include/uapi/asm/gzvm_arch.h | 29 +++ drivers/virt/geniezone/Makefile | 3 +- drivers/virt/geniezone/gzvm_vcpu.c | 234 ++++++++++++++++++++++++ drivers/virt/geniezone/gzvm_vm.c | 5 + include/linux/gzvm_drv.h | 19 ++ include/uapi/linux/gzvm.h | 101 ++++++++++ 9 files changed, 494 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/geniezone/vcpu.c create mode 100644 drivers/virt/geniezone/gzvm_vcpu.c diff --git a/arch/arm64/geniezone/Makefile b/arch/arm64/geniezone/Makefile index 2957898cdd05..69b0a4abeab0 100644 --- a/arch/arm64/geniezone/Makefile +++ b/arch/arm64/geniezone/Makefile @@ -4,6 +4,6 @@ # include $(srctree)/drivers/virt/geniezone/Makefile =20 -gzvm-y +=3D vm.o +gzvm-y +=3D vm.o vcpu.o =20 obj-$(CONFIG_MTK_GZVM) +=3D gzvm.o diff --git a/arch/arm64/geniezone/gzvm_arch_common.h b/arch/arm64/geniezone= /gzvm_arch_common.h index 797989468c88..1b315264bf24 100644 --- a/arch/arm64/geniezone/gzvm_arch_common.h +++ b/arch/arm64/geniezone/gzvm_arch_common.h @@ -67,4 +67,23 @@ static inline gzvm_id_t get_vmid_from_tuple(unsigned int= tuple) return (gzvm_id_t)(tuple >> 16); } =20 +static inline gzvm_vcpu_id_t get_vcpuid_from_tuple(unsigned int tuple) +{ + return (gzvm_vcpu_id_t)(tuple & 0xffff); +} + +static inline unsigned int +assemble_vm_vcpu_tuple(gzvm_id_t vmid, gzvm_vcpu_id_t vcpuid) +{ + return ((unsigned int)vmid << 16 | vcpuid); +} + +static inline void +disassemble_vm_vcpu_tuple(unsigned int tuple, gzvm_id_t *vmid, + gzvm_vcpu_id_t *vcpuid) +{ + *vmid =3D get_vmid_from_tuple(tuple); + *vcpuid =3D get_vcpuid_from_tuple(tuple); +} + #endif /* __GZVM_ARCH_COMMON_H__ */ diff --git a/arch/arm64/geniezone/vcpu.c b/arch/arm64/geniezone/vcpu.c new file mode 100644 index 000000000000..8d2572bdf053 --- /dev/null +++ b/arch/arm64/geniezone/vcpu.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include +#include + +#include +#include +#include "gzvm_arch_common.h" + +int gzvm_arch_vcpu_update_one_reg(struct gzvm_vcpu *vcpu, __u64 reg_id, + bool is_write, __u64 *data) +{ + struct arm_smccc_res res; + unsigned long a1; + int ret; + + /* reg id follows KVM's encoding */ + switch (reg_id & GZVM_REG_ARM_COPROC_MASK) { + case GZVM_REG_ARM_CORE: + break; + default: + return -EOPNOTSUPP; + } + + a1 =3D assemble_vm_vcpu_tuple(vcpu->gzvm->vm_id, vcpu->vcpuid); + if (!is_write) { + ret =3D gzvm_hypcall_wrapper(MT_HVC_GZVM_GET_ONE_REG, + a1, reg_id, 0, 0, 0, 0, 0, &res); + if (ret =3D=3D 0) + *data =3D res.a1; + } else { + ret =3D gzvm_hypcall_wrapper(MT_HVC_GZVM_SET_ONE_REG, + a1, reg_id, *data, 0, 0, 0, 0, &res); + } + + return ret; +} + +int gzvm_arch_vcpu_run(struct gzvm_vcpu *vcpu, __u64 *exit_reason) +{ + struct arm_smccc_res res; + unsigned long a1; + int ret; + + a1 =3D assemble_vm_vcpu_tuple(vcpu->gzvm->vm_id, vcpu->vcpuid); + ret =3D gzvm_hypcall_wrapper(MT_HVC_GZVM_RUN, a1, 0, 0, 0, 0, 0, + 0, &res); + *exit_reason =3D res.a1; + return ret; +} + +int gzvm_arch_destroy_vcpu(gzvm_id_t vm_id, int vcpuid) +{ + struct arm_smccc_res res; + unsigned long a1; + + a1 =3D assemble_vm_vcpu_tuple(vm_id, vcpuid); + gzvm_hypcall_wrapper(MT_HVC_GZVM_DESTROY_VCPU, a1, 0, 0, 0, 0, 0, 0, + &res); + + return 0; +} + +/** + * gzvm_arch_create_vcpu() - Call smc to gz hypervisor to create vcpu + * @run: Virtual address of vcpu->run + */ +int gzvm_arch_create_vcpu(gzvm_id_t vm_id, int vcpuid, void *run) +{ + struct arm_smccc_res res; + unsigned long a1, a2; + int ret; + + a1 =3D assemble_vm_vcpu_tuple(vm_id, vcpuid); + a2 =3D (__u64)virt_to_phys(run); + ret =3D gzvm_hypcall_wrapper(MT_HVC_GZVM_CREATE_VCPU, a1, a2, 0, 0, 0, 0, + 0, &res); + + return ret; +} diff --git a/arch/arm64/include/uapi/asm/gzvm_arch.h b/arch/arm64/include/u= api/asm/gzvm_arch.h index 847bb627a65d..e45e8e9e1bea 100644 --- a/arch/arm64/include/uapi/asm/gzvm_arch.h +++ b/arch/arm64/include/uapi/asm/gzvm_arch.h @@ -17,4 +17,33 @@ /* GZVM_CAP_ARM_PVM_SET_PROTECTED_VM only sets protected but not load pvmf= w */ #define GZVM_CAP_ARM_PVM_SET_PROTECTED_VM 2 =20 +/** + * Architecture specific registers are to be defined in arch headers and + * ORed with the arch identifier. + */ +#define GZVM_REG_ARM 0x4000000000000000ULL +#define GZVM_REG_ARM64 0x6000000000000000ULL + +#define GZVM_REG_SIZE_SHIFT 52 +#define GZVM_REG_SIZE_MASK 0x00f0000000000000ULL +#define GZVM_REG_SIZE_U8 0x0000000000000000ULL +#define GZVM_REG_SIZE_U16 0x0010000000000000ULL +#define GZVM_REG_SIZE_U32 0x0020000000000000ULL +#define GZVM_REG_SIZE_U64 0x0030000000000000ULL +#define GZVM_REG_SIZE_U128 0x0040000000000000ULL +#define GZVM_REG_SIZE_U256 0x0050000000000000ULL +#define GZVM_REG_SIZE_U512 0x0060000000000000ULL +#define GZVM_REG_SIZE_U1024 0x0070000000000000ULL +#define GZVM_REG_SIZE_U2048 0x0080000000000000ULL + +#define GZVM_REG_ARCH_MASK 0xff00000000000000ULL + +/* If you need to interpret the index values, here is the key: */ +#define GZVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 +#define GZVM_REG_ARM_COPROC_SHIFT 16 + +/* Normal registers are mapped as coprocessor 16. */ +#define GZVM_REG_ARM_CORE (0x0010 << GZVM_REG_ARM_COPROC_SHIFT) +#define GZVM_REG_ARM_CORE_REG(name) (offsetof(struct gzvm_regs, name) / si= zeof(__u32)) + #endif /* __GZVM_ARCH_H__ */ diff --git a/drivers/virt/geniezone/Makefile b/drivers/virt/geniezone/Makef= ile index 066efddc0b9c..8ebf2db0c970 100644 --- a/drivers/virt/geniezone/Makefile +++ b/drivers/virt/geniezone/Makefile @@ -6,5 +6,6 @@ =20 GZVM_DIR ?=3D ../../../drivers/virt/geniezone =20 -gzvm-y :=3D $(GZVM_DIR)/gzvm_main.o $(GZVM_DIR)/gzvm_vm.o +gzvm-y :=3D $(GZVM_DIR)/gzvm_main.o $(GZVM_DIR)/gzvm_vm.o \ + $(GZVM_DIR)/gzvm_vcpu.o =20 diff --git a/drivers/virt/geniezone/gzvm_vcpu.c b/drivers/virt/geniezone/gz= vm_vcpu.c new file mode 100644 index 000000000000..5e9d34fcc1ea --- /dev/null +++ b/drivers/virt/geniezone/gzvm_vcpu.c @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* maximum size needed for holding an integer */ +#define ITOA_MAX_LEN 12 + +static long gzvm_vcpu_update_one_reg(struct gzvm_vcpu *vcpu, void * __user= argp, + bool is_write) +{ + struct gzvm_one_reg reg; + void __user *reg_addr; + u64 data =3D 0; + u64 reg_size; + long ret; + + if (copy_from_user(®, argp, sizeof(reg))) + return -EFAULT; + + reg_addr =3D (void __user *)reg.addr; + reg_size =3D (reg.id & GZVM_REG_SIZE_MASK) >> GZVM_REG_SIZE_SHIFT; + reg_size =3D BIT(reg_size); + + if (is_write) { + if (copy_from_user(&data, reg_addr, reg_size)) + return -EFAULT; + } + + ret =3D gzvm_arch_vcpu_update_one_reg(vcpu, reg.id, is_write, &data); + + if (ret) + return ret; + + if (!is_write) { + if (copy_to_user(reg_addr, &data, reg_size)) + return -EFAULT; + } + + return 0; +} + +/** + * gzvm_vcpu_run() - Handle vcpu run ioctl, entry point to guest and exit + * point from guest + * @argp: Pointer to struct gzvm_vcpu_run in userspace + */ +static long gzvm_vcpu_run(struct gzvm_vcpu *vcpu, void * __user argp) +{ + bool need_userspace =3D false; + u64 exit_reason; + + if (copy_from_user(vcpu->run, argp, sizeof(struct gzvm_vcpu_run))) + return -EFAULT; + + if (vcpu->run->immediate_exit =3D=3D 1) + return -EINTR; + + while (!need_userspace && !signal_pending(current)) { + gzvm_arch_vcpu_run(vcpu, &exit_reason); + + switch (exit_reason) { + case GZVM_EXIT_MMIO: + need_userspace =3D true; + break; + /** + * it's geniezone's responsibility to fill corresponding data + * structure + */ + case GZVM_EXIT_HYPERCALL: + fallthrough; + case GZVM_EXIT_EXCEPTION: + fallthrough; + case GZVM_EXIT_DEBUG: + fallthrough; + case GZVM_EXIT_FAIL_ENTRY: + fallthrough; + case GZVM_EXIT_INTERNAL_ERROR: + fallthrough; + case GZVM_EXIT_SYSTEM_EVENT: + fallthrough; + case GZVM_EXIT_SHUTDOWN: + need_userspace =3D true; + break; + case GZVM_EXIT_IRQ: + break; + case GZVM_EXIT_UNKNOWN: + fallthrough; + default: + dev_err(gzvm_debug_dev->this_device, "vcpu unknown exit\n"); + need_userspace =3D true; + goto out; + } + } + +out: + if (copy_to_user(argp, vcpu->run, sizeof(struct gzvm_vcpu_run))) + return -EFAULT; + if (signal_pending(current)) + return -ERESTARTSYS; + return 0; +} + +static long gzvm_vcpu_ioctl(struct file *filp, unsigned int ioctl, + unsigned long arg) +{ + int ret =3D -ENOTTY; + void __user *argp =3D (void __user *)arg; + struct gzvm_vcpu *vcpu =3D filp->private_data; + + switch (ioctl) { + case GZVM_RUN: + ret =3D gzvm_vcpu_run(vcpu, argp); + break; + case GZVM_GET_ONE_REG: + /* is_write */ + ret =3D gzvm_vcpu_update_one_reg(vcpu, argp, false); + break; + case GZVM_SET_ONE_REG: + /* is_write */ + ret =3D gzvm_vcpu_update_one_reg(vcpu, argp, true); + break; + default: + break; + } + + return ret; +} + +static const struct file_operations gzvm_vcpu_fops =3D { + .unlocked_ioctl =3D gzvm_vcpu_ioctl, + .llseek =3D noop_llseek, +}; + +/* caller must hold the vm lock */ +static void gzvm_destroy_vcpu(struct gzvm_vcpu *vcpu) +{ + if (!vcpu) + return; + + gzvm_arch_destroy_vcpu(vcpu->gzvm->vm_id, vcpu->vcpuid); + /* clean guest's data */ + memset(vcpu->run, 0, GZVM_VCPU_RUN_MAP_SIZE); + free_pages_exact(vcpu->run, GZVM_VCPU_RUN_MAP_SIZE); + kfree(vcpu); +} + +/** + * gzvm_destroy_vcpus() - Destroy all vcpus, caller has to hold the vm lock + * + * @gzvm: vm struct that owns the vcpus + */ +void gzvm_destroy_vcpus(struct gzvm *gzvm) +{ + int i; + + for (i =3D 0; i < GZVM_MAX_VCPUS; i++) { + gzvm_destroy_vcpu(gzvm->vcpus[i]); + gzvm->vcpus[i] =3D NULL; + } +} + +/* create_vcpu_fd() - Allocates an inode for the vcpu. */ +static int create_vcpu_fd(struct gzvm_vcpu *vcpu) +{ + /* sizeof("gzvm-vcpu:") + max(strlen(itoa(vcpuid))) + null */ + char name[10 + ITOA_MAX_LEN + 1]; + + snprintf(name, sizeof(name), "gzvm-vcpu:%d", vcpu->vcpuid); + return anon_inode_getfd(name, &gzvm_vcpu_fops, vcpu, O_RDWR | O_CLOEXEC); +} + +/** + * gzvm_vm_ioctl_create_vcpu() + * + * @cpuid: equals arg + * + * Return: Fd of vcpu, negative errno if error occurs + */ +int gzvm_vm_ioctl_create_vcpu(struct gzvm *gzvm, u32 cpuid) +{ + struct gzvm_vcpu *vcpu; + int ret; + + if (cpuid >=3D GZVM_MAX_VCPUS) + return -EINVAL; + + vcpu =3D kzalloc(sizeof(*vcpu), GFP_KERNEL); + if (!vcpu) + return -ENOMEM; + + /** + * Allocate 2 pages for data sharing between driver and gz hypervisor + * + * |- page 0 -|- page 1 -| + * |gzvm_vcpu_run|......|hwstate|.......| + * + */ + vcpu->run =3D alloc_pages_exact(GZVM_VCPU_RUN_MAP_SIZE, + GFP_KERNEL_ACCOUNT | __GFP_ZERO); + if (!vcpu->run) { + ret =3D -ENOMEM; + goto free_vcpu; + } + vcpu->vcpuid =3D cpuid; + vcpu->gzvm =3D gzvm; + mutex_init(&vcpu->lock); + + ret =3D gzvm_arch_create_vcpu(gzvm->vm_id, vcpu->vcpuid, vcpu->run); + if (ret < 0) + goto free_vcpu_run; + + ret =3D create_vcpu_fd(vcpu); + if (ret < 0) + goto free_vcpu_run; + gzvm->vcpus[cpuid] =3D vcpu; + + return ret; + +free_vcpu_run: + free_pages_exact(vcpu->run, GZVM_VCPU_RUN_MAP_SIZE); +free_vcpu: + kfree(vcpu); + return ret; +} diff --git a/drivers/virt/geniezone/gzvm_vm.c b/drivers/virt/geniezone/gzvm= _vm.c index 34a1f024f8e5..f777c3bdb5ac 100644 --- a/drivers/virt/geniezone/gzvm_vm.c +++ b/drivers/virt/geniezone/gzvm_vm.c @@ -270,6 +270,10 @@ static long gzvm_vm_ioctl(struct file *filp, unsigned = int ioctl, ret =3D gzvm_dev_ioctl_check_extension(gzvm, arg); break; } + case GZVM_CREATE_VCPU: { + ret =3D gzvm_vm_ioctl_create_vcpu(gzvm, arg); + break; + } case GZVM_SET_USER_MEMORY_REGION: { struct gzvm_userspace_memory_region userspace_mem; =20 @@ -304,6 +308,7 @@ static void gzvm_destroy_vm(struct gzvm *gzvm) =20 mutex_lock(&gzvm->lock); =20 + gzvm_destroy_vcpus(gzvm); gzvm_arch_destroy_vm(gzvm->vm_id); =20 mutex_lock(&gzvm_list_lock); diff --git a/include/linux/gzvm_drv.h b/include/linux/gzvm_drv.h index c6bbfd9894c1..7768bd35113a 100644 --- a/include/linux/gzvm_drv.h +++ b/include/linux/gzvm_drv.h @@ -34,6 +34,8 @@ #define GZVM_MAX_VCPUS 8 #define GZVM_MAX_MEM_REGION 10 =20 +#define GZVM_VCPU_RUN_MAP_SIZE (PAGE_SIZE * 2) + /* struct mem_region_addr_range - Identical to ffa memory constituent */ struct mem_region_addr_range { /* the base IPA of the constituent memory region, aligned to 4 kiB */ @@ -61,7 +63,16 @@ struct gzvm_memslot { u32 slot_id; }; =20 +struct gzvm_vcpu { + struct gzvm *gzvm; + int vcpuid; + /* lock of vcpu*/ + struct mutex lock; + struct gzvm_vcpu_run *run; +}; + struct gzvm { + struct gzvm_vcpu *vcpus[GZVM_MAX_VCPUS]; /* userspace tied to this vm */ struct mm_struct *mm; struct gzvm_memslot memslot[GZVM_MAX_MEM_REGION]; @@ -78,6 +89,8 @@ int gz_err_to_errno(unsigned long err); =20 void destroy_all_vm(void); =20 +void gzvm_destroy_vcpus(struct gzvm *gzvm); + /* arch-dependant functions */ int gzvm_arch_probe(void); int gzvm_arch_set_memregion(gzvm_id_t vm_id, size_t buf_size, @@ -89,6 +102,12 @@ int gzvm_vm_ioctl_arch_enable_cap(struct gzvm *gzvm, struct gzvm_enable_cap *cap, void __user *argp); u64 hva_to_pa_arch(u64 hva); +int gzvm_vm_ioctl_create_vcpu(struct gzvm *gzvm, u32 cpuid); +int gzvm_arch_vcpu_update_one_reg(struct gzvm_vcpu *vcpu, __u64 reg_id, + bool is_write, __u64 *data); +int gzvm_arch_create_vcpu(gzvm_id_t vm_id, int vcpuid, void *run); +int gzvm_arch_vcpu_run(struct gzvm_vcpu *vcpu, __u64 *exit_reason); +int gzvm_arch_destroy_vcpu(gzvm_id_t vm_id, int vcpuid); =20 extern struct miscdevice *gzvm_debug_dev; =20 diff --git a/include/uapi/linux/gzvm.h b/include/uapi/linux/gzvm.h index 1f06d950043d..38b3f20114ab 100644 --- a/include/uapi/linux/gzvm.h +++ b/include/uapi/linux/gzvm.h @@ -41,6 +41,11 @@ struct gzvm_memory_region { =20 #define GZVM_SET_MEMORY_REGION _IOW(GZVM_IOC_MAGIC, 0x40, \ struct gzvm_memory_region) +/** + * GZVM_CREATE_VCPU receives as a parameter the vcpu slot, + * and returns a vcpu fd. + */ +#define GZVM_CREATE_VCPU _IO(GZVM_IOC_MAGIC, 0x41) =20 /* for GZVM_SET_USER_MEMORY_REGION */ struct gzvm_userspace_memory_region { @@ -56,6 +61,89 @@ struct gzvm_userspace_memory_region { #define GZVM_SET_USER_MEMORY_REGION _IOW(GZVM_IOC_MAGIC, 0x46, \ struct gzvm_userspace_memory_region) =20 +/** + * ioctls for vcpu fds + */ +#define GZVM_RUN _IO(GZVM_IOC_MAGIC, 0x80) + +/* VM exit reason */ +enum { + GZVM_EXIT_UNKNOWN =3D 0x92920000, + GZVM_EXIT_MMIO, + GZVM_EXIT_HYPERCALL, + GZVM_EXIT_IRQ, + GZVM_EXIT_EXCEPTION, + GZVM_EXIT_DEBUG, + GZVM_EXIT_FAIL_ENTRY, + GZVM_EXIT_INTERNAL_ERROR, + GZVM_EXIT_SYSTEM_EVENT, + GZVM_EXIT_SHUTDOWN, +}; + +/** + * struct gzvm_cpu_run: Same purpose as kvm_run, this struct is + * shared between userspace, kernel and + * GenieZone hypervisor + * + * Keep identical layout between the 3 modules + */ +struct gzvm_vcpu_run { + /* to userspace */ + __u32 exit_reason; + __u8 immediate_exit; + __u8 padding1[3]; + /* union structure of collection of guest exit reason */ + union { + /* GZVM_EXIT_MMIO */ + struct { + /* from FAR_EL2 */ + __u64 phys_addr; + __u8 data[8]; + /* from ESR_EL2 as */ + __u64 size; + /* from ESR_EL2 */ + __u32 reg_nr; + /* from ESR_EL2 */ + __u8 is_write; + } mmio; + /* GZVM_EXIT_FAIL_ENTRY */ + struct { + __u64 hardware_entry_failure_reason; + __u32 cpu; + } fail_entry; + /* GZVM_EXIT_EXCEPTION */ + struct { + __u32 exception; + __u32 error_code; + } exception; + /* GZVM_EXIT_HYPERCALL */ + struct { + __u64 args[8]; /* in-out */ + } hypercall; + /* GZVM_EXIT_INTERNAL_ERROR */ + struct { + __u32 suberror; + __u32 ndata; + __u64 data[16]; + } internal; + /* GZVM_EXIT_SYSTEM_EVENT */ + struct { +#define GZVM_SYSTEM_EVENT_SHUTDOWN 1 +#define GZVM_SYSTEM_EVENT_RESET 2 +#define GZVM_SYSTEM_EVENT_CRASH 3 +#define GZVM_SYSTEM_EVENT_WAKEUP 4 +#define GZVM_SYSTEM_EVENT_SUSPEND 5 +#define GZVM_SYSTEM_EVENT_SEV_TERM 6 +#define GZVM_SYSTEM_EVENT_S2IDLE 7 + __u32 type; + __u32 ndata; + __u64 data[16]; + } system_event; + /* Fix the size of the union. */ + char padding[256]; + }; +}; + /* for GZVM_ENABLE_CAP */ struct gzvm_enable_cap { /* in */ @@ -70,4 +158,17 @@ struct gzvm_enable_cap { #define GZVM_ENABLE_CAP _IOW(GZVM_IOC_MAGIC, 0xa3, \ struct gzvm_enable_cap) =20 +/* for GZVM_GET/SET_ONE_REG */ +struct gzvm_one_reg { + __u64 id; + __u64 addr; +}; + +#define GZVM_GET_ONE_REG _IOW(GZVM_IOC_MAGIC, 0xab, \ + struct gzvm_one_reg) +#define GZVM_SET_ONE_REG _IOW(GZVM_IOC_MAGIC, 0xac, \ + struct gzvm_one_reg) + +#define GZVM_REG_GENERIC 0x0000000000000000ULL + #endif /* __GZVM_H__ */ --=20 2.18.0 From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB1F2C8300C for ; Fri, 9 Jun 2023 08:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240990AbjFIIxr (ORCPT ); Fri, 9 Jun 2023 04:53:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240681AbjFIIwd (ORCPT ); Fri, 9 Jun 2023 04:52:33 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A7521FEC; Fri, 9 Jun 2023 01:52:27 -0700 (PDT) X-UUID: efa7cd4806a211eeb20a276fd37b9834-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=g0zoqrDULwaDrqDtdyH49UjywourFY759BoSUsW4U8o=; b=spXegZlrYutB2TSg8Iix4RxlasQZHduebpyioJaWFxLbTOUSyjdrfX7BItA8a+qbEKdMzbrQ8d59dgSXiHsqBxrAWynFX3I1FJ67QcpJcAD53j+TFhIl1FDu/scfqnOyOOiNfdDsE7WNdV0DFk7+qR68YS0m9kDTh0hnU/IUWSo=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:883f3655-51b0-435b-ba30-6b68c90906d1,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:cb9a4e1,CLOUDID:a1f8ea3d-de1e-4348-bc35-c96f92f1dcbb,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: efa7cd4806a211eeb20a276fd37b9834-20230609 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1768483243; Fri, 09 Jun 2023 16:52:17 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:15 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , Willix Yeh Subject: [PATCH v4 4/9] virt: geniezone: Add irqchip support for virtual interrupt injection Date: Fri, 9 Jun 2023 16:52:09 +0800 Message-ID: <20230609085214.31071-5-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Yingshiuan Pan" Enable GenieZone to handle virtual interrupt injection request. Signed-off-by: Yingshiuan Pan Signed-off-by: Liju Chen Signed-off-by: Yi-De Wu --- arch/arm64/geniezone/Makefile | 2 +- arch/arm64/geniezone/vgic.c | 89 +++++++++++++++++++++++++ arch/arm64/include/uapi/asm/gzvm_arch.h | 4 ++ drivers/virt/geniezone/Makefile | 2 +- drivers/virt/geniezone/gzvm_common.h | 12 ++++ drivers/virt/geniezone/gzvm_irqchip.c | 13 ++++ drivers/virt/geniezone/gzvm_vm.c | 77 +++++++++++++++++++++ include/linux/gzvm_drv.h | 4 ++ include/uapi/linux/gzvm.h | 53 +++++++++++++++ 9 files changed, 254 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/geniezone/vgic.c create mode 100644 drivers/virt/geniezone/gzvm_common.h create mode 100644 drivers/virt/geniezone/gzvm_irqchip.c diff --git a/arch/arm64/geniezone/Makefile b/arch/arm64/geniezone/Makefile index 69b0a4abeab0..0e4f1087f9de 100644 --- a/arch/arm64/geniezone/Makefile +++ b/arch/arm64/geniezone/Makefile @@ -4,6 +4,6 @@ # include $(srctree)/drivers/virt/geniezone/Makefile =20 -gzvm-y +=3D vm.o vcpu.o +gzvm-y +=3D vm.o vcpu.o vgic.o =20 obj-$(CONFIG_MTK_GZVM) +=3D gzvm.o diff --git a/arch/arm64/geniezone/vgic.c b/arch/arm64/geniezone/vgic.c new file mode 100644 index 000000000000..9fe5049be122 --- /dev/null +++ b/arch/arm64/geniezone/vgic.c @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include +#include +#include "gzvm_arch_common.h" + +/* is_irq_valid() - Check the irq number and irq_type are matched */ +static bool is_irq_valid(u32 irq, u32 irq_type) +{ + switch (irq_type) { + case GZVM_IRQ_TYPE_CPU: + /* 0 ~ 15: SGI */ + if (likely(irq <=3D GZVM_IRQ_CPU_FIQ)) + return true; + break; + case GZVM_IRQ_TYPE_PPI: + /* 16 ~ 31: PPI */ + if (likely(irq >=3D GZVM_VGIC_NR_SGIS && irq < GZVM_VGIC_NR_PRIVATE_IRQS= )) + return true; + break; + case GZVM_IRQ_TYPE_SPI: + /* 32 ~ : SPT */ + if (likely(irq >=3D GZVM_VGIC_NR_PRIVATE_IRQS)) + return true; + break; + default: + return false; + } + return false; +} + +/** + * gzvm_vgic_inject_irq() - Inject virtual interrupt to a VM + * @vcpu_idx: vcpu index, only valid if PPI + * @irq: irq number + * @level: 1 if true else 0 + */ +static int gzvm_vgic_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx, = u32 irq_type, + u32 irq, bool level) +{ + unsigned long a1 =3D assemble_vm_vcpu_tuple(gzvm->vm_id, vcpu_idx); + struct arm_smccc_res res; + + if (!unlikely(is_irq_valid(irq, irq_type))) + return -EINVAL; + + gzvm_hypcall_wrapper(MT_HVC_GZVM_IRQ_LINE, a1, irq, level, + 0, 0, 0, 0, &res); + if (res.a0) { + pr_err("Failed to set IRQ level (%d) to irq#%u on vcpu %d with ret=3D%d\= n", + level, irq, vcpu_idx, (int)res.a0); + return -EFAULT; + } + + return 0; +} + +/** + * gzvm_vgic_inject_spi() - Inject virtual spi interrupt + * + * @spi_irq: This is spi interrupt number (starts from 0 instead of 32) + * + * Return 0 if succeed else other negative values indicating each errors + */ +static int gzvm_vgic_inject_spi(struct gzvm *gzvm, unsigned int vcpu_idx, + u32 spi_irq, bool level) +{ + return gzvm_vgic_inject_irq(gzvm, 0, GZVM_IRQ_TYPE_SPI, + spi_irq + GZVM_VGIC_NR_PRIVATE_IRQS, level); +} + +int gzvm_arch_create_device(gzvm_id_t vm_id, struct gzvm_create_device *gz= vm_dev) +{ + struct arm_smccc_res res; + + return gzvm_hypcall_wrapper(MT_HVC_GZVM_CREATE_DEVICE, vm_id, + virt_to_phys(gzvm_dev), 0, 0, 0, 0, 0, &res); +} + +int gzvm_arch_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx, u32 irq= _type, + u32 irq, bool level) +{ + /* default use spi */ + return gzvm_vgic_inject_spi(gzvm, vcpu_idx, irq, level); +} diff --git a/arch/arm64/include/uapi/asm/gzvm_arch.h b/arch/arm64/include/u= api/asm/gzvm_arch.h index e45e8e9e1bea..efee0354711e 100644 --- a/arch/arm64/include/uapi/asm/gzvm_arch.h +++ b/arch/arm64/include/uapi/asm/gzvm_arch.h @@ -46,4 +46,8 @@ #define GZVM_REG_ARM_CORE (0x0010 << GZVM_REG_ARM_COPROC_SHIFT) #define GZVM_REG_ARM_CORE_REG(name) (offsetof(struct gzvm_regs, name) / si= zeof(__u32)) =20 +#define GZVM_VGIC_NR_SGIS 16 +#define GZVM_VGIC_NR_PPIS 16 +#define GZVM_VGIC_NR_PRIVATE_IRQS (GZVM_VGIC_NR_SGIS + GZVM_VGIC_NR_PPIS) + #endif /* __GZVM_ARCH_H__ */ diff --git a/drivers/virt/geniezone/Makefile b/drivers/virt/geniezone/Makef= ile index 8ebf2db0c970..67ba3ed76ea7 100644 --- a/drivers/virt/geniezone/Makefile +++ b/drivers/virt/geniezone/Makefile @@ -7,5 +7,5 @@ GZVM_DIR ?=3D ../../../drivers/virt/geniezone =20 gzvm-y :=3D $(GZVM_DIR)/gzvm_main.o $(GZVM_DIR)/gzvm_vm.o \ - $(GZVM_DIR)/gzvm_vcpu.o + $(GZVM_DIR)/gzvm_vcpu.o $(GZVM_DIR)/gzvm_irqchip.o =20 diff --git a/drivers/virt/geniezone/gzvm_common.h b/drivers/virt/geniezone/= gzvm_common.h new file mode 100644 index 000000000000..d0e39ded79e6 --- /dev/null +++ b/drivers/virt/geniezone/gzvm_common.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#ifndef __GZ_COMMON_H__ +#define __GZ_COMMON_H__ + +int gzvm_irqchip_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx, + u32 irq_type, u32 irq, bool level); + +#endif /* __GZVM_COMMON_H__ */ diff --git a/drivers/virt/geniezone/gzvm_irqchip.c b/drivers/virt/geniezone= /gzvm_irqchip.c new file mode 100644 index 000000000000..134bca3ab247 --- /dev/null +++ b/drivers/virt/geniezone/gzvm_irqchip.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include "gzvm_common.h" + +int gzvm_irqchip_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx, + u32 irq_type, u32 irq, bool level) +{ + return gzvm_arch_inject_irq(gzvm, vcpu_idx, irq_type, irq, level); +} diff --git a/drivers/virt/geniezone/gzvm_vm.c b/drivers/virt/geniezone/gzvm= _vm.c index f777c3bdb5ac..0cab67b0bdf8 100644 --- a/drivers/virt/geniezone/gzvm_vm.c +++ b/drivers/virt/geniezone/gzvm_vm.c @@ -12,6 +12,7 @@ #include #include #include +#include "gzvm_common.h" =20 static DEFINE_MUTEX(gzvm_list_lock); static LIST_HEAD(gzvm_list); @@ -250,6 +251,68 @@ gzvm_vm_ioctl_set_memory_region(struct gzvm *gzvm, return register_memslot_addr_range(gzvm, memslot); } =20 +static int gzvm_vm_ioctl_irq_line(struct gzvm *gzvm, + struct gzvm_irq_level *irq_level) +{ + u32 irq =3D irq_level->irq; + unsigned int irq_type, vcpu_idx, irq_num; + bool level =3D irq_level->level; + + irq_type =3D (irq >> GZVM_IRQ_TYPE_SHIFT) & GZVM_IRQ_TYPE_MASK; + vcpu_idx =3D (irq >> GZVM_IRQ_VCPU_SHIFT) & GZVM_IRQ_VCPU_MASK; + vcpu_idx +=3D ((irq >> GZVM_IRQ_VCPU2_SHIFT) & GZVM_IRQ_VCPU2_MASK) * + (GZVM_IRQ_VCPU_MASK + 1); + irq_num =3D (irq >> GZVM_IRQ_NUM_SHIFT) & GZVM_IRQ_NUM_MASK; + + return gzvm_irqchip_inject_irq(gzvm, vcpu_idx, irq_type, irq_num, + level); +} + +static int gzvm_vm_ioctl_create_device(struct gzvm *gzvm, void __user *arg= p) +{ + struct gzvm_create_device *gzvm_dev; + void *dev_data =3D NULL; + int ret; + + gzvm_dev =3D (struct gzvm_create_device *)alloc_pages_exact(PAGE_SIZE, + GFP_KERNEL); + if (!gzvm_dev) + return -ENOMEM; + if (copy_from_user(gzvm_dev, argp, sizeof(*gzvm_dev))) { + ret =3D -EFAULT; + goto err_free_dev; + } + + if (gzvm_dev->attr_addr !=3D 0 && gzvm_dev->attr_size !=3D 0) { + size_t attr_size =3D gzvm_dev->attr_size; + void __user *attr_addr =3D (void __user *)gzvm_dev->attr_addr; + + /* Size of device specific data should not be over a page. */ + if (attr_size > PAGE_SIZE) + return -EINVAL; + + dev_data =3D alloc_pages_exact(attr_size, GFP_KERNEL); + if (!dev_data) { + ret =3D -ENOMEM; + goto err_free_dev; + } + + if (copy_from_user(dev_data, attr_addr, attr_size)) { + ret =3D -EFAULT; + goto err_free_dev_data; + } + gzvm_dev->attr_addr =3D virt_to_phys(dev_data); + } + + ret =3D gzvm_arch_create_device(gzvm->vm_id, gzvm_dev); +err_free_dev_data: + if (dev_data) + free_pages_exact(dev_data, 0); +err_free_dev: + free_pages_exact(gzvm_dev, 0); + return ret; +} + static int gzvm_vm_ioctl_enable_cap(struct gzvm *gzvm, struct gzvm_enable_cap *cap, void __user *argp) @@ -284,6 +347,20 @@ static long gzvm_vm_ioctl(struct file *filp, unsigned = int ioctl, ret =3D gzvm_vm_ioctl_set_memory_region(gzvm, &userspace_mem); break; } + case GZVM_IRQ_LINE: { + struct gzvm_irq_level irq_event; + + ret =3D -EFAULT; + if (copy_from_user(&irq_event, argp, sizeof(irq_event))) + goto out; + + ret =3D gzvm_vm_ioctl_irq_line(gzvm, &irq_event); + break; + } + case GZVM_CREATE_DEVICE: { + ret =3D gzvm_vm_ioctl_create_device(gzvm, argp); + break; + } case GZVM_ENABLE_CAP: { struct gzvm_enable_cap cap; =20 diff --git a/include/linux/gzvm_drv.h b/include/linux/gzvm_drv.h index 7768bd35113a..842a026df9f3 100644 --- a/include/linux/gzvm_drv.h +++ b/include/linux/gzvm_drv.h @@ -109,6 +109,10 @@ int gzvm_arch_create_vcpu(gzvm_id_t vm_id, int vcpuid,= void *run); int gzvm_arch_vcpu_run(struct gzvm_vcpu *vcpu, __u64 *exit_reason); int gzvm_arch_destroy_vcpu(gzvm_id_t vm_id, int vcpuid); =20 +int gzvm_arch_create_device(gzvm_id_t vm_id, struct gzvm_create_device *gz= vm_dev); +int gzvm_arch_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx, u32 irq= _type, + u32 irq, bool level); + extern struct miscdevice *gzvm_debug_dev; =20 #endif /* __GZVM_DRV_H__ */ diff --git a/include/uapi/linux/gzvm.h b/include/uapi/linux/gzvm.h index 38b3f20114ab..279b52192366 100644 --- a/include/uapi/linux/gzvm.h +++ b/include/uapi/linux/gzvm.h @@ -61,6 +61,59 @@ struct gzvm_userspace_memory_region { #define GZVM_SET_USER_MEMORY_REGION _IOW(GZVM_IOC_MAGIC, 0x46, \ struct gzvm_userspace_memory_region) =20 +/* for GZVM_IRQ_LINE, irq field index values */ +#define GZVM_IRQ_VCPU2_SHIFT 28 +#define GZVM_IRQ_VCPU2_MASK 0xf +#define GZVM_IRQ_TYPE_SHIFT 24 +#define GZVM_IRQ_TYPE_MASK 0xf +#define GZVM_IRQ_VCPU_SHIFT 16 +#define GZVM_IRQ_VCPU_MASK 0xff +#define GZVM_IRQ_NUM_SHIFT 0 +#define GZVM_IRQ_NUM_MASK 0xffff + +/* irq_type field */ +#define GZVM_IRQ_TYPE_CPU 0 +#define GZVM_IRQ_TYPE_SPI 1 +#define GZVM_IRQ_TYPE_PPI 2 + +/* out-of-kernel GIC cpu interrupt injection irq_number field */ +#define GZVM_IRQ_CPU_IRQ 0 +#define GZVM_IRQ_CPU_FIQ 1 + +struct gzvm_irq_level { + union { + __u32 irq; + __s32 status; + }; + __u32 level; +}; + +#define GZVM_IRQ_LINE _IOW(GZVM_IOC_MAGIC, 0x61, \ + struct gzvm_irq_level) + +enum gzvm_device_type { + GZVM_DEV_TYPE_ARM_VGIC_V3_DIST, + GZVM_DEV_TYPE_ARM_VGIC_V3_REDIST, + GZVM_DEV_TYPE_MAX, +}; + +struct gzvm_create_device { + __u32 dev_type; /* device type */ + __u32 id; /* out: device id */ + __u64 flags; /* device specific flags */ + __u64 dev_addr; /* device ipa address in VM's view */ + __u64 dev_reg_size; /* device register range size */ + /* + * If user -> kernel, this is user virtual address of device specific + * attributes (if needed). If kernel->hypervisor, this is ipa. + */ + __u64 attr_addr; + __u64 attr_size; /* size of device specific attributes */ +}; + +#define GZVM_CREATE_DEVICE _IOWR(GZVM_IOC_MAGIC, 0xe0, \ + struct gzvm_create_device) + /** * ioctls for vcpu fds */ --=20 2.18.0 From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C224C7EE37 for ; Fri, 9 Jun 2023 08:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239458AbjFIIxb (ORCPT ); Fri, 9 Jun 2023 04:53:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240362AbjFIIwc (ORCPT ); Fri, 9 Jun 2023 04:52:32 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 513001725; Fri, 9 Jun 2023 01:52:25 -0700 (PDT) X-UUID: efed138a06a211ee9cb5633481061a41-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=MXXV9yY2g0nzhs+jXk0gIg2/hxo8rfBCZS2E1IQueTA=; b=Iy6qbfgH8vdUYYsy8Dw/t2BOFefk4V73Gq+CL7dpbuqywSO+aqYrbEAYiN5bpXrOVJu1Ulh0ztUWSIvhTV420ugj5UgoVRZX7QFrw7QxBCIMWdv1hj2clQ4lXhYoJvzcFz3AtUTrtFX5rLFHwb3ZY843DUrVh7pmxtQ18ndCE54=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:12266ae3-a771-47c6-a73b-bc0f2faf2319,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:cb9a4e1,CLOUDID:01ce1b3e-7aa7-41f3-a6bd-0433bee822f3,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: efed138a06a211ee9cb5633481061a41-20230609 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2083432242; Fri, 09 Jun 2023 16:52:17 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:16 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , Willix Yeh Subject: [PATCH v4 5/9] virt: geniezone: Add irqfd support Date: Fri, 9 Jun 2023 16:52:10 +0800 Message-ID: <20230609085214.31071-6-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Yingshiuan Pan" irqfd enables other threads than vcpu threads to inject virtual interrupt through irqfd asynchronously rather through ioctl interface. This interface is necessary for VMM which creates separated thread for IO handling or uses vhost devices. Signed-off-by: Yingshiuan Pan Signed-off-by: Liju Chen Signed-off-by: Yi-De Wu --- arch/arm64/geniezone/gzvm_arch_common.h | 6 + drivers/virt/geniezone/Makefile | 4 +- drivers/virt/geniezone/gzvm_irqfd.c | 537 ++++++++++++++++++++++++ drivers/virt/geniezone/gzvm_main.c | 3 +- drivers/virt/geniezone/gzvm_vcpu.c | 1 + drivers/virt/geniezone/gzvm_vm.c | 18 + include/linux/gzvm_drv.h | 27 ++ include/uapi/linux/gzvm.h | 18 + 8 files changed, 611 insertions(+), 3 deletions(-) create mode 100644 drivers/virt/geniezone/gzvm_irqfd.c diff --git a/arch/arm64/geniezone/gzvm_arch_common.h b/arch/arm64/geniezone= /gzvm_arch_common.h index 1b315264bf24..5affa28b935a 100644 --- a/arch/arm64/geniezone/gzvm_arch_common.h +++ b/arch/arm64/geniezone/gzvm_arch_common.h @@ -46,6 +46,7 @@ enum { #define MT_HVC_GZVM_CREATE_DEVICE GZVM_HCALL_ID(GZVM_FUNC_CREATE_DEVICE) #define MT_HVC_GZVM_PROBE GZVM_HCALL_ID(GZVM_FUNC_PROBE) #define MT_HVC_GZVM_ENABLE_CAP GZVM_HCALL_ID(GZVM_FUNC_ENABLE_CAP) +#define GIC_V3_NR_LRS 16 =20 /** * gzvm_hypercall_wrapper() @@ -72,6 +73,11 @@ static inline gzvm_vcpu_id_t get_vcpuid_from_tuple(unsig= ned int tuple) return (gzvm_vcpu_id_t)(tuple & 0xffff); } =20 +struct gzvm_vcpu_hwstate { + __u32 nr_lrs; + __u64 lr[GIC_V3_NR_LRS]; +}; + static inline unsigned int assemble_vm_vcpu_tuple(gzvm_id_t vmid, gzvm_vcpu_id_t vcpuid) { diff --git a/drivers/virt/geniezone/Makefile b/drivers/virt/geniezone/Makef= ile index 67ba3ed76ea7..aa52cee3ca8e 100644 --- a/drivers/virt/geniezone/Makefile +++ b/drivers/virt/geniezone/Makefile @@ -7,5 +7,5 @@ GZVM_DIR ?=3D ../../../drivers/virt/geniezone =20 gzvm-y :=3D $(GZVM_DIR)/gzvm_main.o $(GZVM_DIR)/gzvm_vm.o \ - $(GZVM_DIR)/gzvm_vcpu.o $(GZVM_DIR)/gzvm_irqchip.o - + $(GZVM_DIR)/gzvm_vcpu.o $(GZVM_DIR)/gzvm_irqchip.o \ + $(GZVM_DIR)/gzvm_irqfd.o diff --git a/drivers/virt/geniezone/gzvm_irqfd.c b/drivers/virt/geniezone/g= zvm_irqfd.c new file mode 100644 index 000000000000..3a395b972fdf --- /dev/null +++ b/drivers/virt/geniezone/gzvm_irqfd.c @@ -0,0 +1,537 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include +#include +#include "gzvm_common.h" + +struct gzvm_irq_ack_notifier { + struct hlist_node link; + unsigned int gsi; + void (*irq_acked)(struct gzvm_irq_ack_notifier *ian); +}; + +/** + * struct gzvm_kernel_irqfd_resampler - irqfd resampler descriptor. + * @gzvm: Poiner to gzvm. + * @list_head list: List of resampling struct _irqfd objects sharing this = gsi. + * RCU list modified under gzvm->irqfds.resampler_lock. + * @notifier: gzvm irq ack notifier. + * @list_head link: Entry in list of gzvm->irqfd.resampler_list. + * Use for sharing esamplers among irqfds on the same gsi. + * Accessed and modified under gzvm->irqfds.resampler_lock. + * + * Resampling irqfds are a special variety of irqfds used to emulate + * level triggered interrupts. The interrupt is asserted on eventfd + * trigger. On acknowledgment through the irq ack notifier, the + * interrupt is de-asserted and userspace is notified through the + * resamplefd. All resamplers on the same gsi are de-asserted + * together, so we don't need to track the state of each individual + * user. We can also therefore share the same irq source ID. + */ +struct gzvm_kernel_irqfd_resampler { + struct gzvm *gzvm; + + struct list_head list; + struct gzvm_irq_ack_notifier notifier; + + struct list_head link; +}; + +/** + * struct gzvm_kernel_irqfd: gzvm kernel irqfd descriptor. + * @gzvm: Pointer to gzvm. + * @wait: Wait queue entry. + * @gsi: Used for level IRQ fast-path. + * @resampler: The resampler used by this irqfd (resampler-only). + * @resamplefd: Eventfd notified on resample (resampler-only). + * @resampler_link: Entry in list of irqfds for a resampler (resampler-onl= y). + * @eventfd: Used for setup/shutdown. + */ +struct gzvm_kernel_irqfd { + struct gzvm *gzvm; + wait_queue_entry_t wait; + + int gsi; + + struct gzvm_kernel_irqfd_resampler *resampler; + + struct eventfd_ctx *resamplefd; + + struct list_head resampler_link; + + struct eventfd_ctx *eventfd; + struct list_head list; + poll_table pt; + struct work_struct shutdown; +}; + +static struct workqueue_struct *irqfd_cleanup_wq; + +/** + * irqfd_set_spi(): irqfd to inject virtual interrupt. + * @gzvm: Pointer to gzvm. + * @irq_source_id: irq source id. + * @irq: This is spi interrupt number (starts from 0 instead of 32). + * @level: irq triggered level. + * @line_status: irq status. + */ +static void irqfd_set_spi(struct gzvm *gzvm, int irq_source_id, u32 irq, + int level, bool line_status) +{ + if (level) + gzvm_irqchip_inject_irq(gzvm, irq_source_id, 0, irq, level); +} + +/** + * irqfd_resampler_ack() - Notify all of the resampler irqfds using this G= SI + * when IRQ de-assert once. + * @ian: Pointer to gzvm_irq_ack_notifier. + * + * Since resampler irqfds share an IRQ source ID, we de-assert once + * then notify all of the resampler irqfds using this GSI. We can't + * do multiple de-asserts or we risk racing with incoming re-asserts. + */ +static void irqfd_resampler_ack(struct gzvm_irq_ack_notifier *ian) +{ + struct gzvm_kernel_irqfd_resampler *resampler; + struct gzvm *gzvm; + struct gzvm_kernel_irqfd *irqfd; + int idx; + + resampler =3D container_of(ian, + struct gzvm_kernel_irqfd_resampler, notifier); + gzvm =3D resampler->gzvm; + + irqfd_set_spi(gzvm, GZVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID, + resampler->notifier.gsi, 0, false); + + idx =3D srcu_read_lock(&gzvm->irq_srcu); + + list_for_each_entry_srcu(irqfd, &resampler->list, resampler_link, + srcu_read_lock_held(&gzvm->irq_srcu)) { + eventfd_signal(irqfd->resamplefd, 1); + } + + srcu_read_unlock(&gzvm->irq_srcu, idx); +} + +static void gzvm_register_irq_ack_notifier(struct gzvm *gzvm, + struct gzvm_irq_ack_notifier *ian) +{ + mutex_lock(&gzvm->irq_lock); + hlist_add_head_rcu(&ian->link, &gzvm->irq_ack_notifier_list); + mutex_unlock(&gzvm->irq_lock); +} + +static void gzvm_unregister_irq_ack_notifier(struct gzvm *gzvm, + struct gzvm_irq_ack_notifier *ian) +{ + mutex_lock(&gzvm->irq_lock); + hlist_del_init_rcu(&ian->link); + mutex_unlock(&gzvm->irq_lock); + synchronize_srcu(&gzvm->irq_srcu); +} + +static void irqfd_resampler_shutdown(struct gzvm_kernel_irqfd *irqfd) +{ + struct gzvm_kernel_irqfd_resampler *resampler =3D irqfd->resampler; + struct gzvm *gzvm =3D resampler->gzvm; + + mutex_lock(&gzvm->irqfds.resampler_lock); + + list_del_rcu(&irqfd->resampler_link); + synchronize_srcu(&gzvm->irq_srcu); + + if (list_empty(&resampler->list)) { + list_del(&resampler->link); + gzvm_unregister_irq_ack_notifier(gzvm, &resampler->notifier); + irqfd_set_spi(gzvm, GZVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID, + resampler->notifier.gsi, 0, false); + kfree(resampler); + } + + mutex_unlock(&gzvm->irqfds.resampler_lock); +} + +/** + * irqfd_shutdown() - Race-free decouple logic (ordering is critical). + * @work: Pointer to work_struct. + */ +static void irqfd_shutdown(struct work_struct *work) +{ + struct gzvm_kernel_irqfd *irqfd =3D + container_of(work, struct gzvm_kernel_irqfd, shutdown); + struct gzvm *gzvm =3D irqfd->gzvm; + u64 cnt; + + /* Make sure irqfd has been initialized in assign path. */ + synchronize_srcu(&gzvm->irq_srcu); + + /* + * Synchronize with the wait-queue and unhook ourselves to prevent + * further events. + */ + eventfd_ctx_remove_wait_queue(irqfd->eventfd, &irqfd->wait, &cnt); + + if (irqfd->resampler) { + irqfd_resampler_shutdown(irqfd); + eventfd_ctx_put(irqfd->resamplefd); + } + + /* + * It is now safe to release the object's resources + */ + eventfd_ctx_put(irqfd->eventfd); + kfree(irqfd); +} + +/** + * irqfd_is_active() - Assumes gzvm->irqfds.lock is held. + * @irqfd: Pointer to gzvm_kernel_irqfd. + */ +static bool irqfd_is_active(struct gzvm_kernel_irqfd *irqfd) +{ + return list_empty(&irqfd->list) ? false : true; +} + +/** + * irqfd_deactivate() - Mark the irqfd as inactive and schedule it for rem= oval. + * assumes gzvm->irqfds.lock is held. + * @irqfd: Pointer to gzvm_kernel_irqfd. + */ +static void irqfd_deactivate(struct gzvm_kernel_irqfd *irqfd) +{ + if (!irqfd_is_active(irqfd)) + return; + + list_del_init(&irqfd->list); + + queue_work(irqfd_cleanup_wq, &irqfd->shutdown); +} + +/** + * irqfd_wakeup() - Wake up irqfd to do virtual interrupt injection. + * @wait: Pointer to wait_queue_entry_t. + * @mode: + * @sync: + * @key: + */ +static int irqfd_wakeup(wait_queue_entry_t *wait, unsigned int mode, int s= ync, + void *key) +{ + struct gzvm_kernel_irqfd *irqfd =3D + container_of(wait, struct gzvm_kernel_irqfd, wait); + __poll_t flags =3D key_to_poll(key); + struct gzvm *gzvm =3D irqfd->gzvm; + + if (flags & EPOLLIN) { + u64 cnt; + + eventfd_ctx_do_read(irqfd->eventfd, &cnt); + /* gzvm's irq injection is not blocked, don't need workq */ + irqfd_set_spi(gzvm, GZVM_USERSPACE_IRQ_SOURCE_ID, irqfd->gsi, + 1, false); + } + + if (flags & EPOLLHUP) { + /* The eventfd is closing, detach from GZVM */ + unsigned long iflags; + + spin_lock_irqsave(&gzvm->irqfds.lock, iflags); + + /* + * Do more check if someone deactivated the irqfd before + * we could acquire the irqfds.lock. + */ + if (irqfd_is_active(irqfd)) + irqfd_deactivate(irqfd); + + spin_unlock_irqrestore(&gzvm->irqfds.lock, iflags); + } + + return 0; +} + +static void irqfd_ptable_queue_proc(struct file *file, wait_queue_head_t *= wqh, + poll_table *pt) +{ + struct gzvm_kernel_irqfd *irqfd =3D + container_of(pt, struct gzvm_kernel_irqfd, pt); + add_wait_queue_priority(wqh, &irqfd->wait); +} + +static int gzvm_irqfd_assign(struct gzvm *gzvm, struct gzvm_irqfd *args) +{ + struct gzvm_kernel_irqfd *irqfd, *tmp; + struct fd f; + struct eventfd_ctx *eventfd =3D NULL, *resamplefd =3D NULL; + int ret; + __poll_t events; + int idx; + + irqfd =3D kzalloc(sizeof(*irqfd), GFP_KERNEL_ACCOUNT); + if (!irqfd) + return -ENOMEM; + + irqfd->gzvm =3D gzvm; + irqfd->gsi =3D args->gsi; + irqfd->resampler =3D NULL; + + INIT_LIST_HEAD(&irqfd->list); + INIT_WORK(&irqfd->shutdown, irqfd_shutdown); + + f =3D fdget(args->fd); + if (!f.file) { + ret =3D -EBADF; + goto out; + } + + eventfd =3D eventfd_ctx_fileget(f.file); + if (IS_ERR(eventfd)) { + ret =3D PTR_ERR(eventfd); + goto fail; + } + + irqfd->eventfd =3D eventfd; + + if (args->flags & GZVM_IRQFD_FLAG_RESAMPLE) { + struct gzvm_kernel_irqfd_resampler *resampler; + + resamplefd =3D eventfd_ctx_fdget(args->resamplefd); + if (IS_ERR(resamplefd)) { + ret =3D PTR_ERR(resamplefd); + goto fail; + } + + irqfd->resamplefd =3D resamplefd; + INIT_LIST_HEAD(&irqfd->resampler_link); + + mutex_lock(&gzvm->irqfds.resampler_lock); + + list_for_each_entry(resampler, + &gzvm->irqfds.resampler_list, link) { + if (resampler->notifier.gsi =3D=3D irqfd->gsi) { + irqfd->resampler =3D resampler; + break; + } + } + + if (!irqfd->resampler) { + resampler =3D kzalloc(sizeof(*resampler), + GFP_KERNEL_ACCOUNT); + if (!resampler) { + ret =3D -ENOMEM; + mutex_unlock(&gzvm->irqfds.resampler_lock); + goto fail; + } + + resampler->gzvm =3D gzvm; + INIT_LIST_HEAD(&resampler->list); + resampler->notifier.gsi =3D irqfd->gsi; + resampler->notifier.irq_acked =3D irqfd_resampler_ack; + INIT_LIST_HEAD(&resampler->link); + + list_add(&resampler->link, &gzvm->irqfds.resampler_list); + gzvm_register_irq_ack_notifier(gzvm, + &resampler->notifier); + irqfd->resampler =3D resampler; + } + + list_add_rcu(&irqfd->resampler_link, &irqfd->resampler->list); + synchronize_srcu(&gzvm->irq_srcu); + + mutex_unlock(&gzvm->irqfds.resampler_lock); + } + + /* + * Install our own custom wake-up handling so we are notified via + * a callback whenever someone signals the underlying eventfd + */ + init_waitqueue_func_entry(&irqfd->wait, irqfd_wakeup); + init_poll_funcptr(&irqfd->pt, irqfd_ptable_queue_proc); + + spin_lock_irq(&gzvm->irqfds.lock); + + ret =3D 0; + list_for_each_entry(tmp, &gzvm->irqfds.items, list) { + if (irqfd->eventfd !=3D tmp->eventfd) + continue; + /* This fd is used for another irq already. */ + pr_err("already used: gsi=3D%d fd=3D%d\n", args->gsi, args->fd); + ret =3D -EBUSY; + spin_unlock_irq(&gzvm->irqfds.lock); + goto fail; + } + + idx =3D srcu_read_lock(&gzvm->irq_srcu); + + list_add_tail(&irqfd->list, &gzvm->irqfds.items); + + spin_unlock_irq(&gzvm->irqfds.lock); + + /* + * Check if there was an event already pending on the eventfd + * before we registered, and trigger it as if we didn't miss it. + */ + events =3D vfs_poll(f.file, &irqfd->pt); + + /* In case there is already a pending event */ + if (events & EPOLLIN) + irqfd_set_spi(gzvm, GZVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID, + irqfd->gsi, 1, false); + + srcu_read_unlock(&gzvm->irq_srcu, idx); + + /* + * do not drop the file until the irqfd is fully initialized, otherwise + * we might race against the EPOLLHUP + */ + fdput(f); + return 0; + +fail: + if (irqfd->resampler) + irqfd_resampler_shutdown(irqfd); + + if (resamplefd && !IS_ERR(resamplefd)) + eventfd_ctx_put(resamplefd); + + if (eventfd && !IS_ERR(eventfd)) + eventfd_ctx_put(eventfd); + + fdput(f); + +out: + kfree(irqfd); + return ret; +} + +static void gzvm_notify_acked_gsi(struct gzvm *gzvm, int gsi) +{ + struct gzvm_irq_ack_notifier *gian; + + hlist_for_each_entry_srcu(gian, &gzvm->irq_ack_notifier_list, + link, srcu_read_lock_held(&gzvm->irq_srcu)) + if (gian->gsi =3D=3D gsi) + gian->irq_acked(gian); +} + +void gzvm_notify_acked_irq(struct gzvm *gzvm, unsigned int gsi) +{ + int idx; + + idx =3D srcu_read_lock(&gzvm->irq_srcu); + gzvm_notify_acked_gsi(gzvm, gsi); + srcu_read_unlock(&gzvm->irq_srcu, idx); +} + +/** + * gzvm_irqfd_deassign() - Shutdown any irqfd's that match fd+gsi. + * @gzvm: Pointer to gzvm. + * @args: Pointer to gzvm_irqfd. + */ +static int gzvm_irqfd_deassign(struct gzvm *gzvm, struct gzvm_irqfd *args) +{ + struct gzvm_kernel_irqfd *irqfd, *tmp; + struct eventfd_ctx *eventfd; + + eventfd =3D eventfd_ctx_fdget(args->fd); + if (IS_ERR(eventfd)) + return PTR_ERR(eventfd); + + spin_lock_irq(&gzvm->irqfds.lock); + + list_for_each_entry_safe(irqfd, tmp, &gzvm->irqfds.items, list) { + if (irqfd->eventfd =3D=3D eventfd && irqfd->gsi =3D=3D args->gsi) + irqfd_deactivate(irqfd); + } + + spin_unlock_irq(&gzvm->irqfds.lock); + eventfd_ctx_put(eventfd); + + /* + * Block until we know all outstanding shutdown jobs have completed + * so that we guarantee there will not be any more interrupts on this + * gsi once this deassign function returns. + */ + flush_workqueue(irqfd_cleanup_wq); + + return 0; +} + +int gzvm_irqfd(struct gzvm *gzvm, struct gzvm_irqfd *args) +{ + if (args->flags & + ~(GZVM_IRQFD_FLAG_DEASSIGN | GZVM_IRQFD_FLAG_RESAMPLE)) + return -EINVAL; + + if (args->flags & GZVM_IRQFD_FLAG_DEASSIGN) + return gzvm_irqfd_deassign(gzvm, args); + + return gzvm_irqfd_assign(gzvm, args); +} + +/** + * gzvm_vm_irqfd_init() - Initialize irqfd data structure per VM + */ +int gzvm_vm_irqfd_init(struct gzvm *gzvm) +{ + mutex_init(&gzvm->irq_lock); + + spin_lock_init(&gzvm->irqfds.lock); + INIT_LIST_HEAD(&gzvm->irqfds.items); + INIT_LIST_HEAD(&gzvm->irqfds.resampler_list); + if (init_srcu_struct(&gzvm->irq_srcu)) + return -EINVAL; + INIT_HLIST_HEAD(&gzvm->irq_ack_notifier_list); + mutex_init(&gzvm->irqfds.resampler_lock); + + return 0; +} + +/** + * gzvm_vm_irqfd_release() - This function is called as the gzvm VM fd is = being + * released. Shutdown all irqfds that still remain open. + * @gzvm: Pointer to gzvm. + */ +void gzvm_vm_irqfd_release(struct gzvm *gzvm) +{ + struct gzvm_kernel_irqfd *irqfd, *tmp; + + spin_lock_irq(&gzvm->irqfds.lock); + + list_for_each_entry_safe(irqfd, tmp, &gzvm->irqfds.items, list) + irqfd_deactivate(irqfd); + + spin_unlock_irq(&gzvm->irqfds.lock); + + /* + * Block until we know all outstanding shutdown jobs have completed. + */ + flush_workqueue(irqfd_cleanup_wq); +} + +/** + * gzvm_drv_irqfd_init() - Erase flushing work items when a VM exits. + * + * Create a host-wide workqueue for issuing deferred shutdown requests + * aggregated from all vm* instances. We need our own isolated + * queue to ease flushing work items when a VM exits. + */ +int gzvm_drv_irqfd_init(void) +{ + irqfd_cleanup_wq =3D alloc_workqueue("gzvm-irqfd-cleanup", 0, 0); + if (!irqfd_cleanup_wq) + return -ENOMEM; + + return 0; +} + +void gzvm_drv_irqfd_exit(void) +{ + destroy_workqueue(irqfd_cleanup_wq); +} diff --git a/drivers/virt/geniezone/gzvm_main.c b/drivers/virt/geniezone/gz= vm_main.c index 230970cb0953..e62c046d76b3 100644 --- a/drivers/virt/geniezone/gzvm_main.c +++ b/drivers/virt/geniezone/gzvm_main.c @@ -113,11 +113,12 @@ static int gzvm_drv_probe(void) return ret; gzvm_debug_dev =3D &gzvm_dev; =20 - return 0; + return gzvm_drv_irqfd_init(); } =20 static int gzvm_drv_remove(void) { + gzvm_drv_irqfd_exit(); destroy_all_vm(); misc_deregister(&gzvm_dev); return 0; diff --git a/drivers/virt/geniezone/gzvm_vcpu.c b/drivers/virt/geniezone/gz= vm_vcpu.c index 5e9d34fcc1ea..94ead15fea3f 100644 --- a/drivers/virt/geniezone/gzvm_vcpu.c +++ b/drivers/virt/geniezone/gzvm_vcpu.c @@ -211,6 +211,7 @@ int gzvm_vm_ioctl_create_vcpu(struct gzvm *gzvm, u32 cp= uid) ret =3D -ENOMEM; goto free_vcpu; } + vcpu->hwstate =3D (void *)vcpu->run + PAGE_SIZE; vcpu->vcpuid =3D cpuid; vcpu->gzvm =3D gzvm; mutex_init(&vcpu->lock); diff --git a/drivers/virt/geniezone/gzvm_vm.c b/drivers/virt/geniezone/gzvm= _vm.c index 0cab67b0bdf8..eedc2d5c24ad 100644 --- a/drivers/virt/geniezone/gzvm_vm.c +++ b/drivers/virt/geniezone/gzvm_vm.c @@ -361,6 +361,15 @@ static long gzvm_vm_ioctl(struct file *filp, unsigned = int ioctl, ret =3D gzvm_vm_ioctl_create_device(gzvm, argp); break; } + case GZVM_IRQFD: { + struct gzvm_irqfd data; + + ret =3D -EFAULT; + if (copy_from_user(&data, argp, sizeof(data))) + goto out; + ret =3D gzvm_irqfd(gzvm, &data); + break; + } case GZVM_ENABLE_CAP: { struct gzvm_enable_cap cap; =20 @@ -385,6 +394,7 @@ static void gzvm_destroy_vm(struct gzvm *gzvm) =20 mutex_lock(&gzvm->lock); =20 + gzvm_vm_irqfd_release(gzvm); gzvm_destroy_vcpus(gzvm); gzvm_arch_destroy_vm(gzvm->vm_id); =20 @@ -430,6 +440,14 @@ static struct gzvm *gzvm_create_vm(unsigned long vm_ty= pe) gzvm->mm =3D current->mm; mutex_init(&gzvm->lock); =20 + ret =3D gzvm_vm_irqfd_init(gzvm); + if (ret) { + dev_err(gzvm_debug_dev->this_device, + "Failed to initialize irqfd\n"); + kfree(gzvm); + return ERR_PTR(ret); + } + mutex_lock(&gzvm_list_lock); list_add(&gzvm->vm_list, &gzvm_list); mutex_unlock(&gzvm_list_lock); diff --git a/include/linux/gzvm_drv.h b/include/linux/gzvm_drv.h index 842a026df9f3..54b0a3d443c5 100644 --- a/include/linux/gzvm_drv.h +++ b/include/linux/gzvm_drv.h @@ -11,6 +11,7 @@ #include #include #include +#include =20 #define MODULE_NAME "gzvm" #define GZVM_VCPU_MMAP_SIZE PAGE_SIZE @@ -26,6 +27,8 @@ #define ERR_NOT_SUPPORTED (-24) #define ERR_NOT_IMPLEMENTED (-27) #define ERR_FAULT (-40) +#define GZVM_USERSPACE_IRQ_SOURCE_ID 0 +#define GZVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID 1 =20 /** * The following data structures are for data transferring between driver = and @@ -69,6 +72,7 @@ struct gzvm_vcpu { /* lock of vcpu*/ struct mutex lock; struct gzvm_vcpu_run *run; + struct gzvm_vcpu_hwstate *hwstate; }; =20 struct gzvm { @@ -78,8 +82,23 @@ struct gzvm { struct gzvm_memslot memslot[GZVM_MAX_MEM_REGION]; /* lock for list_add*/ struct mutex lock; + + struct { + /* lock for irqfds list operation */ + spinlock_t lock; + struct list_head items; + struct list_head resampler_list; + /* lock for irqfds resampler */ + struct mutex resampler_lock; + } irqfds; + struct list_head vm_list; gzvm_id_t vm_id; + + struct hlist_head irq_ack_notifier_list; + struct srcu_struct irq_srcu; + /* lock for irq injection */ + struct mutex irq_lock; }; =20 long gzvm_dev_ioctl_check_extension(struct gzvm *gzvm, unsigned long args); @@ -113,6 +132,14 @@ int gzvm_arch_create_device(gzvm_id_t vm_id, struct gz= vm_create_device *gzvm_dev int gzvm_arch_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx, u32 irq= _type, u32 irq, bool level); =20 +void gzvm_notify_acked_irq(struct gzvm *gzvm, unsigned int gsi); +int gzvm_irqfd(struct gzvm *gzvm, struct gzvm_irqfd *args); +int gzvm_drv_irqfd_init(void); +void gzvm_drv_irqfd_exit(void); +int gzvm_vm_irqfd_init(struct gzvm *gzvm); +void gzvm_vm_irqfd_release(struct gzvm *gzvm); +void gzvm_sync_hwstate(struct gzvm_vcpu *vcpu); + extern struct miscdevice *gzvm_debug_dev; =20 #endif /* __GZVM_DRV_H__ */ diff --git a/include/uapi/linux/gzvm.h b/include/uapi/linux/gzvm.h index 279b52192366..3f1e829f855d 100644 --- a/include/uapi/linux/gzvm.h +++ b/include/uapi/linux/gzvm.h @@ -224,4 +224,22 @@ struct gzvm_one_reg { =20 #define GZVM_REG_GENERIC 0x0000000000000000ULL =20 +#define GZVM_IRQFD_FLAG_DEASSIGN (1 << 0) +/** + * GZVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies + * the irqfd to operate in resampling mode for level triggered interrupt + * emulation. + */ +#define GZVM_IRQFD_FLAG_RESAMPLE (1 << 1) + +struct gzvm_irqfd { + __u32 fd; + __u32 gsi; + __u32 flags; + __u32 resamplefd; + __u8 pad[16]; +}; + +#define GZVM_IRQFD _IOW(GZVM_IOC_MAGIC, 0x76, struct gzvm_irqfd) + #endif /* __GZVM_H__ */ --=20 2.18.0 From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 621F2C88C85 for ; Fri, 9 Jun 2023 08:53:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239467AbjFIIxU (ORCPT ); Fri, 9 Jun 2023 04:53:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239270AbjFIIw0 (ORCPT ); Fri, 9 Jun 2023 04:52:26 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFCBAB9; Fri, 9 Jun 2023 01:52:22 -0700 (PDT) X-UUID: ef81181a06a211eeb20a276fd37b9834-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=deGZ6KSF2b7R6KdcQE1hvYLqiF/G0uzgUaB/CCA4efE=; b=fYtt5rRanMCn0xL61yJvQ4bvOFpCXebqDUEzNxi0vu1oIot0D2SJMgp3InEtaZ47zLEbXaNlF6LU7u2ByYbLp1vHY/plu7yU6Pbiz83UOg3jlyB/kBj2819le2CLubIKOlQdieut7suaGQqUd30gzufoxEbAXhtpAu5hHjDYuQQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:f46f8526-4f64-467d-b665-5e32ea5871b3,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:47,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:22 X-CID-INFO: VERSION:1.1.26,REQID:f46f8526-4f64-467d-b665-5e32ea5871b3,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:47,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:22 X-CID-META: VersionHash:cb9a4e1,CLOUDID:b8cd1b3e-7aa7-41f3-a6bd-0433bee822f3,B ulkID:23060916521772YWOAW5,BulkQuantity:0,Recheck:0,SF:101|38|29|28|100|17 |19|48|102,TC:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:nil,QS:ni l,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_SDM,TF_CID_SPAM_FAS,TF_CID_SPAM_FSD, TF_CID_SPAM_ULN X-UUID: ef81181a06a211eeb20a276fd37b9834-20230609 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1560273463; Fri, 09 Jun 2023 16:52:16 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:16 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , Willix Yeh Subject: [PATCH v4 6/9] virt: geniezone: Add ioeventfd support Date: Fri, 9 Jun 2023 16:52:11 +0800 Message-ID: <20230609085214.31071-7-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Yingshiuan Pan" Ioeventfd leverages eventfd to provide asynchronous notification mechanism for VMM. VMM can register a mmio address and bind with an eventfd. Once a mmio trap occurs on this registered region, its corresponding eventfd will be notified. Signed-off-by: Yingshiuan Pan Signed-off-by: Liju Chen Signed-off-by: Yi-De Wu --- drivers/virt/geniezone/Makefile | 2 +- drivers/virt/geniezone/gzvm_ioeventfd.c | 263 ++++++++++++++++++++++++ drivers/virt/geniezone/gzvm_vcpu.c | 27 ++- drivers/virt/geniezone/gzvm_vm.c | 17 ++ include/linux/gzvm_drv.h | 11 + include/uapi/linux/gzvm.h | 23 +++ 6 files changed, 341 insertions(+), 2 deletions(-) create mode 100644 drivers/virt/geniezone/gzvm_ioeventfd.c diff --git a/drivers/virt/geniezone/Makefile b/drivers/virt/geniezone/Makef= ile index aa52cee3ca8e..25493a4d1c63 100644 --- a/drivers/virt/geniezone/Makefile +++ b/drivers/virt/geniezone/Makefile @@ -8,4 +8,4 @@ GZVM_DIR ?=3D ../../../drivers/virt/geniezone =20 gzvm-y :=3D $(GZVM_DIR)/gzvm_main.o $(GZVM_DIR)/gzvm_vm.o \ $(GZVM_DIR)/gzvm_vcpu.o $(GZVM_DIR)/gzvm_irqchip.o \ - $(GZVM_DIR)/gzvm_irqfd.o + $(GZVM_DIR)/gzvm_irqfd.o $(GZVM_DIR)/gzvm_ioeventfd.o diff --git a/drivers/virt/geniezone/gzvm_ioeventfd.c b/drivers/virt/geniezo= ne/gzvm_ioeventfd.c new file mode 100644 index 000000000000..f5664cab98c3 --- /dev/null +++ b/drivers/virt/geniezone/gzvm_ioeventfd.c @@ -0,0 +1,263 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 MediaTek Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct gzvm_ioevent { + struct list_head list; + __u64 addr; + __u32 len; + struct eventfd_ctx *evt_ctx; + __u64 datamatch; + bool wildcard; +}; + +/** + * ioeventfd_check_collision() - Check collison assumes gzvm->slots_lock h= eld. + * @gzvm: Pointer to gzvm. + * @p: Pointer to gzvm_ioevent. + */ +static bool ioeventfd_check_collision(struct gzvm *gzvm, struct gzvm_ioeve= nt *p) +{ + struct gzvm_ioevent *_p; + + list_for_each_entry(_p, &gzvm->ioevents, list) + if (_p->addr =3D=3D p->addr && + (!_p->len || !p->len || + (_p->len =3D=3D p->len && + (_p->wildcard || p->wildcard || + _p->datamatch =3D=3D p->datamatch)))) + return true; + + return false; +} + +static void gzvm_ioevent_release(struct gzvm_ioevent *p) +{ + eventfd_ctx_put(p->evt_ctx); + list_del(&p->list); + kfree(p); +} + +static bool gzvm_ioevent_in_range(struct gzvm_ioevent *p, __u64 addr, int = len, + const void *val) +{ + u64 _val; + + if (addr !=3D p->addr) + /* address must be precise for a hit */ + return false; + + if (!p->len) + /* length =3D 0 means only look at the address, so always a hit */ + return true; + + if (len !=3D p->len) + /* address-range must be precise for a hit */ + return false; + + if (p->wildcard) + /* all else equal, wildcard is always a hit */ + return true; + + /* otherwise, we have to actually compare the data */ + + WARN_ON_ONCE(!IS_ALIGNED((unsigned long)val, len)); + + switch (len) { + case 1: + _val =3D *(u8 *)val; + break; + case 2: + _val =3D *(u16 *)val; + break; + case 4: + _val =3D *(u32 *)val; + break; + case 8: + _val =3D *(u64 *)val; + break; + default: + return false; + } + + return _val =3D=3D p->datamatch; +} + +static int gzvm_deassign_ioeventfd(struct gzvm *gzvm, + struct gzvm_ioeventfd *args) +{ + struct gzvm_ioevent *p, *tmp; + struct eventfd_ctx *evt_ctx; + int ret =3D -ENOENT; + bool wildcard; + + evt_ctx =3D eventfd_ctx_fdget(args->fd); + if (IS_ERR(evt_ctx)) + return PTR_ERR(evt_ctx); + + wildcard =3D !(args->flags & GZVM_IOEVENTFD_FLAG_DATAMATCH); + + mutex_lock(&gzvm->lock); + + list_for_each_entry_safe(p, tmp, &gzvm->ioevents, list) { + if (p->evt_ctx !=3D evt_ctx || + p->addr !=3D args->addr || + p->len !=3D args->len || + p->wildcard !=3D wildcard) + continue; + + if (!p->wildcard && p->datamatch !=3D args->datamatch) + continue; + + gzvm_ioevent_release(p); + ret =3D 0; + break; + } + + mutex_unlock(&gzvm->lock); + + /* got in the front of this function */ + eventfd_ctx_put(evt_ctx); + + return ret; +} + +static int gzvm_assign_ioeventfd(struct gzvm *gzvm, struct gzvm_ioeventfd = *args) +{ + struct eventfd_ctx *evt_ctx; + struct gzvm_ioevent *evt; + int ret; + + evt_ctx =3D eventfd_ctx_fdget(args->fd); + if (IS_ERR(evt_ctx)) + return PTR_ERR(evt_ctx); + + evt =3D kmalloc(sizeof(*evt), GFP_KERNEL); + if (!evt) + return -ENOMEM; + *evt =3D (struct gzvm_ioevent) { + .addr =3D args->addr, + .len =3D args->len, + .evt_ctx =3D evt_ctx, + }; + if (args->flags & GZVM_IOEVENTFD_FLAG_DATAMATCH) { + evt->datamatch =3D args->datamatch; + evt->wildcard =3D false; + } else { + evt->wildcard =3D true; + } + + if (ioeventfd_check_collision(gzvm, evt)) { + ret =3D -EEXIST; + goto err_free; + } + + mutex_lock(&gzvm->lock); + list_add_tail(&evt->list, &gzvm->ioevents); + mutex_unlock(&gzvm->lock); + + return 0; + +err_free: + kfree(evt); + eventfd_ctx_put(evt_ctx); + return ret; +} + +/** + * gzvm_ioeventfd_check_valid() - Check user arguments is valid. + * @args: Pointer to gzvm_ioeventfd. + * + * Return true if user arguments are valid. + * Return false if user arguments are invalid. + */ +static bool gzvm_ioeventfd_check_valid(struct gzvm_ioeventfd *args) +{ + /* must be natural-word sized, or 0 to ignore length */ + switch (args->len) { + case 0: + case 1: + case 2: + case 4: + case 8: + break; + default: + return false; + } + + /* check for range overflow */ + if (args->addr + args->len < args->addr) + return false; + + /* check for extra flags that we don't understand */ + if (args->flags & ~GZVM_IOEVENTFD_VALID_FLAG_MASK) + return false; + + /* ioeventfd with no length can't be combined with DATAMATCH */ + if (!args->len && (args->flags & GZVM_IOEVENTFD_FLAG_DATAMATCH)) + return false; + + /* gzvm does not support pio bus ioeventfd */ + if (args->flags & GZVM_IOEVENTFD_FLAG_PIO) + return false; + + return true; +} + +/** + * gzvm_ioeventfd() - Register ioevent to ioevent list. + * @gzvm: Pointer to gzvm. + * @args: Pointer to gzvm_ioeventfd. + */ +int gzvm_ioeventfd(struct gzvm *gzvm, struct gzvm_ioeventfd *args) +{ + if (gzvm_ioeventfd_check_valid(args) =3D=3D false) + return -EINVAL; + + if (args->flags & GZVM_IOEVENTFD_FLAG_DEASSIGN) + return gzvm_deassign_ioeventfd(gzvm, args); + return gzvm_assign_ioeventfd(gzvm, args); +} + +/** + * gzvm_ioevent_write() - Travers this vm's registered ioeventfd to see if + * need notifying it. + * @vcpu: Pointer to vcpu. + * @addr: mmio address. + * @len: mmio size. + * @val: Pointer to void. + * + * Return true if this io is already sent to ioeventfd's listener. + * Return false if we cannot find any ioeventfd registering this mmio writ= e. + */ +bool gzvm_ioevent_write(struct gzvm_vcpu *vcpu, __u64 addr, int len, + const void *val) +{ + struct gzvm_ioevent *e; + + list_for_each_entry(e, &vcpu->gzvm->ioevents, list) { + if (gzvm_ioevent_in_range(e, addr, len, val)) { + eventfd_signal(e->evt_ctx, 1); + return true; + } + } + return false; +} + +int gzvm_init_ioeventfd(struct gzvm *gzvm) +{ + INIT_LIST_HEAD(&gzvm->ioevents); + + return 0; +} diff --git a/drivers/virt/geniezone/gzvm_vcpu.c b/drivers/virt/geniezone/gz= vm_vcpu.c index 94ead15fea3f..40b57d85eaa2 100644 --- a/drivers/virt/geniezone/gzvm_vcpu.c +++ b/drivers/virt/geniezone/gzvm_vcpu.c @@ -49,6 +49,30 @@ static long gzvm_vcpu_update_one_reg(struct gzvm_vcpu *v= cpu, void * __user argp, return 0; } =20 +/** + * gzvm_vcpu_handle_mmio() - Handle mmio in kernel space. + * @vcpu: Pointer to vcpu. + * + * Return: + * * true - This mmio exit has been processed. + * * false - This mmio exit has not been processed, require userspace. + */ +static bool gzvm_vcpu_handle_mmio(struct gzvm_vcpu *vcpu) +{ + __u64 addr; + __u32 len; + const void *val_ptr; + + /* So far, we don't have in-kernel mmio read handler */ + if (!vcpu->run->mmio.is_write) + return false; + addr =3D vcpu->run->mmio.phys_addr; + len =3D vcpu->run->mmio.size; + val_ptr =3D &vcpu->run->mmio.data; + + return gzvm_ioevent_write(vcpu, addr, len, val_ptr); +} + /** * gzvm_vcpu_run() - Handle vcpu run ioctl, entry point to guest and exit * point from guest @@ -70,7 +94,8 @@ static long gzvm_vcpu_run(struct gzvm_vcpu *vcpu, void * = __user argp) =20 switch (exit_reason) { case GZVM_EXIT_MMIO: - need_userspace =3D true; + if (!gzvm_vcpu_handle_mmio(vcpu)) + need_userspace =3D true; break; /** * it's geniezone's responsibility to fill corresponding data diff --git a/drivers/virt/geniezone/gzvm_vm.c b/drivers/virt/geniezone/gzvm= _vm.c index eedc2d5c24ad..ba5412acfa7d 100644 --- a/drivers/virt/geniezone/gzvm_vm.c +++ b/drivers/virt/geniezone/gzvm_vm.c @@ -370,6 +370,15 @@ static long gzvm_vm_ioctl(struct file *filp, unsigned = int ioctl, ret =3D gzvm_irqfd(gzvm, &data); break; } + case GZVM_IOEVENTFD: { + struct gzvm_ioeventfd data; + + ret =3D -EFAULT; + if (copy_from_user(&data, argp, sizeof(data))) + goto out; + ret =3D gzvm_ioeventfd(gzvm, &data); + break; + } case GZVM_ENABLE_CAP: { struct gzvm_enable_cap cap; =20 @@ -448,6 +457,14 @@ static struct gzvm *gzvm_create_vm(unsigned long vm_ty= pe) return ERR_PTR(ret); } =20 + ret =3D gzvm_init_ioeventfd(gzvm); + if (ret) { + dev_err(gzvm_debug_dev->this_device, + "Failed to initialize ioeventfd\n"); + kfree(gzvm); + return ERR_PTR(ret); + } + mutex_lock(&gzvm_list_lock); list_add(&gzvm->vm_list, &gzvm_list); mutex_unlock(&gzvm_list_lock); diff --git a/include/linux/gzvm_drv.h b/include/linux/gzvm_drv.h index 54b0a3d443c5..f0a172fb0dd8 100644 --- a/include/linux/gzvm_drv.h +++ b/include/linux/gzvm_drv.h @@ -6,6 +6,7 @@ #ifndef __GZVM_DRV_H__ #define __GZVM_DRV_H__ =20 +#include #include #include #include @@ -92,6 +93,8 @@ struct gzvm { struct mutex resampler_lock; } irqfds; =20 + struct list_head ioevents; + struct list_head vm_list; gzvm_id_t vm_id; =20 @@ -142,4 +145,12 @@ void gzvm_sync_hwstate(struct gzvm_vcpu *vcpu); =20 extern struct miscdevice *gzvm_debug_dev; =20 +int gzvm_init_ioeventfd(struct gzvm *gzvm); +int gzvm_ioeventfd(struct gzvm *gzvm, struct gzvm_ioeventfd *args); +bool gzvm_ioevent_write(struct gzvm_vcpu *vcpu, __u64 addr, int len, + const void *val); +void eventfd_ctx_do_read(struct eventfd_ctx *ctx, __u64 *cnt); +struct vm_area_struct *vma_lookup(struct mm_struct *mm, unsigned long addr= ); +void add_wait_queue_priority(struct wait_queue_head *wq_head, struct wait_= queue_entry *wq_entry); + #endif /* __GZVM_DRV_H__ */ diff --git a/include/uapi/linux/gzvm.h b/include/uapi/linux/gzvm.h index 3f1e829f855d..2af1b068947c 100644 --- a/include/uapi/linux/gzvm.h +++ b/include/uapi/linux/gzvm.h @@ -242,4 +242,27 @@ struct gzvm_irqfd { =20 #define GZVM_IRQFD _IOW(GZVM_IOC_MAGIC, 0x76, struct gzvm_irqfd) =20 +enum { + gzvm_ioeventfd_flag_nr_datamatch, + gzvm_ioeventfd_flag_nr_pio, + gzvm_ioeventfd_flag_nr_deassign, + gzvm_ioeventfd_flag_nr_max, +}; + +#define GZVM_IOEVENTFD_FLAG_DATAMATCH (1 << gzvm_ioeventfd_flag_nr_datamat= ch) +#define GZVM_IOEVENTFD_FLAG_PIO (1 << gzvm_ioeventfd_flag_nr_pio) +#define GZVM_IOEVENTFD_FLAG_DEASSIGN (1 << gzvm_ioeventfd_flag_nr_deassign) +#define GZVM_IOEVENTFD_VALID_FLAG_MASK ((1 << gzvm_ioeventfd_flag_nr_max) = - 1) + +struct gzvm_ioeventfd { + __u64 datamatch; + __u64 addr; /* legal pio/mmio address */ + __u32 len; /* 1, 2, 4, or 8 bytes; or 0 to ignore length */ + __s32 fd; + __u32 flags; + __u8 pad[36]; +}; + +#define GZVM_IOEVENTFD _IOW(GZVM_IOC_MAGIC, 0x79, struct gzvm_ioeventfd) + #endif /* __GZVM_H__ */ --=20 2.18.0 From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44C69C88C84 for ; Fri, 9 Jun 2023 08:53:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240928AbjFIIxI (ORCPT ); Fri, 9 Jun 2023 04:53:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239457AbjFIIw0 (ORCPT ); Fri, 9 Jun 2023 04:52:26 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C66FE1A2; Fri, 9 Jun 2023 01:52:24 -0700 (PDT) X-UUID: f011916a06a211ee9cb5633481061a41-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=X7wcBrEaHWLOUtDgMILeaZX2vag11MpM/W3SGT2LI10=; b=giN08sQLoNSDswGv1ufrWWEnisBT/iKngLg9TrW8hN35gkyVgz620sNwTX9ST0NNyj2Rykat2UinX4XkXp3LIWZaSNgExmRZq879huxm0tAGTdmKJpEdNS/wwEvkdD4d3jTTubxh3Kx0JE4osX9exwlVMiZl7UMYLLDiWy89ucU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:b3b3e3d3-a93a-42e3-9fff-13a36ccd4b5e,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:47,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:22 X-CID-INFO: VERSION:1.1.26,REQID:b3b3e3d3-a93a-42e3-9fff-13a36ccd4b5e,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:47,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:22 X-CID-META: VersionHash:cb9a4e1,CLOUDID:facd1b3e-7aa7-41f3-a6bd-0433bee822f3,B ulkID:230609165219GNSLQJB0,BulkQuantity:0,Recheck:0,SF:48|101|38|29|28|100 |17|19|102,TC:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:nil,QS:ni l,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SDM,TF_CID_SPAM_FAS,TF_CID_SPAM_FSD,TF_CID_SPAM_ULN, TF_CID_SPAM_SNR X-UUID: f011916a06a211ee9cb5633481061a41-20230609 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2025850479; Fri, 09 Jun 2023 16:52:17 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:16 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , Willix Yeh Subject: [PATCH v4 7/9] virt: geniezone: Add memory region support Date: Fri, 9 Jun 2023 16:52:12 +0800 Message-ID: <20230609085214.31071-8-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Jerry Wang" Hypervisor might need to know the precise purpose of each memory region, so that it can provide specific memory protection. We add a new uapi to pass address and size of a memory region and its purpose. Signed-off-by: Jerry Wang Signed-off-by: Liju-clr Chen Signed-off-by: Yi-De Wu --- arch/arm64/geniezone/gzvm_arch_common.h | 2 ++ arch/arm64/geniezone/vm.c | 9 +++++++++ drivers/virt/geniezone/gzvm_vm.c | 1 + include/linux/gzvm_drv.h | 2 ++ 4 files changed, 14 insertions(+) diff --git a/arch/arm64/geniezone/gzvm_arch_common.h b/arch/arm64/geniezone= /gzvm_arch_common.h index 5affa28b935a..5cfeb4df84c5 100644 --- a/arch/arm64/geniezone/gzvm_arch_common.h +++ b/arch/arm64/geniezone/gzvm_arch_common.h @@ -23,6 +23,7 @@ enum { GZVM_FUNC_CREATE_DEVICE, GZVM_FUNC_PROBE, GZVM_FUNC_ENABLE_CAP, + GZVM_FUNC_MEMREGION_PURPOSE, NR_GZVM_FUNC }; =20 @@ -46,6 +47,7 @@ enum { #define MT_HVC_GZVM_CREATE_DEVICE GZVM_HCALL_ID(GZVM_FUNC_CREATE_DEVICE) #define MT_HVC_GZVM_PROBE GZVM_HCALL_ID(GZVM_FUNC_PROBE) #define MT_HVC_GZVM_ENABLE_CAP GZVM_HCALL_ID(GZVM_FUNC_ENABLE_CAP) +#define MT_HVC_GZVM_MEMREGION_PURPOSE GZVM_HCALL_ID(GZVM_FUNC_MEMREGION_PU= RPOSE) #define GIC_V3_NR_LRS 16 =20 /** diff --git a/arch/arm64/geniezone/vm.c b/arch/arm64/geniezone/vm.c index 9f1f14f71b99..e19a66d6a75d 100644 --- a/arch/arm64/geniezone/vm.c +++ b/arch/arm64/geniezone/vm.c @@ -97,6 +97,15 @@ int gzvm_arch_destroy_vm(gzvm_id_t vm_id) 0, 0, &res); } =20 +int gzvm_arch_memregion_purpose(struct gzvm *gzvm, struct gzvm_userspace_m= emory_region *mem) +{ + struct arm_smccc_res res; + + return gzvm_hypcall_wrapper(MT_HVC_GZVM_MEMREGION_PURPOSE, gzvm->vm_id, + mem->guest_phys_addr, mem->memory_size, + mem->flags, 0, 0, 0, &res); +} + static int gzvm_vm_arch_enable_cap(struct gzvm *gzvm, struct gzvm_enable_c= ap *cap, struct arm_smccc_res *res) { diff --git a/drivers/virt/geniezone/gzvm_vm.c b/drivers/virt/geniezone/gzvm= _vm.c index ba5412acfa7d..3b1cb715ef34 100644 --- a/drivers/virt/geniezone/gzvm_vm.c +++ b/drivers/virt/geniezone/gzvm_vm.c @@ -248,6 +248,7 @@ gzvm_vm_ioctl_set_memory_region(struct gzvm *gzvm, memslot->vma =3D vma; memslot->flags =3D mem->flags; memslot->slot_id =3D mem->slot; + gzvm_arch_memregion_purpose(gzvm, mem); return register_memslot_addr_range(gzvm, memslot); } =20 diff --git a/include/linux/gzvm_drv.h b/include/linux/gzvm_drv.h index f0a172fb0dd8..288a339bf382 100644 --- a/include/linux/gzvm_drv.h +++ b/include/linux/gzvm_drv.h @@ -145,6 +145,8 @@ void gzvm_sync_hwstate(struct gzvm_vcpu *vcpu); =20 extern struct miscdevice *gzvm_debug_dev; =20 +int gzvm_arch_memregion_purpose(struct gzvm *gzvm, struct gzvm_userspace_m= emory_region *mem); + int gzvm_init_ioeventfd(struct gzvm *gzvm); int gzvm_ioeventfd(struct gzvm *gzvm, struct gzvm_ioeventfd *args); bool gzvm_ioevent_write(struct gzvm_vcpu *vcpu, __u64 addr, int len, --=20 2.18.0 From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8887AC88C8C for ; Fri, 9 Jun 2023 08:53:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241160AbjFIIx0 (ORCPT ); Fri, 9 Jun 2023 04:53:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240457AbjFIIwc (ORCPT ); Fri, 9 Jun 2023 04:52:32 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80A9F95; Fri, 9 Jun 2023 01:52:26 -0700 (PDT) X-UUID: efabc56a06a211eeb20a276fd37b9834-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=+at7EgWD6gHVW0riAQzHZAbNkwd16/UjB3EqDTMweG4=; b=bdOZCltaHcAl77NPGYqI1VYHnkVhDgxEbGwFy5FR69CHiyk8PaoUYnQ8mDJOI6LRefaGOzREZ7ktgR7VzO8IGziGPyaA1Qf01IsgvZ+jya0qBJbrAOSYfkKDXiqPNwdC5cKv6eMD6OyArpqnzSx9pcs3b/OzxKjunZoSJIc3iqc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:e2ed81e4-ae9e-421e-a00c-c6dfda95b006,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:cb9a4e1,CLOUDID:a0f8ea3d-de1e-4348-bc35-c96f92f1dcbb,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_ULN,TF_CID_SPAM_SNR X-UUID: efabc56a06a211eeb20a276fd37b9834-20230609 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1520695436; Fri, 09 Jun 2023 16:52:17 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:16 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , Willix Yeh Subject: [PATCH v4 8/9] virt: geniezone: Add dtb config support Date: Fri, 9 Jun 2023 16:52:13 +0800 Message-ID: <20230609085214.31071-9-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Jerry Wang" Hypervisor might need to know the accurate address and size of dtb passed from userspace. And then hypervisor would parse the dtb and get vm information. Signed-off-by: Jerry Wang Signed-off-by: Liju-clr Chen Signed-off-by: Yi-De Wu --- arch/arm64/geniezone/gzvm_arch_common.h | 2 ++ arch/arm64/geniezone/vm.c | 8 ++++++++ drivers/virt/geniezone/gzvm_vm.c | 8 ++++++++ include/linux/gzvm_drv.h | 1 + include/uapi/linux/gzvm.h | 10 ++++++++++ 5 files changed, 29 insertions(+) diff --git a/arch/arm64/geniezone/gzvm_arch_common.h b/arch/arm64/geniezone= /gzvm_arch_common.h index 5cfeb4df84c5..ccd2a7516eeb 100644 --- a/arch/arm64/geniezone/gzvm_arch_common.h +++ b/arch/arm64/geniezone/gzvm_arch_common.h @@ -24,6 +24,7 @@ enum { GZVM_FUNC_PROBE, GZVM_FUNC_ENABLE_CAP, GZVM_FUNC_MEMREGION_PURPOSE, + GZVM_FUNC_SET_DTB_CONFIG, NR_GZVM_FUNC }; =20 @@ -48,6 +49,7 @@ enum { #define MT_HVC_GZVM_PROBE GZVM_HCALL_ID(GZVM_FUNC_PROBE) #define MT_HVC_GZVM_ENABLE_CAP GZVM_HCALL_ID(GZVM_FUNC_ENABLE_CAP) #define MT_HVC_GZVM_MEMREGION_PURPOSE GZVM_HCALL_ID(GZVM_FUNC_MEMREGION_PU= RPOSE) +#define MT_HVC_GZVM_SET_DTB_CONFIG GZVM_HCALL_ID(GZVM_FUNC_SET_DTB_CONFIG) #define GIC_V3_NR_LRS 16 =20 /** diff --git a/arch/arm64/geniezone/vm.c b/arch/arm64/geniezone/vm.c index e19a66d6a75d..6062fe85c70e 100644 --- a/arch/arm64/geniezone/vm.c +++ b/arch/arm64/geniezone/vm.c @@ -106,6 +106,14 @@ int gzvm_arch_memregion_purpose(struct gzvm *gzvm, str= uct gzvm_userspace_memory_ mem->flags, 0, 0, 0, &res); } =20 +int gzvm_arch_set_dtb_config(struct gzvm *gzvm, struct gzvm_dtb_config *cf= g) +{ + struct arm_smccc_res res; + + return gzvm_hypcall_wrapper(MT_HVC_GZVM_SET_DTB_CONFIG, gzvm->vm_id, cfg-= >dtb_addr, + cfg->dtb_size, 0, 0, 0, 0, &res); +} + static int gzvm_vm_arch_enable_cap(struct gzvm *gzvm, struct gzvm_enable_c= ap *cap, struct arm_smccc_res *res) { diff --git a/drivers/virt/geniezone/gzvm_vm.c b/drivers/virt/geniezone/gzvm= _vm.c index 3b1cb715ef34..d379793deace 100644 --- a/drivers/virt/geniezone/gzvm_vm.c +++ b/drivers/virt/geniezone/gzvm_vm.c @@ -390,6 +390,14 @@ static long gzvm_vm_ioctl(struct file *filp, unsigned = int ioctl, ret =3D gzvm_vm_ioctl_enable_cap(gzvm, &cap, argp); break; } + case GZVM_SET_DTB_CONFIG: { + struct gzvm_dtb_config cfg; + + if (copy_from_user(&cfg, argp, sizeof(cfg))) + goto out; + ret =3D gzvm_arch_set_dtb_config(gzvm, &cfg); + break; + } default: ret =3D -ENOTTY; } diff --git a/include/linux/gzvm_drv.h b/include/linux/gzvm_drv.h index 288a339bf382..e920397e83d3 100644 --- a/include/linux/gzvm_drv.h +++ b/include/linux/gzvm_drv.h @@ -146,6 +146,7 @@ void gzvm_sync_hwstate(struct gzvm_vcpu *vcpu); extern struct miscdevice *gzvm_debug_dev; =20 int gzvm_arch_memregion_purpose(struct gzvm *gzvm, struct gzvm_userspace_m= emory_region *mem); +int gzvm_arch_set_dtb_config(struct gzvm *gzvm, struct gzvm_dtb_config *ar= gs); =20 int gzvm_init_ioeventfd(struct gzvm *gzvm); int gzvm_ioeventfd(struct gzvm *gzvm, struct gzvm_ioeventfd *args); diff --git a/include/uapi/linux/gzvm.h b/include/uapi/linux/gzvm.h index 2af1b068947c..28354c17ed9c 100644 --- a/include/uapi/linux/gzvm.h +++ b/include/uapi/linux/gzvm.h @@ -265,4 +265,14 @@ struct gzvm_ioeventfd { =20 #define GZVM_IOEVENTFD _IOW(GZVM_IOC_MAGIC, 0x79, struct gzvm_ioeventfd) =20 +struct gzvm_dtb_config { + /* dtb address set by VMM (guset memory) */ + __u64 dtb_addr; + /* dtb size */ + __u64 dtb_size; +}; + +#define GZVM_SET_DTB_CONFIG _IOW(GZVM_IOC_MAGIC, 0xff, \ + struct gzvm_dtb_config) + #endif /* __GZVM_H__ */ --=20 2.18.0 From nobody Fri Sep 20 17:34:20 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2040C7EE29 for ; Fri, 9 Jun 2023 08:53:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240731AbjFIIxE (ORCPT ); Fri, 9 Jun 2023 04:53:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239953AbjFIIw1 (ORCPT ); Fri, 9 Jun 2023 04:52:27 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8096173A; Fri, 9 Jun 2023 01:52:25 -0700 (PDT) X-UUID: f0a37bf206a211ee9cb5633481061a41-20230609 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=EIUqCM6uV08j23+ms0Il6VpldEmAn0HvRqmQNNz91rY=; b=ZJHFp2G+Fi4VYoFuB30yIW/5RCtP9TwGXATQrEo5ThZZHRpD9hrTudPf6a9tsuLdk6KCDecwjfS0G1scvjodtX86GLWAvXCMITeKes+krQiS8l49gDpOAhbx7/aBT1iMJVrGIH0j05WGsJaxQojahEagXB8DoYuCRxV4y5OtNHg=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.26,REQID:d629a266-9fe3-4c26-8a4d-2c06590a3a76,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:cb9a4e1,CLOUDID:89f8ea3d-de1e-4348-bc35-c96f92f1dcbb,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: f0a37bf206a211ee9cb5633481061a41-20230609 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 186619215; Fri, 09 Jun 2023 16:52:18 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 9 Jun 2023 16:52:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 9 Jun 2023 16:52:16 +0800 From: Yi-De Wu To: Yingshiuan Pan , Ze-Yu Wang , Yi-De Wu , Jonathan Corbet , Catalin Marinas , Will Deacon , Arnd Bergmann , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Krzysztof Kozlowski , Rob Herring , "Conor Dooley" , Conor Dooley , Trilok Soni , David Bradil , Jade Shih , Miles Chen , Ivan Tseng , My Chuang , Shawn Hsiao , PeiLun Suei , Liju Chen , "Willix Yeh" Subject: [PATCH v4 9/9] virt: geniezone: Add virtual timer support Date: Fri, 9 Jun 2023 16:52:14 +0800 Message-ID: <20230609085214.31071-10-yi-de.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230609085214.31071-1-yi-de.wu@mediatek.com> References: <20230609085214.31071-1-yi-de.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Willix Yeh" Implement vtimer migration handler. - Using hrtimer for guest vtimer migration - Identify migrate flag to do register hrtimer Signed-off-by: Willix Yeh Signed-off-by: Liju Chen Signed-off-by: Yi-De Wu --- arch/arm64/geniezone/gzvm_arch_common.h | 2 ++ arch/arm64/geniezone/vcpu.c | 40 +++++++++++++++++++++++++ drivers/virt/geniezone/gzvm_vcpu.c | 34 +++++++++++++++++++++ drivers/virt/geniezone/gzvm_vm.c | 10 +++++++ include/linux/gzvm_drv.h | 9 ++++++ include/uapi/linux/gzvm.h | 2 ++ 6 files changed, 97 insertions(+) diff --git a/arch/arm64/geniezone/gzvm_arch_common.h b/arch/arm64/geniezone= /gzvm_arch_common.h index ccd2a7516eeb..a7ee6b959c18 100644 --- a/arch/arm64/geniezone/gzvm_arch_common.h +++ b/arch/arm64/geniezone/gzvm_arch_common.h @@ -80,6 +80,8 @@ static inline gzvm_vcpu_id_t get_vcpuid_from_tuple(unsign= ed int tuple) struct gzvm_vcpu_hwstate { __u32 nr_lrs; __u64 lr[GIC_V3_NR_LRS]; + __u64 vtimer_delay; + __u32 vtimer_migrate; }; =20 static inline unsigned int diff --git a/arch/arm64/geniezone/vcpu.c b/arch/arm64/geniezone/vcpu.c index 8d2572bdf053..b26393a355bd 100644 --- a/arch/arm64/geniezone/vcpu.c +++ b/arch/arm64/geniezone/vcpu.c @@ -4,6 +4,7 @@ */ =20 #include +#include #include #include =20 @@ -40,15 +41,54 @@ int gzvm_arch_vcpu_update_one_reg(struct gzvm_vcpu *vcp= u, __u64 reg_id, return ret; } =20 +static void clear_migrate_state(struct gzvm_vcpu *vcpu) +{ + vcpu->hwstate->vtimer_migrate =3D 0; + vcpu->hwstate->vtimer_delay =3D 0; +} + +static u64 gzvm_mtimer_delay_time(u64 delay) +{ + u64 ns; + + ns =3D clocksource_cyc2ns(delay, timecycle.mult, timecycle.shift); + + return ns; +} + +static void gzvm_mtimer_release(struct gzvm_vcpu *vcpu) +{ + hrtimer_cancel(&vcpu->gzvm_mtimer); + + clear_migrate_state(vcpu); +} + +static void gzvm_mtimer_catch(struct hrtimer *hrt, u64 delay) +{ + u64 ns; + + ns =3D gzvm_mtimer_delay_time(delay); + hrtimer_start(hrt, ktime_add_ns(ktime_get(), ns), HRTIMER_MODE_ABS_HARD); +} + int gzvm_arch_vcpu_run(struct gzvm_vcpu *vcpu, __u64 *exit_reason) { struct arm_smccc_res res; unsigned long a1; int ret; =20 + /* hrtimer cancel and clear migrate state */ + if (vcpu->hwstate->vtimer_migrate) + gzvm_mtimer_release(vcpu); + a1 =3D assemble_vm_vcpu_tuple(vcpu->gzvm->vm_id, vcpu->vcpuid); ret =3D gzvm_hypcall_wrapper(MT_HVC_GZVM_RUN, a1, 0, 0, 0, 0, 0, 0, &res); + + /* hrtimer register if migration needed */ + if (vcpu->hwstate->vtimer_migrate) + gzvm_mtimer_catch(&vcpu->gzvm_mtimer, vcpu->hwstate->vtimer_delay); + *exit_reason =3D res.a1; return ret; } diff --git a/drivers/virt/geniezone/gzvm_vcpu.c b/drivers/virt/geniezone/gz= vm_vcpu.c index 40b57d85eaa2..74001589571e 100644 --- a/drivers/virt/geniezone/gzvm_vcpu.c +++ b/drivers/virt/geniezone/gzvm_vcpu.c @@ -5,12 +5,14 @@ =20 #include #include +#include #include #include #include #include #include #include +#include "gzvm_common.h" =20 /* maximum size needed for holding an integer */ #define ITOA_MAX_LEN 12 @@ -73,6 +75,33 @@ static bool gzvm_vcpu_handle_mmio(struct gzvm_vcpu *vcpu) return gzvm_ioevent_write(vcpu, addr, len, val_ptr); } =20 +static void mtimer_irq_forward(struct gzvm_vcpu *vcpu) +{ + struct gzvm *gzvm; + unsigned int irq_num, irq_type, vcpu_idx; + + gzvm =3D vcpu->gzvm; + + irq_num =3D (GZVM_VTIMER_IRQ >> GZVM_IRQ_NUM_SHIFT) & GZVM_IRQ_NUM_MASK; + irq_type =3D (GZVM_VTIMER_IRQ >> GZVM_IRQ_TYPE_SHIFT) & GZVM_IRQ_TYPE_MAS= K; + vcpu_idx =3D (GZVM_VTIMER_IRQ >> GZVM_IRQ_VCPU_SHIFT) & GZVM_IRQ_VCPU_MAS= K; + vcpu_idx +=3D ((GZVM_VTIMER_IRQ >> GZVM_IRQ_VCPU2_SHIFT) & GZVM_IRQ_VCPU2= _MASK) * + (GZVM_IRQ_VCPU_MASK + 1); + + gzvm_irqchip_inject_irq(gzvm, vcpu_idx, irq_type, irq_num, 1); +} + +static enum hrtimer_restart gzvm_mtimer_expire(struct hrtimer *hrt) +{ + struct gzvm_vcpu *vcpu; + + vcpu =3D container_of(hrt, struct gzvm_vcpu, gzvm_mtimer); + + mtimer_irq_forward(vcpu); + + return HRTIMER_NORESTART; +} + /** * gzvm_vcpu_run() - Handle vcpu run ioctl, entry point to guest and exit * point from guest @@ -172,6 +201,7 @@ static void gzvm_destroy_vcpu(struct gzvm_vcpu *vcpu) if (!vcpu) return; =20 + hrtimer_cancel(&vcpu->gzvm_mtimer); gzvm_arch_destroy_vcpu(vcpu->gzvm->vm_id, vcpu->vcpuid); /* clean guest's data */ memset(vcpu->run, 0, GZVM_VCPU_RUN_MAP_SIZE); @@ -241,6 +271,10 @@ int gzvm_vm_ioctl_create_vcpu(struct gzvm *gzvm, u32 c= puid) vcpu->gzvm =3D gzvm; mutex_init(&vcpu->lock); =20 + /* gzvm_mtimer init based on hrtimer */ + hrtimer_init(&vcpu->gzvm_mtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD); + vcpu->gzvm_mtimer.function =3D gzvm_mtimer_expire; + ret =3D gzvm_arch_create_vcpu(gzvm->vm_id, vcpu->vcpuid, vcpu->run); if (ret < 0) goto free_vcpu_run; diff --git a/drivers/virt/geniezone/gzvm_vm.c b/drivers/virt/geniezone/gzvm= _vm.c index d379793deace..74268d294800 100644 --- a/drivers/virt/geniezone/gzvm_vm.c +++ b/drivers/virt/geniezone/gzvm_vm.c @@ -4,6 +4,7 @@ */ =20 #include +#include #include #include #include @@ -17,6 +18,8 @@ static DEFINE_MUTEX(gzvm_list_lock); static LIST_HEAD(gzvm_list); =20 +struct timecycle timecycle; + /** * hva_to_pa_fast() - converts hva to pa in generic fast way * @@ -474,6 +477,13 @@ static struct gzvm *gzvm_create_vm(unsigned long vm_ty= pe) return ERR_PTR(ret); } =20 + /* timecycle init mult shift */ + clocks_calc_mult_shift(&timecycle.mult, + &timecycle.shift, + arch_timer_get_cntfrq(), + NSEC_PER_SEC, + 10); + mutex_lock(&gzvm_list_lock); list_add(&gzvm->vm_list, &gzvm_list); mutex_unlock(&gzvm_list_lock); diff --git a/include/linux/gzvm_drv.h b/include/linux/gzvm_drv.h index e920397e83d3..5953cc1ff8fc 100644 --- a/include/linux/gzvm_drv.h +++ b/include/linux/gzvm_drv.h @@ -6,6 +6,7 @@ #ifndef __GZVM_DRV_H__ #define __GZVM_DRV_H__ =20 +#include #include #include #include @@ -40,6 +41,13 @@ =20 #define GZVM_VCPU_RUN_MAP_SIZE (PAGE_SIZE * 2) =20 +struct timecycle { + u32 mult; + u32 shift; +}; + +extern struct timecycle timecycle; + /* struct mem_region_addr_range - Identical to ffa memory constituent */ struct mem_region_addr_range { /* the base IPA of the constituent memory region, aligned to 4 kiB */ @@ -74,6 +82,7 @@ struct gzvm_vcpu { struct mutex lock; struct gzvm_vcpu_run *run; struct gzvm_vcpu_hwstate *hwstate; + struct hrtimer gzvm_mtimer; }; =20 struct gzvm { diff --git a/include/uapi/linux/gzvm.h b/include/uapi/linux/gzvm.h index 28354c17ed9c..b1c42145823a 100644 --- a/include/uapi/linux/gzvm.h +++ b/include/uapi/linux/gzvm.h @@ -61,6 +61,8 @@ struct gzvm_userspace_memory_region { #define GZVM_SET_USER_MEMORY_REGION _IOW(GZVM_IOC_MAGIC, 0x46, \ struct gzvm_userspace_memory_region) =20 +#define GZVM_VTIMER_IRQ 27 + /* for GZVM_IRQ_LINE, irq field index values */ #define GZVM_IRQ_VCPU2_SHIFT 28 #define GZVM_IRQ_VCPU2_MASK 0xf --=20 2.18.0