From nobody Mon Feb 9 03:45:49 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B7CAC7EE25 for ; Fri, 9 Jun 2023 08:18:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240396AbjFIISJ (ORCPT ); Fri, 9 Jun 2023 04:18:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240207AbjFIIRk (ORCPT ); Fri, 9 Jun 2023 04:17:40 -0400 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10EDD2D7B; Fri, 9 Jun 2023 01:17:06 -0700 (PDT) X-GND-Sasl: kory.maincent@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1686298623; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oCPB9Nf3YZqvG1rzu67yQSLPi8ZPt/80c1MDnzGqrYE=; b=d+AW7TcbsOXUczeTbAj0+f1hTV3cgIhoVMCMFoZUmd4pq1hiPoV7nM3TWzrjrDqXxJGIBH WCZWVzTHH9uIxpnW0agbTU70MjQKdEYkKJ7vevRIvaRfuuQTAlh3+AjAuDTXNqoRf/Ziza eN7Wrz+IPBv6JEfNn2zGCeCXpUmJ2U/Gz1N8NZRZLCTIlfidyUzxTmRk6N/v4VZSBzDLVV YQ4nYhGhNZ/Bcis2Jav4orHvVEQbrbBBMLhx3HI39x/F0zCUpGZ99YnFbF/PquYBo7Zmvl c476gy+A60kmmPotp6HPPLqNwdZkIBglcWZEx62DbPGosO0elJnd8DGVeg1lSw== X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com X-GND-Sasl: kory.maincent@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 47970C0010; Fri, 9 Jun 2023 08:17:02 +0000 (UTC) From: =?UTF-8?q?K=C3=B6ry=20Maincent?= To: Cai Huoqing , Manivannan Sadhasivam , Serge Semin , Vinod Koul , Gustavo Pimentel , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Thomas Petazzoni , Gustavo Pimentel , Herve Codina , Kory Maincent Subject: [PATCH 6/9] dmaengine: dw-edma: HDMA: Fix possible race condition in local setup Date: Fri, 9 Jun 2023 10:16:51 +0200 Message-Id: <20230609081654.330857-7-kory.maincent@bootlin.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230609081654.330857-1-kory.maincent@bootlin.com> References: <20230609081654.330857-1-kory.maincent@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-Spam-Score: 300 X-GND-Status: SPAM Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kory Maincent When writing the linked list elements and pointer the control need to be written at the end. If the control is written and the SAR and DAR not stored we could face a race condition. Added a memory barrier to make sure the memory has been written. Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") Signed-off-by: Kory Maincent --- This patch has not been tested since I don't have board with HDMA in local setup. This patch is fixing a commit which is only in dmaengine tree and not merged mainline. --- drivers/dma/dw-edma/dw-hdma-v0-core.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw= -hdma-v0-core.c index f28e1671a753..d3c70500496c 100644 --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c @@ -155,10 +155,13 @@ static void dw_hdma_v0_write_ll_data(struct dw_edma_c= hunk *chunk, int i, if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { struct dw_hdma_v0_lli *lli =3D chunk->ll_region.vaddr.mem + ofs; =20 - lli->control =3D control; lli->transfer_size =3D size; lli->sar.reg =3D sar; lli->dar.reg =3D dar; + + /* Make sure sar and dar is written before writing control */ + dma_wmb(); + lli->control =3D control; } else { struct dw_hdma_v0_lli __iomem *lli =3D chunk->ll_region.vaddr.io + ofs; =20 @@ -177,8 +180,11 @@ static void dw_hdma_v0_write_ll_link(struct dw_edma_ch= unk *chunk, if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { struct dw_hdma_v0_llp *llp =3D chunk->ll_region.vaddr.mem + ofs; =20 - llp->control =3D control; llp->llp.reg =3D pointer; + + /* Make sure sar and dar is written before writing control */ + dma_wmb(); + llp->control =3D control; } else { struct dw_hdma_v0_llp __iomem *llp =3D chunk->ll_region.vaddr.io + ofs; =20 --=20 2.25.1