From nobody Sun Feb 8 19:21:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 572C2C7EE37 for ; Thu, 8 Jun 2023 04:52:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234218AbjFHEwq (ORCPT ); Thu, 8 Jun 2023 00:52:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57148 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233717AbjFHEwk (ORCPT ); Thu, 8 Jun 2023 00:52:40 -0400 Received: from mx.sberdevices.ru (mx.sberdevices.ru [45.89.227.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06E0526AC; Wed, 7 Jun 2023 21:52:39 -0700 (PDT) Received: from s-lin-edge02.sberdevices.ru (localhost [127.0.0.1]) by mx.sberdevices.ru (Postfix) with ESMTP id 5F0725FD73; Thu, 8 Jun 2023 07:52:37 +0300 (MSK) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sberdevices.ru; s=mail; t=1686199957; bh=+mk6QMFbQKxezimmeq2ZZmLw+GO6C96cbN+kUV6t/iE=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type; b=YgQjyRS76ZvjsOutPDtCaVhfE20Wr3qL3BNEzD1ncTvBXGTbDVLzVbm0rlq/EqmOw Qkv1p95hubLVjGWdw3LVIJMgGNzI36/xIRs8nXJHLiJz4CVtY6d9CjGu2qMj69Nsfu bSVh6LA8jKd1lgLawpY1hS0BuW3g2nq7tmnAyamx+3IPDFKksquaHZKRutcOUE3sNQ yzLa+SCOhmrER4HDGl9lntE8ePandm4RAvEKgKRXgiFTpygkxsDZTAgnYrHh9twYXZ J6gA+vutkYarf2moNAQAQ4riNC7myuYqUUygDNf1aVudvxsbV8VAEGbX8DTNFbsa4a 2hH8pI3YUggqA== Received: from S-MS-EXCH01.sberdevices.ru (S-MS-EXCH01.sberdevices.ru [172.16.1.4]) by mx.sberdevices.ru (Postfix) with ESMTP; Thu, 8 Jun 2023 07:52:37 +0300 (MSK) From: Arseniy Krasnov To: Liang Yang , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl CC: , , Arseniy Krasnov , , , , , Subject: [PATCH v3 1/2] dt-bindings: nand: meson: Fix 'nand-rb' property Date: Thu, 8 Jun 2023 07:47:27 +0300 Message-ID: <20230608044728.1328506-2-AVKrasnov@sberdevices.ru> X-Mailer: git-send-email 2.35.0 In-Reply-To: <20230608044728.1328506-1-AVKrasnov@sberdevices.ru> References: <20230608044728.1328506-1-AVKrasnov@sberdevices.ru> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [172.16.1.6] X-ClientProxiedBy: S-MS-EXCH01.sberdevices.ru (172.16.1.4) To S-MS-EXCH01.sberdevices.ru (172.16.1.4) X-KSMG-Rule-ID: 4 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Status: not scanned, disabled by settings X-KSMG-AntiSpam-Interceptor-Info: not scanned X-KSMG-AntiPhishing: not scanned, disabled by settings X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 1.1.2.30, bases: 2023/06/08 00:23:00 #21457426 X-KSMG-AntiVirus-Status: Clean, skipped Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add description of 'nand-rb' property. Use "Fixes" because this property must be supported since the beginning. Fixes: fbc00b5e746f ("dt-bindings: nand: meson: convert txt to yaml") Signed-off-by: Arseniy Krasnov Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/mtd/amlogic,meson-nand.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml = b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml index 28fb9a7dd70f..3bec8af91bbb 100644 --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml @@ -58,6 +58,11 @@ patternProperties: meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60 meson-axg-nfc 8 =20 + nand-rb: + maxItems: 1 + items: + maximum: 0 + required: - compatible - reg @@ -87,6 +92,7 @@ examples: =20 nand@0 { reg =3D <0>; + nand-rb =3D <0>; }; }; =20 --=20 2.35.0 From nobody Sun Feb 8 19:21:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A0D9C7EE2E for ; Thu, 8 Jun 2023 04:52:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234250AbjFHEwz (ORCPT ); Thu, 8 Jun 2023 00:52:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233781AbjFHEwl (ORCPT ); Thu, 8 Jun 2023 00:52:41 -0400 Received: from mx.sberdevices.ru (mx.sberdevices.ru [45.89.227.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A46626BF; Wed, 7 Jun 2023 21:52:40 -0700 (PDT) Received: from s-lin-edge02.sberdevices.ru (localhost [127.0.0.1]) by mx.sberdevices.ru (Postfix) with ESMTP id 6A8B05FD74; Thu, 8 Jun 2023 07:52:38 +0300 (MSK) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sberdevices.ru; s=mail; t=1686199958; bh=GYtnAFGzVIKIFmc2XJJv/gZaWIiwjNzXEEwtgsJHPVg=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type; b=bhqbbLMNNXfKM0GKI0nW5ePmL7xzrBxXpJXzfSfxDLWB+wq1td2pYBum1VgUqVByT Sz5KwmDxtwVEcYDv709vzldv/gQ55kgruHxzk6qlVi6ZoVU2Mv7qRm+lOsf3PTnwPS nBz5qlv0KLHWxcJbhpy9Hj1Js5jsH/X/uviaNeAx6JSxyIlF+CG+s7Z99ggRlD5x2Y COONcirzEZ4B9OYQ2R2LAh3LXYBATbn+gRi+4MVTpFlDZUqdO/QqcYRq+kBMSpeCNt D46XH8LEzKF3z66LrJVRPEWE72kbf0/M3/oSj2cvsX98VA8CtN3TIZD4PwnF2O5Sfg iBAaVyr1A+OIw== Received: from S-MS-EXCH01.sberdevices.ru (S-MS-EXCH01.sberdevices.ru [172.16.1.4]) by mx.sberdevices.ru (Postfix) with ESMTP; Thu, 8 Jun 2023 07:52:38 +0300 (MSK) From: Arseniy Krasnov To: Liang Yang , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl CC: , , Arseniy Krasnov , , , , , Subject: [PATCH v3 2/2] mtd: rawnand: meson: waiting w/o wired ready/busy pin Date: Thu, 8 Jun 2023 07:47:28 +0300 Message-ID: <20230608044728.1328506-3-AVKrasnov@sberdevices.ru> X-Mailer: git-send-email 2.35.0 In-Reply-To: <20230608044728.1328506-1-AVKrasnov@sberdevices.ru> References: <20230608044728.1328506-1-AVKrasnov@sberdevices.ru> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [172.16.1.6] X-ClientProxiedBy: S-MS-EXCH01.sberdevices.ru (172.16.1.4) To S-MS-EXCH01.sberdevices.ru (172.16.1.4) X-KSMG-Rule-ID: 4 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Status: not scanned, disabled by settings X-KSMG-AntiSpam-Interceptor-Info: not scanned X-KSMG-AntiPhishing: not scanned, disabled by settings X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 1.1.2.30, bases: 2023/06/08 00:23:00 #21457426 X-KSMG-AntiVirus-Status: Clean, skipped Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" If there is no wired ready/busy pin, classic way to wait for command completion is to use function 'nand_soft_waitrdy()'. Meson NAND has special command which allows to wait for NAND_STATUS_READY bit without reading status in a software loop (as 'nand_soft_waitrdy()' does). To use it send this command along with NAND_CMD_STATUS, then wait for an interrupt, and after interrupt send NAND_CMD_READ0. So this feature allows to use interrupt driven waiting without wired ready/busy pin. Suggested-by: Liang Yang Signed-off-by: Arseniy Krasnov --- drivers/mtd/nand/raw/meson_nand.c | 77 +++++++++++++++++++++++++++++-- 1 file changed, 73 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson= _nand.c index 074e14225c06..9f05e113b4ea 100644 --- a/drivers/mtd/nand/raw/meson_nand.c +++ b/drivers/mtd/nand/raw/meson_nand.c @@ -38,6 +38,7 @@ #define NFC_CMD_SCRAMBLER_DISABLE 0 #define NFC_CMD_SHORTMODE_DISABLE 0 #define NFC_CMD_RB_INT BIT(14) +#define NFC_CMD_RB_INT_NO_PIN ((0xb << 10) | BIT(18) | BIT(16)) =20 #define NFC_CMD_GET_SIZE(x) (((x) >> 22) & GENMASK(4, 0)) =20 @@ -179,6 +180,7 @@ struct meson_nfc { u32 info_bytes; =20 unsigned long assigned_cs; + bool no_rb_pin; }; =20 enum { @@ -392,7 +394,42 @@ static void meson_nfc_set_data_oob(struct nand_chip *n= and, } } =20 -static int meson_nfc_queue_rb(struct meson_nfc *nfc, int timeout_ms) +static int meson_nfc_wait_no_rb_pin(struct meson_nfc *nfc, int timeout_ms, + bool need_cmd_read0) +{ + u32 cmd, cfg; + + meson_nfc_cmd_idle(nfc, nfc->timing.twb); + meson_nfc_drain_cmd(nfc); + meson_nfc_wait_cmd_finish(nfc, CMD_FIFO_EMPTY_TIMEOUT); + + cfg =3D readl(nfc->reg_base + NFC_REG_CFG); + cfg |=3D NFC_RB_IRQ_EN; + writel(cfg, nfc->reg_base + NFC_REG_CFG); + + reinit_completion(&nfc->completion); + cmd =3D nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_STATUS; + writel(cmd, nfc->reg_base + NFC_REG_CMD); + + /* use the max erase time as the maximum clock for waiting R/B */ + cmd =3D NFC_CMD_RB | NFC_CMD_RB_INT_NO_PIN | nfc->timing.tbers_max; + writel(cmd, nfc->reg_base + NFC_REG_CMD); + + if (!wait_for_completion_timeout(&nfc->completion, + msecs_to_jiffies(timeout_ms))) + return -ETIMEDOUT; + + if (need_cmd_read0) { + cmd =3D nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_READ0; + writel(cmd, nfc->reg_base + NFC_REG_CMD); + meson_nfc_drain_cmd(nfc); + meson_nfc_wait_cmd_finish(nfc, CMD_FIFO_EMPTY_TIMEOUT); + } + + return 0; +} + +static int meson_nfc_wait_rb_pin(struct meson_nfc *nfc, int timeout_ms) { u32 cmd, cfg; int ret =3D 0; @@ -420,6 +457,27 @@ static int meson_nfc_queue_rb(struct meson_nfc *nfc, i= nt timeout_ms) return ret; } =20 +static int meson_nfc_queue_rb(struct meson_nfc *nfc, int timeout_ms, + bool need_cmd_read0) +{ + if (nfc->no_rb_pin) { + /* This mode is used when there is no wired R/B pin. + * It works like 'nand_soft_waitrdy()', but instead of + * polling NAND_CMD_STATUS bit in the software loop, + * it will wait for interrupt - controllers checks IO + * bus and when it detects NAND_CMD_STATUS on it, it + * raises interrupt. After interrupt, NAND_CMD_READ0 is + * sent as terminator of the ready waiting procedure if + * needed (for all cases except page programming - this + * is reason of 'need_cmd_read0' flag). + */ + return meson_nfc_wait_no_rb_pin(nfc, timeout_ms, + need_cmd_read0); + } else { + return meson_nfc_wait_rb_pin(nfc, timeout_ms); + } +} + static void meson_nfc_set_user_byte(struct nand_chip *nand, u8 *oob_buf) { struct meson_nfc_nand_chip *meson_chip =3D to_meson_nand(nand); @@ -623,7 +681,7 @@ static int meson_nfc_rw_cmd_prepare_and_execute(struct = nand_chip *nand, if (in) { nfc->cmdfifo.rw.cmd1 =3D cs | NFC_CMD_CLE | NAND_CMD_READSTART; writel(nfc->cmdfifo.rw.cmd1, nfc->reg_base + NFC_REG_CMD); - meson_nfc_queue_rb(nfc, PSEC_TO_MSEC(sdr->tR_max)); + meson_nfc_queue_rb(nfc, PSEC_TO_MSEC(sdr->tR_max), true); } else { meson_nfc_cmd_idle(nfc, nfc->timing.tadl); } @@ -669,7 +727,7 @@ static int meson_nfc_write_page_sub(struct nand_chip *n= and, =20 cmd =3D nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_PAGEPROG; writel(cmd, nfc->reg_base + NFC_REG_CMD); - meson_nfc_queue_rb(nfc, PSEC_TO_MSEC(sdr->tPROG_max)); + meson_nfc_queue_rb(nfc, PSEC_TO_MSEC(sdr->tPROG_max), false); =20 meson_nfc_dma_buffer_release(nand, data_len, info_len, DMA_TO_DEVICE); =20 @@ -952,7 +1010,8 @@ static int meson_nfc_exec_op(struct nand_chip *nand, break; =20 case NAND_OP_WAITRDY_INSTR: - meson_nfc_queue_rb(nfc, instr->ctx.waitrdy.timeout_ms); + meson_nfc_queue_rb(nfc, instr->ctx.waitrdy.timeout_ms, + true); if (instr->delay_ns) meson_nfc_cmd_idle(nfc, delay_idle); break; @@ -1248,6 +1307,7 @@ meson_nfc_nand_chip_init(struct device *dev, struct mtd_info *mtd; int ret, i; u32 tmp, nsels; + u32 nand_rb_val =3D 0; =20 nsels =3D of_property_count_elems_of_size(np, "reg", sizeof(u32)); if (!nsels || nsels > MAX_CE_NUM) { @@ -1287,6 +1347,15 @@ meson_nfc_nand_chip_init(struct device *dev, mtd->owner =3D THIS_MODULE; mtd->dev.parent =3D dev; =20 + ret =3D of_property_read_u32(np, "nand-rb", &nand_rb_val); + if (ret =3D=3D -EINVAL) + nfc->no_rb_pin =3D true; + else if (ret) + return ret; + + if (nand_rb_val) + return -EINVAL; + ret =3D nand_scan(nand, nsels); if (ret) return ret; --=20 2.35.0