From nobody Sun Feb 8 21:47:10 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EA07C7EE24 for ; Tue, 6 Jun 2023 18:23:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238935AbjFFSXk (ORCPT ); Tue, 6 Jun 2023 14:23:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238747AbjFFSW7 (ORCPT ); Tue, 6 Jun 2023 14:22:59 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B36531711; Tue, 6 Jun 2023 11:22:42 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 356IMNGO022989; Tue, 6 Jun 2023 13:22:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1686075743; bh=JQkOCG94+40ncdAYyraVoynmOianmiiWpLMMz//9w40=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Qxs2BqSJ/Fg95gxkAPpzWXRLELeTpdFJb6A+jFHSrSKo/lsR1ll9wNjZNHzGv/CIS h1MHWZIjywBbVxmEU6pd3ltr54CDBmJ4N7njYGcbwrUcZUaWfa069+XcWMuHBZleKj INFXoEsxSpZKvGyx/IEzHQSwBEsO1MrPlmyDXQ9E= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 356IMNgW094558 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 6 Jun 2023 13:22:23 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 6 Jun 2023 13:22:22 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 6 Jun 2023 13:22:22 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 356IMMgt040842; Tue, 6 Jun 2023 13:22:22 -0500 From: Nishanth Menon To: Conor Dooley , Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Udit Kumar , Nishanth Menon Subject: [PATCH V2 02/14] arm64: dts: ti: k3-j721e-som-p0/common-proc-board: Fixup reference to phandles array Date: Tue, 6 Jun 2023 13:22:08 -0500 Message-ID: <20230606182220.3661956-3-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230606182220.3661956-1-nm@ti.com> References: <20230606182220.3661956-1-nm@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When referring to array of phandles, using <> to separate the array entries is better notation as it makes potential errors with phandle and cell arguments easier to catch. Fix the outliers to be consistent with the rest of the usage. Signed-off-by: Nishanth Menon --- No Changes from V1 V1: https://lore.kernel.org/r/20230601152636.858553-3-nm@ti.com .../boot/dts/ti/k3-j721e-common-proc-board.dts | 4 ++-- arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 18 +++++++++--------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 7db0603125aa..03c575e353a0 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -24,7 +24,7 @@ gpio_keys: gpio-keys { compatible =3D "gpio-keys"; autorepeat; pinctrl-names =3D "default"; - pinctrl-0 =3D <&sw10_button_pins_default &sw11_button_pins_default>; + pinctrl-0 =3D <&sw10_button_pins_default>, <&sw11_button_pins_default>; =20 sw10: switch-10 { label =3D "GPIO Key USER1"; @@ -646,7 +646,7 @@ exp5: gpio@20 { =20 &mcu_cpsw { pinctrl-names =3D "default"; - pinctrl-0 =3D <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; + pinctrl-0 =3D <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; }; =20 &davinci_mdio { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/= dts/ti/k3-j721e-som-p0.dtsi index e289d5b44356..bc15de6ab8ac 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -256,55 +256,55 @@ mbox_c71_0: mbox-c71-0 { }; =20 &mcu_r5fss0_core0 { - mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; + mboxes =3D <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; =20 &mcu_r5fss0_core1 { - mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; + mboxes =3D <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; memory-region =3D <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; =20 &main_r5fss0_core0 { - mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; + mboxes =3D <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; =20 &main_r5fss0_core1 { - mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; + mboxes =3D <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; memory-region =3D <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; =20 &main_r5fss1_core0 { - mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; + mboxes =3D <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>; memory-region =3D <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; =20 &main_r5fss1_core1 { - mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; + mboxes =3D <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>; memory-region =3D <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; =20 &c66_0 { - mboxes =3D <&mailbox0_cluster3 &mbox_c66_0>; + mboxes =3D <&mailbox0_cluster3>, <&mbox_c66_0>; memory-region =3D <&c66_0_dma_memory_region>, <&c66_0_memory_region>; }; =20 &c66_1 { - mboxes =3D <&mailbox0_cluster3 &mbox_c66_1>; + mboxes =3D <&mailbox0_cluster3>, <&mbox_c66_1>; memory-region =3D <&c66_1_dma_memory_region>, <&c66_1_memory_region>; }; =20 &c71_0 { - mboxes =3D <&mailbox0_cluster4 &mbox_c71_0>; + mboxes =3D <&mailbox0_cluster4>, <&mbox_c71_0>; memory-region =3D <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; --=20 2.40.0