From nobody Wed Feb 11 01:25:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E3C7C77B73 for ; Tue, 6 Jun 2023 18:23:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238932AbjFFSXg (ORCPT ); Tue, 6 Jun 2023 14:23:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238639AbjFFSW7 (ORCPT ); Tue, 6 Jun 2023 14:22:59 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7AC37170B; Tue, 6 Jun 2023 11:22:42 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 356IMNLl044643; Tue, 6 Jun 2023 13:22:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1686075743; bh=Lal+xNbZ0/gdLtgAjGYSiTiFJlFFnIFf6O90MOdw9tI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mQ7hae7R+72WQwi8WvdAlCGQFWnfn64ks5nSjyBwc/KtUvGDEEJyhsDt6/zPxj+mm Cu0KkkymIci1fdrn4Fy/+0XunnoTIKzmcDK9pvVri597nqybkC5pexUL879Lc57+7l H8XGf4sgM0iOMOt9ul65+2ODiT79rjWhnuQlBvCY= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 356IMNTb089007 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 6 Jun 2023 13:22:23 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 6 Jun 2023 13:22:22 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 6 Jun 2023 13:22:22 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 356IMMKt016541; Tue, 6 Jun 2023 13:22:22 -0500 From: Nishanth Menon To: Conor Dooley , Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Udit Kumar , Nishanth Menon Subject: [PATCH V2 01/14] arm64: dts: ti: k3-j721e-sk: Fixup reference to phandles array Date: Tue, 6 Jun 2023 13:22:07 -0500 Message-ID: <20230606182220.3661956-2-nm@ti.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230606182220.3661956-1-nm@ti.com> References: <20230606182220.3661956-1-nm@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When referring to array of phandles, using <> to separate the array entries is better notation as it makes potential errors with phandle and cell arguments easier to catch. Fix the outliers to be consistent with the rest of the usage. Signed-off-by: Nishanth Menon --- No Changes since v1 V1: https://lore.kernel.org/r/20230601152636.858553-2-nm@ti.com arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/t= i/k3-j721e-sk.dts index f650a7fd66b4..1311211c391e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -781,7 +781,7 @@ &tscadc1 { =20 &mcu_cpsw { pinctrl-names =3D "default"; - pinctrl-0 =3D <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; + pinctrl-0 =3D <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; }; =20 &davinci_mdio { @@ -1008,55 +1008,55 @@ mbox_c71_0: mbox-c71-0 { }; =20 &mcu_r5fss0_core0 { - mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; + mboxes =3D <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, <&mcu_r5fss0_core0_memory_region>; }; =20 &mcu_r5fss0_core1 { - mboxes =3D <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; + mboxes =3D <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>; memory-region =3D <&mcu_r5fss0_core1_dma_memory_region>, <&mcu_r5fss0_core1_memory_region>; }; =20 &main_r5fss0_core0 { - mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; + mboxes =3D <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>; memory-region =3D <&main_r5fss0_core0_dma_memory_region>, <&main_r5fss0_core0_memory_region>; }; =20 &main_r5fss0_core1 { - mboxes =3D <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; + mboxes =3D <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>; memory-region =3D <&main_r5fss0_core1_dma_memory_region>, <&main_r5fss0_core1_memory_region>; }; =20 &main_r5fss1_core0 { - mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; + mboxes =3D <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>; memory-region =3D <&main_r5fss1_core0_dma_memory_region>, <&main_r5fss1_core0_memory_region>; }; =20 &main_r5fss1_core1 { - mboxes =3D <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; + mboxes =3D <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>; memory-region =3D <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; =20 &c66_0 { - mboxes =3D <&mailbox0_cluster3 &mbox_c66_0>; + mboxes =3D <&mailbox0_cluster3>, <&mbox_c66_0>; memory-region =3D <&c66_0_dma_memory_region>, <&c66_0_memory_region>; }; =20 &c66_1 { - mboxes =3D <&mailbox0_cluster3 &mbox_c66_1>; + mboxes =3D <&mailbox0_cluster3>, <&mbox_c66_1>; memory-region =3D <&c66_1_dma_memory_region>, <&c66_1_memory_region>; }; =20 &c71_0 { - mboxes =3D <&mailbox0_cluster4 &mbox_c71_0>; + mboxes =3D <&mailbox0_cluster4>, <&mbox_c71_0>; memory-region =3D <&c71_0_dma_memory_region>, <&c71_0_memory_region>; }; --=20 2.40.0