From nobody Tue Feb 10 05:09:56 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49482C7EE24 for ; Sat, 3 Jun 2023 11:00:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235673AbjFCLAT (ORCPT ); Sat, 3 Jun 2023 07:00:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229673AbjFCLAK (ORCPT ); Sat, 3 Jun 2023 07:00:10 -0400 Received: from 189.cn (ptr.189.cn [183.61.185.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 79FE51A6 for ; Sat, 3 Jun 2023 04:00:07 -0700 (PDT) HMM_SOURCE_IP: 10.64.8.43:51732.1826327623 HMM_ATTACHE_NUM: 0000 HMM_SOURCE_TYPE: SMTP Received: from clientip-114.242.206.180 (unknown [10.64.8.43]) by 189.cn (HERMES) with SMTP id AD0FE100283; Sat, 3 Jun 2023 19:00:05 +0800 (CST) Received: from ([114.242.206.180]) by gateway-151646-dep-75648544bd-7vx9t with ESMTP id b2638a35a34043ce89fa0b0d5456d01f for l.stach@pengutronix.de; Sat, 03 Jun 2023 19:00:06 CST X-Transaction-ID: b2638a35a34043ce89fa0b0d5456d01f X-Real-From: 15330273260@189.cn X-Receive-IP: 114.242.206.180 X-MEDUSA-Status: 0 Sender: 15330273260@189.cn From: Sui Jingfeng <15330273260@189.cn> To: Lucas Stach , Christian Gmeiner , Daniel Vetter , Bjorn Helgaas Cc: linux-kernel@vger.kernel.org, etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Sui Jingfeng Subject: [PATCH v7 2/7] drm/etnaviv: add a dedicated function to get various clocks Date: Sat, 3 Jun 2023 18:59:38 +0800 Message-Id: <20230603105943.3042766-3-15330273260@189.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230603105943.3042766-1-15330273260@189.cn> References: <20230603105943.3042766-1-15330273260@189.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Sui Jingfeng Because it is also platform-dependent, there are environments where don't have CLK subsystem support, for example, discreted PCI GPUs. So don't rage quit if there is no CLK subsystem. For the GPU in LS7A1000 and LS2K1000, the working frequency of the GPU is tuned by configuring the PLL register directly. Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 53 ++++++++++++++++----------- 1 file changed, 32 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnavi= v/etnaviv_gpu.c index 636d3f39ddcb..6c7aa9322468 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -1565,6 +1565,35 @@ static irqreturn_t irq_handler(int irq, void *data) return ret; } =20 +static int etnaviv_gpu_clk_get(struct etnaviv_gpu *gpu) +{ + struct device *dev =3D gpu->dev; + + gpu->clk_reg =3D devm_clk_get_optional(dev, "reg"); + DBG("clk_reg: %p", gpu->clk_reg); + if (IS_ERR(gpu->clk_reg)) + return PTR_ERR(gpu->clk_reg); + + gpu->clk_bus =3D devm_clk_get_optional(dev, "bus"); + DBG("clk_bus: %p", gpu->clk_bus); + if (IS_ERR(gpu->clk_bus)) + return PTR_ERR(gpu->clk_bus); + + gpu->clk_core =3D devm_clk_get(dev, "core"); + DBG("clk_core: %p", gpu->clk_core); + if (IS_ERR(gpu->clk_core)) + return PTR_ERR(gpu->clk_core); + gpu->base_rate_core =3D clk_get_rate(gpu->clk_core); + + gpu->clk_shader =3D devm_clk_get_optional(dev, "shader"); + DBG("clk_shader: %p", gpu->clk_shader); + if (IS_ERR(gpu->clk_shader)) + return PTR_ERR(gpu->clk_shader); + gpu->base_rate_shader =3D clk_get_rate(gpu->clk_shader); + + return 0; +} + static int etnaviv_gpu_clk_enable(struct etnaviv_gpu *gpu) { int ret; @@ -1865,27 +1894,9 @@ static int etnaviv_gpu_platform_probe(struct platfor= m_device *pdev) return err; =20 /* Get Clocks: */ - gpu->clk_reg =3D devm_clk_get_optional(&pdev->dev, "reg"); - DBG("clk_reg: %p", gpu->clk_reg); - if (IS_ERR(gpu->clk_reg)) - return PTR_ERR(gpu->clk_reg); - - gpu->clk_bus =3D devm_clk_get_optional(&pdev->dev, "bus"); - DBG("clk_bus: %p", gpu->clk_bus); - if (IS_ERR(gpu->clk_bus)) - return PTR_ERR(gpu->clk_bus); - - gpu->clk_core =3D devm_clk_get(&pdev->dev, "core"); - DBG("clk_core: %p", gpu->clk_core); - if (IS_ERR(gpu->clk_core)) - return PTR_ERR(gpu->clk_core); - gpu->base_rate_core =3D clk_get_rate(gpu->clk_core); - - gpu->clk_shader =3D devm_clk_get_optional(&pdev->dev, "shader"); - DBG("clk_shader: %p", gpu->clk_shader); - if (IS_ERR(gpu->clk_shader)) - return PTR_ERR(gpu->clk_shader); - gpu->base_rate_shader =3D clk_get_rate(gpu->clk_shader); + err =3D etnaviv_gpu_clk_get(gpu); + if (err) + return err; =20 /* TODO: figure out max mapped size */ dev_set_drvdata(dev, gpu); --=20 2.25.1