From nobody Fri Sep 20 20:28:23 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CE80C7EE29 for ; Fri, 2 Jun 2023 11:50:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235590AbjFBLuQ (ORCPT ); Fri, 2 Jun 2023 07:50:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235384AbjFBLt5 (ORCPT ); Fri, 2 Jun 2023 07:49:57 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 992E8E6E; Fri, 2 Jun 2023 04:49:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1685706571; x=1717242571; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dBosWhrvI2xKSJwVt6rV8Xi3asJ1Qc/KI8E1WYfbsR4=; b=jGcB3oSyvAQmAwkbr4botjuRC6Ib2ZCthKaLRwY91YeuEEFtMxehjFnF bAfvpS+V1fdvkj5BRgx3wp8Wm1oNJ4OfyZVq/iPT/w0A3hyzHy5MuSThY j190nw4HdPTdCrYRU+FSq2TQtHuGk2Gf1BF23is74jaoNc++lg7viouQy 1zxF+7XMfyPdflm4PI3WYH8zwW7u/gCmTg2kd2Ml78xwEHHDeehV9EI+8 G0sZ1DnXLj0kg00IZVjNZgon4qyoCVvoxn665UkDOK9BfYaCR4A9ajp2J KEaYrHb0dwBmc826VXrWAMpbvlt5wu145JfpIgasYW5nwKr4RLRrGI8Sp Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10728"; a="358279741" X-IronPort-AV: E=Sophos;i="6.00,212,1681196400"; d="scan'208";a="358279741" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2023 04:48:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10728"; a="707819519" X-IronPort-AV: E=Sophos;i="6.00,212,1681196400"; d="scan'208";a="707819519" Received: from rspatil-mobl3.gar.corp.intel.com (HELO ijarvine-MOBL2.ger.corp.intel.com) ([10.251.208.112]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2023 04:48:51 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Lukas Wunner , "Rafael J . Wysocki" , Heiner Kallweit , Emmanuel Grumbach , Kalle Valo , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , ath10k@lists.infradead.org, linux-wireless@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [RFC PATCH v1 09/13] wifi: ath10k: Use pci_disable/enable_link_state() Date: Fri, 2 Jun 2023 14:47:46 +0300 Message-Id: <20230602114751.19671-10-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230602114751.19671-1-ilpo.jarvinen@linux.intel.com> References: <20230602114751.19671-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ath10k driver adjusts ASPM state itself which leaves ASPM service driver in PCI core unaware of the link state changes the driver implemented. Call pci_disable_link_state() and pci_enable_link_state() instead of adjusting ASPMC field in LNKCTL directly in the driver and let PCI core handle the ASPM state management. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/net/wireless/ath/ath10k/pci.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/a= th/ath10k/pci.c index 9275a672f90c..ec2b17e73b0e 100644 --- a/drivers/net/wireless/ath/ath10k/pci.c +++ b/drivers/net/wireless/ath/ath10k/pci.c @@ -1963,9 +1963,8 @@ static int ath10k_pci_hif_start(struct ath10k *ar) ath10k_pci_irq_enable(ar); ath10k_pci_rx_post(ar); =20 - pcie_capability_clear_and_set_word(ar_pci->pdev, PCI_EXP_LNKCTL, - PCI_EXP_LNKCTL_ASPMC, - ar_pci->link_ctl & PCI_EXP_LNKCTL_ASPMC); + pci_enable_link_state(ar_pci->pdev, ar_pci->link_ctl & + (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)); =20 return 0; } @@ -2822,8 +2821,7 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar, =20 pcie_capability_read_word(ar_pci->pdev, PCI_EXP_LNKCTL, &ar_pci->link_ctl); - pcie_capability_clear_word(ar_pci->pdev, PCI_EXP_LNKCTL, - PCI_EXP_LNKCTL_ASPMC); + pci_disable_link_state(ar_pci->pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STAT= E_L1); =20 /* * Bring the target up cleanly. --=20 2.30.2