From nobody Mon Feb 9 02:13:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B63DDC77B7A for ; Thu, 1 Jun 2023 17:04:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232370AbjFARD7 (ORCPT ); Thu, 1 Jun 2023 13:03:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46098 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231388AbjFARDu (ORCPT ); Thu, 1 Jun 2023 13:03:50 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E6CC192 for ; Thu, 1 Jun 2023 10:03:48 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2b1a7e31dcaso5280421fa.2 for ; Thu, 01 Jun 2023 10:03:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1685639026; x=1688231026; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AYXAD9NgGprUIQkhXdsDo3LP+5BIf2ORjzEhEoh2Q0k=; b=YEyE4MplOuffKToNXoByaO0YIRahiBQrlXYzMq3NE7mD9SvEWvtIpQ4QjKuUjOkj1T U4ul77rYN2OwXiwDemsBFLPmcJRebNTIAm5Kwkux5fhC6HvvbvE+lDFgsh0rMaXTPln/ Y4fjlsmXpHr9EpCjwT0j/eKuVIyvv6ArA2k8U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685639026; x=1688231026; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AYXAD9NgGprUIQkhXdsDo3LP+5BIf2ORjzEhEoh2Q0k=; b=YM5XG6QJ7vzYluvjExTjpzmCjof1eC31fjp7lyv0eglO856tbgmlskEAdT5PCGtNIc LDYY7RtX2+OeBF/okFuk2XkJiq5jduy5ZgCzd+y/nmSeO6tTagYgtMrjj4Dd5/nNQUKB a+BF5SlkAm0YCaokbIdiYNfCTmgmO7ROVDHq8VgXjSrTvAmOMXJKis4IvPW8lTb3Vr+P sVkHirSWzmcJnxjFY7ffCRxYPSax6PGm7aAcSYnT2Gozf9qPkif1AEs0s3K+xBhzSKSC cOv9adnGr/xfN507wgRhJY09BW7HLpAH/oAs3JRoVyXCIuNkCRmWtJVXu3muekpLR/Ip MjBQ== X-Gm-Message-State: AC+VfDzj6j6DLYuR2JDaYQt/7GjIQn24iizSCET+SNgYfUIR8ClrxV17 Ruqe00+0NoIeBIaS25vcf485ohio7/rWvIp3f3wT/Q== X-Google-Smtp-Source: ACHHUZ7y/MadAmcG8+tiTZ3xPXcxTCxSt8Z6tfaDt1Gboo+wMV/9REfMseHNxiYgmiOmCfOJtQKSNA== X-Received: by 2002:a2e:8eca:0:b0:2b0:5a04:a5b6 with SMTP id e10-20020a2e8eca000000b002b05a04a5b6mr69305ljl.8.1685639026117; Thu, 01 Jun 2023 10:03:46 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-95-248-31-20.retail.telecomitalia.it. [95.248.31.20]) by smtp.gmail.com with ESMTPSA id bh25-20020a170906a0d900b0096165b2703asm10658522ejb.110.2023.06.01.10.03.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 10:03:45 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 1/6] ARM: dts: stm32: add ltdc support on stm32f746 MCU Date: Thu, 1 Jun 2023 19:03:15 +0200 Message-Id: <20230601170320.2845218-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230601170320.2845218-1-dario.binacchi@amarulasolutions.com> References: <20230601170320.2845218-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add LTDC (Lcd-tft Display Controller) support. Signed-off-by: Dario Binacchi --- arch/arm/boot/dts/stm32f746.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746= .dtsi index dc868e6da40e..9c4ba0b7f239 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -507,6 +507,16 @@ pwm { }; }; =20 + ltdc: display-controller@40016800 { + compatible =3D "st,stm32-ltdc"; + reg =3D <0x40016800 0x200>; + interrupts =3D <88>, <89>; + resets =3D <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks =3D <&rcc 1 CLK_LCD>; + clock-names =3D "lcd"; + status =3D "disabled"; + }; + pwrcfg: power-config@40007000 { compatible =3D "st,stm32-power-config", "syscon"; reg =3D <0x40007000 0x400>; --=20 2.32.0