From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC7BEC7EE23 for ; Thu, 1 Jun 2023 14:57:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234576AbjFAO5p (ORCPT ); Thu, 1 Jun 2023 10:57:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232246AbjFAO5m (ORCPT ); Thu, 1 Jun 2023 10:57:42 -0400 Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 347F7189 for ; Thu, 1 Jun 2023 07:57:41 -0700 (PDT) Received: by mail-pg1-x52a.google.com with SMTP id 41be03b00d2f7-51452556acdso477034a12.2 for ; Thu, 01 Jun 2023 07:57:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685631460; x=1688223460; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9cLaDMhf+OF404gT5xrdkaYTu7FOMzJ/h0JxLAu5gx8=; b=paO6O0P+7/GfE1jJwzk8aDHHIZhS0NQqlUIPLrnBS9nVujMxur0Vjhw7kwl5GAEBfa wbmDOfyzTEVruK31Bcz2J8jYh6dfRmtmZfxmOwJaFgESA+A77WE10nzgFvbQ9+AEiTGj S5WOEqbQYHGqTiqyfo3T8oGJpn4v8ERMlGJ3QV9giF5Bk+BgOvJzYRN+D75B0SImTru+ T6Tbd2qfMzhazFEMA+8auc58ofCyv0ZbtSBhqmUPirJwil/2/nzg6hbW6tm7kgmx9lqk WAXboEMY3mI6Twu088as7Nn7d8Rg5xPX25Fwm85S/87RN8+WH6+sTKecpZdl5rU88V8Y 2x2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685631460; x=1688223460; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9cLaDMhf+OF404gT5xrdkaYTu7FOMzJ/h0JxLAu5gx8=; b=f3bRQYg4Q80T5NHQXshV7vO3H3jvjprFoR2xVzxDMz8BuaDJsMhIB4CDKBwGp9SEca skdOFHqbYonvmMjy/uh8Un+XpzMpDMEHndX7b/+y9ip7xT4cN5ghcrJzT5AkJImbgahL Yv8hh+yX0pAyIYmgH2PdfYhBjVjnAIFYBAuwxK+iGSvRFBRjr93SgTk8Hx22RG5+zPGg rgN8rinIcblcofIdSlely52dTxC7mhRn4DyixpwtgHfwbbdn9LtAT+o5AWz/zdEY11Is 3TLO/lp/rz+X17PqgmIkffx3YVQP47LSm3TbfzlaSHCToClBz0+s3iAPlmblFb0xoAI6 VL0g== X-Gm-Message-State: AC+VfDwqi5gm+FVJJXK9hlgyBCtUeQiFfIeq62eOyqE/hmK1Zh9UNbNd 6PAU/Cjz2KePt7G67EQAZb08 X-Google-Smtp-Source: ACHHUZ7iAy6vlvTlsELq6Yie1SToVmkx0Ug6XG0sLdvlvQjr6GpKkm2oHR/HMtnZTOgx0iPuW9AcfA== X-Received: by 2002:a17:902:e5c9:b0:1ac:3780:3a76 with SMTP id u9-20020a170902e5c900b001ac37803a76mr7450817plf.4.1685631460672; Thu, 01 Jun 2023 07:57:40 -0700 (PDT) Received: from localhost.localdomain ([117.217.186.123]) by smtp.gmail.com with ESMTPSA id o17-20020a170902d4d100b001b0603829a0sm3577826plg.199.2023.06.01.07.57.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 07:57:40 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , Loic Poulain Subject: [PATCH v5 1/9] MAINTAINERS: Add entry for MHI networking drivers under MHI bus Date: Thu, 1 Jun 2023 20:27:10 +0530 Message-Id: <20230601145718.12204-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> References: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The host MHI net driver was not listed earlier. So let's add both host and endpoint MHI net drivers under MHI bus. Cc: Loic Poulain Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 7e0b87d5aa2e..07625a47cf08 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13629,6 +13629,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/gi= t/mani/mhi.git F: Documentation/ABI/stable/sysfs-bus-mhi F: Documentation/mhi/ F: drivers/bus/mhi/ +F: drivers/net/mhi_* F: include/linux/mhi.h =20 MICROBLAZE ARCHITECTURE --=20 2.25.1 From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB40EC77B7E for ; Thu, 1 Jun 2023 14:57:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234598AbjFAO5t (ORCPT ); Thu, 1 Jun 2023 10:57:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232246AbjFAO5q (ORCPT ); Thu, 1 Jun 2023 10:57:46 -0400 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 557CA193 for ; Thu, 1 Jun 2023 07:57:44 -0700 (PDT) Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-52cbd7d0c37so486224a12.3 for ; Thu, 01 Jun 2023 07:57:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685631464; x=1688223464; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sAFeVd+dwK+9T/TQ3aqc3usXxG9M6VjGUKGIkkMeOq4=; b=SR29uoxZkJU2rRXz2K/+GXbSV7ktM5kimwDl55SJ+3lg1DFHEBenaRcK8ISGBNXrYS kSkTZ9lX1kuPIdt2eaNQF4HtRPQoGv6WXmTwZnik0J/iKSRZ+EDR8y7UjmxB2oa92cn1 IwBleum9w9HxPvzLziqNtZvOUZOy/NhJC4rxIr5MgV5L7nBmid96DgwfEUXQNpMH8w4f Rk5WIS9vuTD51g/Ub8N/VHzxbyc5U20MfMWoG5+TGTonRBKGB4oNaW6pHG7YIH8k4TIZ WeDDcSqPFrSy95Jlo0t7JOGfOxPKQarJXHXVhzG4H3AuBMngiTUnVDp1ZifygAFw5VbJ 1QoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685631464; x=1688223464; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sAFeVd+dwK+9T/TQ3aqc3usXxG9M6VjGUKGIkkMeOq4=; b=EX8VxXm+ugXsLL1ehr8vrDgf8khbwOjBstjcmeHhuPcFgkunNOnck1Y1Hgslzc15qD k2w/yZTYPcytKp83CXRJhYb6F4Osnqy8Yrph4K55irwSnJIAFiMKkdwDii7zpQZqmHKa Gd419WSH20RxWNOiJGs1qaIX5iOBeoWAfHwlxQZdOW1lGRXnfcGbqHyYKrXwnPIrR0yL cdblGdHEMZGqMUzmjU+Tt61Wm9KVJ47iNAjTarSV0aWyvLa60UyzhNliSvHIM1MLVId7 E2bSNRfD55dATTblKdloKwrUDCVI/BFj9MvaRHrDO9H9SFUwvsz55eE3GG+0nSElNBs2 GWsQ== X-Gm-Message-State: AC+VfDzDdDqqxaXbjQ6H9uMzx0vJGloRVmvbfHOS0tm0kV92f2I8Fly5 PyqQHHSbfdl8ax6IGiSSVOFS X-Google-Smtp-Source: ACHHUZ7GbtGEG5eWiwQl6RB58x2QO8agoFIL4a3NAm4gDi3kntaIcmbZPiekDSmdV8ernFHhTgO8sw== X-Received: by 2002:a17:902:b901:b0:1ac:6d4c:c265 with SMTP id bf1-20020a170902b90100b001ac6d4cc265mr5912141plb.28.1685631463700; Thu, 01 Jun 2023 07:57:43 -0700 (PDT) Received: from localhost.localdomain ([117.217.186.123]) by smtp.gmail.com with ESMTPSA id o17-20020a170902d4d100b001b0603829a0sm3577826plg.199.2023.06.01.07.57.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 07:57:43 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v5 2/9] PCI: endpoint: Add missing documentation about the MSI/MSI-X range Date: Thu, 1 Jun 2023 20:27:11 +0530 Message-Id: <20230601145718.12204-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> References: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Both pci_epc_raise_irq() and pci_epc_map_msi_irq() APIs expects the MSI/MSI-X vectors to start from 1 but it is not documented. Add the range info to the kdoc of the APIs to make it clear. Fixes: 5e8cb4033807 ("PCI: endpoint: Add EP core layer to enable EP control= ler and EP functions") Fixes: 87d5972e476f ("PCI: endpoint: Add pci_epc_ops to map MSI IRQ") Signed-off-by: Manivannan Sadhasivam Reviewed-by: Damien Le Moal --- drivers/pci/endpoint/pci-epc-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index 46c9a5c3ca14..0cf602c83d4a 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -213,7 +213,7 @@ EXPORT_SYMBOL_GPL(pci_epc_start); * @func_no: the physical endpoint function number in the EPC device * @vfunc_no: the virtual endpoint function number in the physical function * @type: specify the type of interrupt; legacy, MSI or MSI-X - * @interrupt_num: the MSI or MSI-X interrupt number + * @interrupt_num: the MSI or MSI-X interrupt number with range (1-N) * * Invoke to raise an legacy, MSI or MSI-X interrupt */ @@ -246,7 +246,7 @@ EXPORT_SYMBOL_GPL(pci_epc_raise_irq); * @func_no: the physical endpoint function number in the EPC device * @vfunc_no: the virtual endpoint function number in the physical function * @phys_addr: the physical address of the outbound region - * @interrupt_num: the MSI interrupt number + * @interrupt_num: the MSI interrupt number with range (1-N) * @entry_size: Size of Outbound address region for each interrupt * @msi_data: the data that should be written in order to raise MSI interr= upt * with interrupt number as 'interrupt num' --=20 2.25.1 From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 870E4C7EE23 for ; Thu, 1 Jun 2023 14:57:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232357AbjFAO54 (ORCPT ); Thu, 1 Jun 2023 10:57:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234597AbjFAO5t (ORCPT ); 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Thu, 01 Jun 2023 07:57:46 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v5 3/9] PCI: endpoint: Pass EPF device ID to the probe function Date: Thu, 1 Jun 2023 20:27:12 +0530 Message-Id: <20230601145718.12204-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> References: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Currently, the EPF probe function doesn't get the device ID argument needed to correctly identify the device table ID of the EPF device. When multiple entries are added to the "struct pci_epf_device_id" table, the probe function needs to identify the correct one. This is achieved by modifying the pci_epf_match_id() function to return the match ID pointer and passing it to the driver's probe function. pci_epf_device_match() function can return bool based on the return value of pci_epf_match_id(). Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-ntb.c | 3 ++- drivers/pci/endpoint/functions/pci-epf-test.c | 2 +- drivers/pci/endpoint/functions/pci-epf-vntb.c | 2 +- drivers/pci/endpoint/pci-epf-core.c | 20 ++++++++++++------- include/linux/pci-epf.h | 4 +++- 5 files changed, 20 insertions(+), 11 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-ntb.c b/drivers/pci/end= point/functions/pci-epf-ntb.c index 9a00448c7e61..980b4ecf19a2 100644 --- a/drivers/pci/endpoint/functions/pci-epf-ntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-ntb.c @@ -2075,11 +2075,12 @@ static struct config_group *epf_ntb_add_cfs(struct = pci_epf *epf, /** * epf_ntb_probe() - Probe NTB function driver * @epf: NTB endpoint function device + * @id: NTB endpoint function device ID * * Probe NTB function driver when endpoint function bus detects a NTB * endpoint function. */ -static int epf_ntb_probe(struct pci_epf *epf) +static int epf_ntb_probe(struct pci_epf *epf, const struct pci_epf_device_= id *id) { struct epf_ntb *ntb; struct device *dev; diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/en= dpoint/functions/pci-epf-test.c index 0f9d2ec822ac..d5fcc78a5b73 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -980,7 +980,7 @@ static const struct pci_epf_device_id pci_epf_test_ids[= ] =3D { {}, }; =20 -static int pci_epf_test_probe(struct pci_epf *epf) +static int pci_epf_test_probe(struct pci_epf *epf, const struct pci_epf_de= vice_id *id) { struct pci_epf_test *epf_test; struct device *dev =3D &epf->dev; diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/en= dpoint/functions/pci-epf-vntb.c index b7c7a8af99f4..122eb7a12028 100644 --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c @@ -1401,7 +1401,7 @@ static struct pci_epf_ops epf_ntb_ops =3D { * * Returns: Zero for success, or an error code in case of failure */ -static int epf_ntb_probe(struct pci_epf *epf) +static int epf_ntb_probe(struct pci_epf *epf, const struct pci_epf_device_= id *id) { struct epf_ntb *ntb; struct device *dev; diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci= -epf-core.c index 2036e38be093..7307e052136f 100644 --- a/drivers/pci/endpoint/pci-epf-core.c +++ b/drivers/pci/endpoint/pci-epf-core.c @@ -493,16 +493,16 @@ static const struct device_type pci_epf_type =3D { .release =3D pci_epf_dev_release, }; =20 -static int -pci_epf_match_id(const struct pci_epf_device_id *id, const struct pci_epf = *epf) +static const struct pci_epf_device_id +*pci_epf_match_id(const struct pci_epf_device_id *id, const struct pci_epf= *epf) { while (id->name[0]) { if (strcmp(epf->name, id->name) =3D=3D 0) - return true; + return id; id++; } =20 - return false; + return NULL; } =20 static int pci_epf_device_match(struct device *dev, struct device_driver *= drv) @@ -510,8 +510,12 @@ static int pci_epf_device_match(struct device *dev, st= ruct device_driver *drv) struct pci_epf *epf =3D to_pci_epf(dev); struct pci_epf_driver *driver =3D to_pci_epf_driver(drv); =20 - if (driver->id_table) - return pci_epf_match_id(driver->id_table, epf); + if (driver->id_table) { + if (pci_epf_match_id(driver->id_table, epf)) + return true; + else + return false; + } =20 return !strcmp(epf->name, drv->name); } @@ -520,13 +524,15 @@ static int pci_epf_device_probe(struct device *dev) { struct pci_epf *epf =3D to_pci_epf(dev); struct pci_epf_driver *driver =3D to_pci_epf_driver(dev->driver); + const struct pci_epf_device_id *id; =20 if (!driver->probe) return -ENODEV; =20 epf->driver =3D driver; + id =3D pci_epf_match_id(driver->id_table, epf); =20 - return driver->probe(epf); + return driver->probe(epf, id); } =20 static void pci_epf_device_remove(struct device *dev) diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index a215dc8ce693..bc613f0df7e3 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -89,7 +89,7 @@ struct pci_epc_event_ops { * @id_table: identifies EPF devices for probing */ struct pci_epf_driver { - int (*probe)(struct pci_epf *epf); + int (*probe)(struct pci_epf *epf, const struct pci_epf_device_id *id); void (*remove)(struct pci_epf *epf); =20 struct device_driver driver; @@ -131,6 +131,7 @@ struct pci_epf_bar { * @epc: the EPC device to which this EPF device is bound * @epf_pf: the physical EPF device to which this virtual EPF device is bo= und * @driver: the EPF driver to which this EPF device is bound + * @id: Pointer to the EPF device ID * @list: to add pci_epf as a list of PCI endpoint functions to pci_epc * @lock: mutex to protect pci_epf_ops * @sec_epc: the secondary EPC device to which this EPF device is bound @@ -158,6 +159,7 @@ struct pci_epf { struct pci_epc *epc; struct pci_epf *epf_pf; struct pci_epf_driver *driver; + const struct pci_epf_device_id *id; struct list_head list; /* mutex to protect against concurrent access of pci_epf_ops */ struct mutex lock; --=20 2.25.1 From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15BE0C7EE23 for ; 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Thu, 01 Jun 2023 07:57:49 -0700 (PDT) Received: from localhost.localdomain ([117.217.186.123]) by smtp.gmail.com with ESMTPSA id o17-20020a170902d4d100b001b0603829a0sm3577826plg.199.2023.06.01.07.57.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 07:57:49 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v5 4/9] PCI: endpoint: Warn and return if EPC is started/stopped multiple times Date: Thu, 1 Jun 2023 20:27:13 +0530 Message-Id: <20230601145718.12204-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> References: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When the EPC is started or stopped multiple times from configfs, just emit a once time warning and return. There is no need to call the EPC start/stop functions in those cases. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/pci-ep-cfs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/endpoint/pci-ep-cfs.c b/drivers/pci/endpoint/pci-e= p-cfs.c index 4b8ac0ac84d5..62c8e09c59f4 100644 --- a/drivers/pci/endpoint/pci-ep-cfs.c +++ b/drivers/pci/endpoint/pci-ep-cfs.c @@ -178,6 +178,9 @@ static ssize_t pci_epc_start_store(struct config_item *= item, const char *page, if (kstrtobool(page, &start) < 0) return -EINVAL; =20 + if (WARN_ON_ONCE(start =3D=3D epc_group->start)) + return 0; + if (!start) { pci_epc_stop(epc); epc_group->start =3D 0; --=20 2.25.1 From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23593C7EE23 for ; Thu, 1 Jun 2023 14:58:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232518AbjFAO6P (ORCPT ); Thu, 1 Jun 2023 10:58:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234611AbjFAO6F (ORCPT ); Thu, 1 Jun 2023 10:58:05 -0400 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 224E5E46 for ; Thu, 1 Jun 2023 07:57:54 -0700 (PDT) Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-1b02fcde49aso4822455ad.0 for ; Thu, 01 Jun 2023 07:57:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685631473; x=1688223473; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VhNik2H+uO+Q16HqIS1xj7FIQ3fy5k7mBkKyNDoBImY=; b=dgsHYUUfC1+pccoNZp6xxO+N3y6D2Bf7E/JuL9C9g4AtbhQDLX3jVytV5jbO7Ldhd5 deA0waQzk2L1V/e1Hzmo8NRo5mvvzc/2XdLX0CS962t0EhmGS9Wc5C0cs2qQCg6655PV x/vO2ka2fyRMqPmy3hWbrK+k8+gT6uOyZAH5uDJaxq2hhJyeYp2UySnbe2/qi03jZGlI +Nd4RwFJXf3kqMTbvUPdxcmXB/mTqsQV/CuiLDcYg7ktqXtNVHcJVd7s+8O4rWDnDwR6 OQ8bRL1j+5xyYwqikzwfQhBwDY+GF8M6WJg7ttUVMt9OU23nbBl9Uh6w8kmyiRiBcrls YB1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685631473; x=1688223473; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VhNik2H+uO+Q16HqIS1xj7FIQ3fy5k7mBkKyNDoBImY=; b=ba+KW1J/mK2EmckSUYK9cPt29ao2Upx/WhX+yzsXWrICDtSRtihmGPT+TxEo1cZvlk KtKWBUiHQZ3KKjgk2swrvFCywNclwBapHplK9ZxG4uEWn23yH6zOjqyzZCAosAOXCvRX 3z/pNA/X1EqhAapOLmHZvoarG0fe2NSeXFnuGQgm/Wp8O/RxA9qwX2C0G5UIOhr357zP 7aXRJOxBJKLlIiYx9HVd/RPRopXf3WeKyX/ZvkEjXNlDdeR6ucoa+pYvSeVrSwNO0DVs Q9E3OQk1cWTX30JS3rqW2jtk7BPY2OEI6G3HtjkplikBKZeQ8N9Q4s9jmpqK/Qn4aL9A eHDQ== X-Gm-Message-State: AC+VfDzOaWMDj+G4VCepTYjI9eLoP9BIi62R2rH/LUm71VmqMGL2qC1p CgjlX8QmUwJUB2dbZ/F1zQ63 X-Google-Smtp-Source: ACHHUZ7UV+dcrB4tEVVxWfAIJ+mU72SNsaiLlYMV3bnaZr7BkfZwGGyqaYN+rRRkaUB2aD9wDLMp2A== X-Received: by 2002:a17:902:c410:b0:1af:e999:a070 with SMTP id k16-20020a170902c41000b001afe999a070mr9189094plk.14.1685631473230; Thu, 01 Jun 2023 07:57:53 -0700 (PDT) Received: from localhost.localdomain ([117.217.186.123]) by smtp.gmail.com with ESMTPSA id o17-20020a170902d4d100b001b0603829a0sm3577826plg.199.2023.06.01.07.57.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 07:57:52 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v5 5/9] PCI: endpoint: Add linkdown notifier support Date: Thu, 1 Jun 2023 20:27:14 +0530 Message-Id: <20230601145718.12204-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> References: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support to notify the EPF device about the linkdown event from the EPC device. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam Reviewed-by: Damien Le Moal --- drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index 0cf602c83d4a..e0570b52698d 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -706,6 +706,32 @@ void pci_epc_linkup(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_linkup); =20 +/** + * pci_epc_linkdown() - Notify the EPF device that EPC device has dropped = the + * connection with the Root Complex. + * @epc: the EPC device which has dropped the link with the host + * + * Invoke to Notify the EPF device that the EPC device has dropped the + * connection with the Root Complex. + */ +void pci_epc_linkdown(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->link_down) + epf->event_ops->link_down(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_linkdown); + /** * pci_epc_init_notify() - Notify the EPF device that EPC device's core * initialization is completed. diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 301bb0e53707..63a6cc5e5282 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -203,6 +203,7 @@ void pci_epc_destroy(struct pci_epc *epc); int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); void pci_epc_linkup(struct pci_epc *epc); +void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index bc613f0df7e3..f8e5a63d0c83 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -71,10 +71,12 @@ struct pci_epf_ops { * struct pci_epf_event_ops - Callbacks for capturing the EPC events * @core_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event + * @link_down: Callback for the EPC link down event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); + int (*link_down)(struct pci_epf *epf); }; =20 /** --=20 2.25.1 From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65DC2C77B7E for ; Thu, 1 Jun 2023 14:58:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234648AbjFAO60 (ORCPT ); Thu, 1 Jun 2023 10:58:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234638AbjFAO6H (ORCPT ); Thu, 1 Jun 2023 10:58:07 -0400 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9102E68 for ; Thu, 1 Jun 2023 07:57:56 -0700 (PDT) Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-1b021cddb74so4235065ad.0 for ; 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charset="utf-8" Add support to notify the EPF device about the Bus Master Enable (BME) event received by the EPC device from the Root complex. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam Reviewed-by: Damien Le Moal --- drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci= -epc-core.c index e0570b52698d..6c54fa5684d2 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -758,6 +758,32 @@ void pci_epc_init_notify(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_init_notify); =20 +/** + * pci_epc_bme_notify() - Notify the EPF device that the EPC device has re= ceived + * the BME event from the Root complex + * @epc: the EPC device that received the BME event + * + * Invoke to Notify the EPF device that the EPC device has received the Bus + * Master Enable (BME) event from the Root complex + */ +void pci_epc_bme_notify(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->bme) + epf->event_ops->bme(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_bme_notify); + /** * pci_epc_destroy() - destroy the EPC device * @epc: the EPC device that has to be destroyed diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 63a6cc5e5282..5cb694031072 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -205,6 +205,7 @@ int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf= *epf, void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); +void pci_epc_bme_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index f8e5a63d0c83..f34b3b32a0e7 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -72,11 +72,13 @@ struct pci_epf_ops { * @core_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event + * @bme: Callback for the EPC BME (Bus Master Enable) event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); + int (*bme)(struct pci_epf *epf); }; =20 /** --=20 2.25.1 From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 537F6C7EE2A for ; Thu, 1 Jun 2023 14:58:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234657AbjFAO6a (ORCPT ); Thu, 1 Jun 2023 10:58:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233108AbjFAO6T (ORCPT ); Thu, 1 Jun 2023 10:58:19 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8234210C3 for ; Thu, 1 Jun 2023 07:57:59 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1b034ca1195so4141735ad.2 for ; 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charset="utf-8" Add support to pass Link down notification to Endpoint function driver so that the LINK_DOWN event can be processed by the function. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam Reviewed-by: Damien Le Moal --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 19b32839ea26..4ce01ff7527c 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -569,6 +569,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int i= rq, void *data) if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { dev_dbg(dev, "Received Linkdown event\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_DOWN; + pci_epc_linkdown(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_ENABLED; --=20 2.25.1 From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A918C7EE2E for ; Thu, 1 Jun 2023 14:58:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232300AbjFAO6k (ORCPT ); Thu, 1 Jun 2023 10:58:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233819AbjFAO60 (ORCPT ); Thu, 1 Jun 2023 10:58:26 -0400 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C38D710DB for ; Thu, 1 Jun 2023 07:58:02 -0700 (PDT) Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-1b039168ba0so7918305ad.3 for ; Thu, 01 Jun 2023 07:58:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685631482; x=1688223482; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FI+i05lzXUFOa/Wt+qCq2zIVxieQpfBQT3yhV8ufVhA=; b=luiwntytbmX2sLwXUJD+GCD4AelS02z0wAnjXKyRcnz2TONRfJx9/jDRnrx9sxosMV l88HaGJQd7NoCbz830SuB5aHfIzoXGH+s8bWfkKnfPc1kMR6D7+1BLzSSNNYp3bQsbZJ E6FSd7ygdv9KV2pSDrz/+KtdPpt7KFtYWB8grWa6N2rrgN2sYH/dGdy+BSKYzNAUGmL6 hmKHbSxQeXgCLj96ntTZP0Vhb44Wvhz6euvvipO2Ey4JjY1kltyzN0J2MmPVtM6K/bcq kdgjDSE7ADUKl0iT2puGrfUK4e3gKlUC5T1OlgOkys0qFvN6I1lKvUqfSG22AYpSXvWo qA+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685631482; x=1688223482; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FI+i05lzXUFOa/Wt+qCq2zIVxieQpfBQT3yhV8ufVhA=; b=NSi3itqJV3As7heUctuk9lYQrged+5adCdoqRc3W/lMOcbmUSpJJogrbI4q325im5M mw1rf4mbLqOjF0ESMkP9jmvnBlk3lnv+e+vnEwNvBwK48m63mI1NGas1aRkBAhwxZ/ng LPou9UIHiWCFCgyJwkZWB/F/NborVpGdMSmtzqx/Q3TMVfEOgtEJFA9//DnpX/nGi46s vVbFXf1HDrW0/6ae2aohZUYIOjDpnpCVqxLjn9jQvCIia45CF8ZtYk+6CX0gDdz7IcNV 1LgYb3CiFIxPs+si+l5trUkDoOx45DimtADEP7la3ohx8V486KjcfINlYnupiuF8uBgl ga6w== X-Gm-Message-State: AC+VfDywl2ob7i023Lr0beXHpc/Ot6WZlouowWibJ/7QnTs0QWyn4rEQ yFnXjxMPfkTDFroMORlMgsXJ X-Google-Smtp-Source: ACHHUZ4U7+pUjijouXJ4Ywlqnv9Ltli2YHvNZUAVwzrQ/OXE7+AK/HJWqUJA+nyLcxX9FHy4LgI8KA== X-Received: by 2002:a17:902:ced1:b0:1b0:6038:2982 with SMTP id d17-20020a170902ced100b001b060382982mr10438042plg.41.1685631481923; Thu, 01 Jun 2023 07:58:01 -0700 (PDT) Received: from localhost.localdomain ([117.217.186.123]) by smtp.gmail.com with ESMTPSA id o17-20020a170902d4d100b001b0603829a0sm3577826plg.199.2023.06.01.07.57.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 07:58:01 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v5 8/9] PCI: qcom-ep: Add support for BME notification Date: Thu, 1 Jun 2023 20:27:17 +0530 Message-Id: <20230601145718.12204-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> References: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support to pass BME (Bus Master Enable) notification to Endpoint function driver so that the BME event can be processed by the function. Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam Reviewed-by: Damien Le Moal --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/contro= ller/dwc/pcie-qcom-ep.c index 4ce01ff7527c..1435f516d3f7 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -573,6 +573,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int i= rq, void *data) } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status =3D QCOM_PCIE_EP_LINK_ENABLED; + pci_epc_bme_notify(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_PM_TURNOFF, status)) { dev_dbg(dev, "Received PM Turn-off event! Entering L23\n"); val =3D readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); --=20 2.25.1 From nobody Mon Feb 9 14:34:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9505FC77B7E for ; Thu, 1 Jun 2023 14:58:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233251AbjFAO6t (ORCPT ); Thu, 1 Jun 2023 10:58:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234639AbjFAO6i (ORCPT ); Thu, 1 Jun 2023 10:58:38 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 100721AD for ; Thu, 1 Jun 2023 07:58:06 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-1b038064d97so17802265ad.0 for ; Thu, 01 Jun 2023 07:58:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685631485; x=1688223485; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PLxuYHbYfw91BBx8yV4hmx/yLafz6sc0c4fkL2N3kD8=; b=OeRdIeYJzJqBIalGbhdSi2JJDEqwytIejkp/O+bwO4xqH0/2G+1/LDpvitHpZsqFiS /n1HjAYTUUkJsbFmZxedAnDe2KxkOVqnox4bCLA+o6myW38As6LcSfi5Kpa5YIMuCQpv F928LWVNXKB8shr3MyyCCwVxbpqxoyLOB9bTCgTJChQ5kQEgannavdFecLWLVe54fEMC jgwYi1y5I/2VVU+7Fzdmw7gB1jVJZ2sjevHP3mMGPK9wh+mNmXe27SW0mjAcwQTN0toC ugsoB6LoxlQjJi1Jwax9DNhtw+mYOtUkSvE/Hfuv3bDrKQjMpt2JjBU5hyAv3T2jzU84 7/pg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685631485; x=1688223485; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PLxuYHbYfw91BBx8yV4hmx/yLafz6sc0c4fkL2N3kD8=; b=avttBbsktdI1jPWWiyocl2ZOXdZ8HqDRpFyvQXhW6wQWsUHPaO39+I2hcWe4KhVjgD LV2dft9lvJPjTaITw4KGLvxIntBAiQTCli0ztdlOAzfDsthdN62uN0MlHny8FVWkIoLo q6DYTW5DxNzGrJlVGgK4d4BcAy3Fyupb0AcuI9FouZaTfHz9RpZrgR3YWI0tu419Lxgf 8VEg+PMVD0CRcSrzJjW+GDcYE4k211XsX4mqb8HJEgNIRrJlG3QQiAEQQz+MuboyyjTO sJha0wiqcdhvqJ8odvrGzvF8UEM0Z3BSaajWD3ViliJguhS4N7HxzqKxjaG9x/KU/Rmg caWw== X-Gm-Message-State: AC+VfDwQdeB0ldd25LRTYtoSVY8thrt/0JK6d/jrT6Xg61kpI2E3VJZ/ eHoaTDm6lwDmjjiPbeaPeBt7 X-Google-Smtp-Source: ACHHUZ7a+t3K1UB4J6vXjbS7Ew9oq4UNglbIKkc8RQhElD0jONMZRSX9n3oaw99G+U3xUw4qklmHkA== X-Received: by 2002:a17:903:2447:b0:1af:ac49:e048 with SMTP id l7-20020a170903244700b001afac49e048mr2725123pls.25.1685631484824; Thu, 01 Jun 2023 07:58:04 -0700 (PDT) Received: from localhost.localdomain ([117.217.186.123]) by smtp.gmail.com with ESMTPSA id o17-20020a170902d4d100b001b0603829a0sm3577826plg.199.2023.06.01.07.58.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 07:58:04 -0700 (PDT) From: Manivannan Sadhasivam To: lpieralisi@kernel.org, kw@linux.com Cc: kishon@kernel.org, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v5 9/9] PCI: endpoint: Add PCI Endpoint function driver for MHI bus Date: Thu, 1 Jun 2023 20:27:18 +0530 Message-Id: <20230601145718.12204-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> References: <20230601145718.12204-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add PCI Endpoint driver for the Qualcomm MHI (Modem Host Interface) bus. The driver implements the MHI function over PCI in the endpoint device such as SDX55 modem. The MHI endpoint function driver acts as a controller driver for the MHI Endpoint stack and carries out all PCI related activities like mapping the host memory using iATU, triggering MSIs etc... Reviewed-by: Kishon Vijay Abraham I Signed-off-by: Manivannan Sadhasivam Reviewed-by: Damien Le Moal --- drivers/pci/endpoint/functions/Kconfig | 10 + drivers/pci/endpoint/functions/Makefile | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 462 +++++++++++++++++++ 3 files changed, 473 insertions(+) create mode 100644 drivers/pci/endpoint/functions/pci-epf-mhi.c diff --git a/drivers/pci/endpoint/functions/Kconfig b/drivers/pci/endpoint/= functions/Kconfig index 9fd560886871..f5171b4fabbe 100644 --- a/drivers/pci/endpoint/functions/Kconfig +++ b/drivers/pci/endpoint/functions/Kconfig @@ -37,3 +37,13 @@ config PCI_EPF_VNTB between PCI Root Port and PCIe Endpoint. =20 If in doubt, say "N" to disable Endpoint NTB driver. + +config PCI_EPF_MHI + tristate "PCI Endpoint driver for MHI bus" + depends on PCI_ENDPOINT && MHI_BUS_EP + help + Enable this configuration option to enable the PCI Endpoint + driver for Modem Host Interface (MHI) bus in Qualcomm Endpoint + devices such as SDX55. + + If in doubt, say "N" to disable Endpoint driver for MHI bus. diff --git a/drivers/pci/endpoint/functions/Makefile b/drivers/pci/endpoint= /functions/Makefile index 5c13001deaba..696473fce50e 100644 --- a/drivers/pci/endpoint/functions/Makefile +++ b/drivers/pci/endpoint/functions/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_PCI_EPF_TEST) +=3D pci-epf-test.o obj-$(CONFIG_PCI_EPF_NTB) +=3D pci-epf-ntb.o obj-$(CONFIG_PCI_EPF_VNTB) +=3D pci-epf-vntb.o +obj-$(CONFIG_PCI_EPF_MHI) +=3D pci-epf-mhi.o diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/end= point/functions/pci-epf-mhi.c new file mode 100644 index 000000000000..98f0d96cfd46 --- /dev/null +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -0,0 +1,462 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI EPF driver for MHI Endpoint devices + * + * Copyright (C) 2023 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include + +#define MHI_VERSION_1_0 0x01000000 + +#define to_epf_mhi(cntrl) container_of(cntrl, struct pci_epf_mhi, cntrl) + +struct pci_epf_mhi_ep_info { + const struct mhi_ep_cntrl_config *config; + struct pci_epf_header *epf_header; + enum pci_barno bar_num; + u32 epf_flags; + u32 msi_count; + u32 mru; +}; + +#define MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, direction) \ + { \ + .num =3D ch_num, \ + .name =3D ch_name, \ + .dir =3D direction, \ + } + +#define MHI_EP_CHANNEL_CONFIG_UL(ch_num, ch_name) \ + MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_TO_DEVICE) + +#define MHI_EP_CHANNEL_CONFIG_DL(ch_num, ch_name) \ + MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_FROM_DEVICE) + +static const struct mhi_ep_channel_config mhi_v1_channels[] =3D { + MHI_EP_CHANNEL_CONFIG_UL(0, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_DL(1, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_UL(2, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_DL(3, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_UL(4, "DIAG"), + MHI_EP_CHANNEL_CONFIG_DL(5, "DIAG"), + MHI_EP_CHANNEL_CONFIG_UL(6, "SSR"), + MHI_EP_CHANNEL_CONFIG_DL(7, "SSR"), + MHI_EP_CHANNEL_CONFIG_UL(8, "QDSS"), + MHI_EP_CHANNEL_CONFIG_DL(9, "QDSS"), + MHI_EP_CHANNEL_CONFIG_UL(10, "EFS"), + MHI_EP_CHANNEL_CONFIG_DL(11, "EFS"), + MHI_EP_CHANNEL_CONFIG_UL(12, "MBIM"), + MHI_EP_CHANNEL_CONFIG_DL(13, "MBIM"), + MHI_EP_CHANNEL_CONFIG_UL(14, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(15, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(16, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(17, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(18, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_DL(19, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_UL(20, "IPCR"), + MHI_EP_CHANNEL_CONFIG_DL(21, "IPCR"), + MHI_EP_CHANNEL_CONFIG_UL(32, "DUN"), + MHI_EP_CHANNEL_CONFIG_DL(33, "DUN"), + MHI_EP_CHANNEL_CONFIG_UL(46, "IP_SW0"), + MHI_EP_CHANNEL_CONFIG_DL(47, "IP_SW0"), +}; + +static const struct mhi_ep_cntrl_config mhi_v1_config =3D { + .max_channels =3D 128, + .num_channels =3D ARRAY_SIZE(mhi_v1_channels), + .ch_cfg =3D mhi_v1_channels, + .mhi_version =3D MHI_VERSION_1_0, +}; + +static struct pci_epf_header sdx55_header =3D { + .vendorid =3D PCI_VENDOR_ID_QCOM, + .deviceid =3D 0x0306, + .baseclass_code =3D PCI_BASE_CLASS_COMMUNICATION, + .subclass_code =3D PCI_CLASS_COMMUNICATION_MODEM & 0xff, + .interrupt_pin =3D PCI_INTERRUPT_INTA, +}; + +static const struct pci_epf_mhi_ep_info sdx55_info =3D { + .config =3D &mhi_v1_config, + .epf_header =3D &sdx55_header, + .bar_num =3D BAR_0, + .epf_flags =3D PCI_BASE_ADDRESS_MEM_TYPE_32, + .msi_count =3D 32, + .mru =3D 0x8000, +}; + +struct pci_epf_mhi { + const struct pci_epf_mhi_ep_info *info; + struct mhi_ep_cntrl mhi_cntrl; + struct pci_epf *epf; + struct mutex lock; + void __iomem *mmio; + resource_size_t mmio_phys; + u32 mmio_size; + int irq; +}; + +static int pci_epf_mhi_alloc_map(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_a= ddr, + phys_addr_t *paddr, void __iomem **vaddr, + size_t size) +{ + struct pci_epf_mhi *epf_mhi =3D to_epf_mhi(mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf_mhi->epf->epc; + size_t offset =3D pci_addr & (epc->mem->window.page_size - 1); + void __iomem *__vaddr; + phys_addr_t __paddr; + int ret; + + __vaddr =3D pci_epc_mem_alloc_addr(epc, &__paddr, size + offset); + if (!__vaddr) + return -ENOMEM; + + ret =3D pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, __paddr, + pci_addr - offset, size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, __paddr, __vaddr, size + offset); + + return ret; + } + + *paddr =3D __paddr + offset; + *vaddr =3D __vaddr + offset; + + return 0; +} + +static void pci_epf_mhi_unmap_free(struct mhi_ep_cntrl *mhi_cntrl, u64 pci= _addr, + phys_addr_t paddr, void __iomem *vaddr, + size_t size) +{ + struct pci_epf_mhi *epf_mhi =3D to_epf_mhi(mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf->epc; + size_t offset =3D pci_addr & (epc->mem->window.page_size - 1); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, paddr - offset); + pci_epc_mem_free_addr(epc, paddr - offset, vaddr - offset, + size + offset); +} + +static void pci_epf_mhi_raise_irq(struct mhi_ep_cntrl *mhi_cntrl, u32 vect= or) +{ + struct pci_epf_mhi *epf_mhi =3D to_epf_mhi(mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf->epc; + + /* + * MHI supplies 0 based MSI vector but the API expects the vector to be + * 1 based, so we need to increment the vector by 1. + */ + pci_epc_raise_irq(epc, epf->func_no, epf->vfunc_no, PCI_EPC_IRQ_MSI, + vector + 1); +} + +static int pci_epf_mhi_read_from_host(struct mhi_ep_cntrl *mhi_cntrl, u64 = from, + void __iomem *to, size_t size) +{ + struct pci_epf_mhi *epf_mhi =3D to_epf_mhi(mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset =3D from % SZ_4K; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf =3D pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + ret =3D -ENOMEM; + goto err_unlock; + } + + ret =3D pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, + from - offset, size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + goto err_unlock; + } + + memcpy_fromio(to, tre_buf + offset, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + +err_unlock: + mutex_unlock(&epf_mhi->lock); + + return ret; +} + +static int pci_epf_mhi_write_to_host(struct mhi_ep_cntrl *mhi_cntrl, + void __iomem *from, u64 to, size_t size) +{ + struct pci_epf_mhi *epf_mhi =3D to_epf_mhi(mhi_cntrl); + struct pci_epf *epf =3D epf_mhi->epf; + struct pci_epc *epc =3D epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset =3D to % SZ_4K; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf =3D pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + ret =3D -ENOMEM; + goto err_unlock; + } + + ret =3D pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, + to - offset, size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + goto err_unlock; + } + + memcpy_toio(tre_buf + offset, from, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + +err_unlock: + mutex_unlock(&epf_mhi->lock); + + return ret; +} + +static int pci_epf_mhi_core_init(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct pci_epf_bar *epf_bar =3D &epf->bar[info->bar_num]; + struct pci_epc *epc =3D epf->epc; + struct device *dev =3D &epf->dev; + int ret; + + epf_bar->phys_addr =3D epf_mhi->mmio_phys; + epf_bar->size =3D epf_mhi->mmio_size; + epf_bar->barno =3D info->bar_num; + epf_bar->flags =3D info->epf_flags; + ret =3D pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); + if (ret) { + dev_err(dev, "Failed to set BAR: %d\n", ret); + return ret; + } + + ret =3D pci_epc_set_msi(epc, epf->func_no, epf->vfunc_no, + order_base_2(info->msi_count)); + if (ret) { + dev_err(dev, "Failed to set MSI configuration: %d\n", ret); + return ret; + } + + ret =3D pci_epc_write_header(epc, epf->func_no, epf->vfunc_no, + epf->header); + if (ret) { + dev_err(dev, "Failed to set Configuration header: %d\n", ret); + return ret; + } + + return 0; +} + +static int pci_epf_mhi_link_up(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + struct pci_epc *epc =3D epf->epc; + struct device *dev =3D &epf->dev; + int ret; + + mhi_cntrl->mmio =3D epf_mhi->mmio; + mhi_cntrl->irq =3D epf_mhi->irq; + mhi_cntrl->mru =3D info->mru; + + /* Assign the struct dev of PCI EP as MHI controller device */ + mhi_cntrl->cntrl_dev =3D epc->dev.parent; + mhi_cntrl->raise_irq =3D pci_epf_mhi_raise_irq; + mhi_cntrl->alloc_map =3D pci_epf_mhi_alloc_map; + mhi_cntrl->unmap_free =3D pci_epf_mhi_unmap_free; + mhi_cntrl->read_from_host =3D pci_epf_mhi_read_from_host; + mhi_cntrl->write_to_host =3D pci_epf_mhi_write_to_host; + + /* Register the MHI EP controller */ + ret =3D mhi_ep_register_controller(mhi_cntrl, info->config); + if (ret) { + dev_err(dev, "Failed to register MHI EP controller: %d\n", ret); + return ret; + } + + return 0; +} + +static int pci_epf_mhi_link_down(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + + if (mhi_cntrl->mhi_dev) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + } + + return 0; +} + +static int pci_epf_mhi_bme(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + struct device *dev =3D &epf->dev; + int ret; + + /* + * Power up the MHI EP stack if link is up and stack is in power down + * state. + */ + if (!mhi_cntrl->enabled && mhi_cntrl->mhi_dev) { + ret =3D mhi_ep_power_up(mhi_cntrl); + if (ret) { + dev_err(dev, "Failed to power up MHI EP: %d\n", ret); + mhi_ep_unregister_controller(mhi_cntrl); + } + } + + return 0; +} + +static int pci_epf_mhi_bind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + struct pci_epc *epc =3D epf->epc; + struct platform_device *pdev =3D to_platform_device(epc->dev.parent); + struct device *dev =3D &epf->dev; + struct resource *res; + int ret; + + if (WARN_ON_ONCE(!epc)) + return -EINVAL; + + /* Get MMIO base address from Endpoint controller */ + res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "mmio"); + epf_mhi->mmio_phys =3D res->start; + epf_mhi->mmio_size =3D resource_size(res); + + epf_mhi->mmio =3D ioremap(epf_mhi->mmio_phys, epf_mhi->mmio_size); + if (IS_ERR(epf_mhi->mmio)) + return PTR_ERR(epf_mhi->mmio); + + ret =3D platform_get_irq_byname(pdev, "doorbell"); + if (ret < 0) { + dev_err(dev, "Failed to get Doorbell IRQ\n"); + iounmap(epf_mhi->mmio); + return ret; + } + + epf_mhi->irq =3D ret; + + return 0; +} + +static void pci_epf_mhi_unbind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi =3D epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info =3D epf_mhi->info; + struct pci_epf_bar *epf_bar =3D &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl =3D &epf_mhi->mhi_cntrl; + struct pci_epc *epc =3D epf->epc; + + /* + * Forcefully power down the MHI EP stack. Only way to bring the MHI EP + * stack back to working state after successive bind is by getting BME + * from host. + */ + if (mhi_cntrl->mhi_dev) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + } + + iounmap(epf_mhi->mmio); + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); +} + +static struct pci_epc_event_ops pci_epf_mhi_event_ops =3D { + .core_init =3D pci_epf_mhi_core_init, + .link_up =3D pci_epf_mhi_link_up, + .link_down =3D pci_epf_mhi_link_down, + .bme =3D pci_epf_mhi_bme, +}; + +static int pci_epf_mhi_probe(struct pci_epf *epf, + const struct pci_epf_device_id *id) +{ + struct pci_epf_mhi_ep_info *info =3D + (struct pci_epf_mhi_ep_info *)id->driver_data; + struct pci_epf_mhi *epf_mhi; + struct device *dev =3D &epf->dev; + + epf_mhi =3D devm_kzalloc(dev, sizeof(*epf_mhi), GFP_KERNEL); + if (!epf_mhi) + return -ENOMEM; + + epf->header =3D info->epf_header; + epf_mhi->info =3D info; + epf_mhi->epf =3D epf; + + epf->event_ops =3D &pci_epf_mhi_event_ops; + + mutex_init(&epf_mhi->lock); + + epf_set_drvdata(epf, epf_mhi); + + return 0; +} + +static const struct pci_epf_device_id pci_epf_mhi_ids[] =3D { + { + .name =3D "sdx55", .driver_data =3D (kernel_ulong_t)&sdx55_info, + }, + {}, +}; + +static struct pci_epf_ops pci_epf_mhi_ops =3D { + .unbind =3D pci_epf_mhi_unbind, + .bind =3D pci_epf_mhi_bind, +}; + +static struct pci_epf_driver pci_epf_mhi_driver =3D { + .driver.name =3D "pci_epf_mhi", + .probe =3D pci_epf_mhi_probe, + .id_table =3D pci_epf_mhi_ids, + .ops =3D &pci_epf_mhi_ops, + .owner =3D THIS_MODULE, +}; + +static int __init pci_epf_mhi_init(void) +{ + return pci_epf_register_driver(&pci_epf_mhi_driver); +} +module_init(pci_epf_mhi_init); + +static void __exit pci_epf_mhi_exit(void) +{ + pci_epf_unregister_driver(&pci_epf_mhi_driver); +} +module_exit(pci_epf_mhi_exit); + +MODULE_DESCRIPTION("PCI EPF driver for MHI Endpoint devices"); +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_LICENSE("GPL"); --=20 2.25.1