From nobody Fri Sep 20 20:39:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D31DC77B73 for ; Thu, 1 Jun 2023 03:04:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231439AbjFADEH (ORCPT ); Wed, 31 May 2023 23:04:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231334AbjFADDW (ORCPT ); Wed, 31 May 2023 23:03:22 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C173E4F; Wed, 31 May 2023 20:03:09 -0700 (PDT) X-UUID: d2d3dcbe002811eeb20a276fd37b9834-20230601 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=3qAxEMO5SPYMxV8uj1V/xelD2BuPbhgIz4Wqh4OTkyg=; b=WNtSqeHtro+TbiShDquy9XpVIjyc5NIX8fl8dpuQ/UrlpYU8kf7mVGvJhRA7wvY9U9ytYBMYQRf5vayAttTU24KUjzpPGvy7K4TyYgNb2FrDkzQb0m7xn68XziJal61419AsmzlWuK2gXbq0PWbsNHukOl22zbC6/jMmVo4GOc0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.25,REQID:318e8aa5-3504-4c96-84da-19cadabe1574,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.25,REQID:318e8aa5-3504-4c96-84da-19cadabe1574,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:d5b0ae3,CLOUDID:7a8ea76d-2f20-4998-991c-3b78627e4938,B ulkID:230601110304DQB80LGR,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,CO L:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: d2d3dcbe002811eeb20a276fd37b9834-20230601 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2142497223; Thu, 01 Jun 2023 11:03:03 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 1 Jun 2023 11:03:01 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 1 Jun 2023 11:03:00 +0800 From: Yunfei Dong To: Chen-Yu Tsai , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , Nathan Hebert CC: Yunfei Dong , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , Steve Cho , , , , , , Subject: [PATCH 3/8] mediatek: vcodec: re-write shared interface Date: Thu, 1 Jun 2023 11:02:51 +0800 Message-ID: <20230601030256.29875-4-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230601030256.29875-1-yunfei.dong@mediatek.com> References: <20230601030256.29875-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Re-write shared interface which encoder and decoder used at the same time. Using the common struct as the parameter of these interface in order to remove the depedency. Signed-off-by: Yunfei Dong --- .../mediatek/vcodec/mtk_vcodec_intr.c | 30 ++++++++++++------- .../mediatek/vcodec/mtk_vcodec_intr.h | 3 +- .../mediatek/vcodec/mtk_vcodec_util.c | 19 +++++------- .../mediatek/vcodec/mtk_vcodec_util.h | 9 ++---- .../mediatek/vcodec/vdec/vdec_vp8_if.c | 14 ++++----- .../mediatek/vcodec/venc/venc_h264_if.c | 2 +- .../mediatek/vcodec/venc/venc_vp8_if.c | 2 +- 7 files changed, 39 insertions(+), 40 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_intr.c b/dri= vers/media/platform/mediatek/vcodec/mtk_vcodec_intr.c index 552b4c93d972..daa44f635727 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_intr.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_intr.c @@ -11,32 +11,40 @@ #include "mtk_vcodec_intr.h" #include "mtk_vcodec_util.h" =20 -int mtk_vcodec_wait_for_done_ctx(struct mtk_vcodec_ctx *ctx, - int command, unsigned int timeout_ms, +int mtk_vcodec_wait_for_done_ctx(void *priv, int command, unsigned int tim= eout_ms, unsigned int hw_id) { + struct mtk_vcodec_ctx *ctx =3D priv; long timeout_jiff, ret; - int status =3D 0; + int status =3D 0, ctx_id, ctx_type; + int *ctx_int_cond, *ctx_int_type; + wait_queue_head_t *ctx_queue; + + ctx_id =3D ctx->id; + ctx_type =3D ctx->type; + ctx_int_cond =3D ctx->int_cond; + ctx_int_type =3D ctx->int_type; + ctx_queue =3D ctx->queue; =20 timeout_jiff =3D msecs_to_jiffies(timeout_ms); - ret =3D wait_event_interruptible_timeout(ctx->queue[hw_id], - ctx->int_cond[hw_id], + ret =3D wait_event_interruptible_timeout(ctx_queue[hw_id], + ctx_int_cond[hw_id], timeout_jiff); =20 if (!ret) { status =3D -1; /* timeout */ mtk_v4l2_err("[%d] cmd=3D%d, type=3D%d, dec timeout=3D%ums (%d %d)", - ctx->id, command, ctx->type, timeout_ms, - ctx->int_cond[hw_id], ctx->int_type[hw_id]); + ctx_id, command, ctx_type, timeout_ms, + ctx_int_cond[hw_id], ctx_int_type[hw_id]); } else if (-ERESTARTSYS =3D=3D ret) { status =3D -1; mtk_v4l2_err("[%d] cmd=3D%d, type=3D%d, dec inter fail (%d %d)", - ctx->id, command, ctx->type, - ctx->int_cond[hw_id], ctx->int_type[hw_id]); + ctx_id, command, ctx_type, + ctx_int_cond[hw_id], ctx_int_type[hw_id]); } =20 - ctx->int_cond[hw_id] =3D 0; - ctx->int_type[hw_id] =3D 0; + ctx_int_cond[hw_id] =3D 0; + ctx_int_type[hw_id] =3D 0; =20 return status; } diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_intr.h b/dri= vers/media/platform/mediatek/vcodec/mtk_vcodec_intr.h index 9681f492813b..11bf0ef94d5d 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_intr.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_intr.h @@ -12,8 +12,7 @@ struct mtk_vcodec_ctx; =20 /* timeout is ms */ -int mtk_vcodec_wait_for_done_ctx(struct mtk_vcodec_ctx *ctx, - int command, unsigned int timeout_ms, +int mtk_vcodec_wait_for_done_ctx(void *priv, int command, unsigned int tim= eout_ms, unsigned int hw_id); =20 #endif /* _MTK_VCODEC_INTR_H_ */ diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_util.c b/dri= vers/media/platform/mediatek/vcodec/mtk_vcodec_util.c index f214e6f67005..847e321f4fcc 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_util.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_util.c @@ -21,24 +21,20 @@ int mtk_v4l2_dbg_level; EXPORT_SYMBOL(mtk_v4l2_dbg_level); #endif =20 -void __iomem *mtk_vcodec_get_reg_addr(struct mtk_vcodec_ctx *data, - unsigned int reg_idx) +void __iomem *mtk_vcodec_get_reg_addr(void __iomem **reg_base, unsigned in= t reg_idx) { - struct mtk_vcodec_ctx *ctx =3D (struct mtk_vcodec_ctx *)data; - - if (!data || reg_idx >=3D NUM_MAX_VCODEC_REG_BASE) { + if (reg_idx >=3D NUM_MAX_VCODEC_REG_BASE) { mtk_v4l2_err("Invalid arguments, reg_idx=3D%d", reg_idx); return NULL; } - return ctx->dev->reg_base[reg_idx]; + return reg_base[reg_idx]; } EXPORT_SYMBOL(mtk_vcodec_get_reg_addr); =20 -int mtk_vcodec_mem_alloc(struct mtk_vcodec_ctx *data, - struct mtk_vcodec_mem *mem) +int mtk_vcodec_mem_alloc(void *priv, struct mtk_vcodec_mem *mem) { unsigned long size =3D mem->size; - struct mtk_vcodec_ctx *ctx =3D (struct mtk_vcodec_ctx *)data; + struct mtk_vcodec_ctx *ctx =3D priv; struct device *dev =3D &ctx->dev->plat_dev->dev; =20 mem->va =3D dma_alloc_coherent(dev, size, &mem->dma_addr, GFP_KERNEL); @@ -57,11 +53,10 @@ int mtk_vcodec_mem_alloc(struct mtk_vcodec_ctx *data, } EXPORT_SYMBOL(mtk_vcodec_mem_alloc); =20 -void mtk_vcodec_mem_free(struct mtk_vcodec_ctx *data, - struct mtk_vcodec_mem *mem) +void mtk_vcodec_mem_free(void *priv, struct mtk_vcodec_mem *mem) { unsigned long size =3D mem->size; - struct mtk_vcodec_ctx *ctx =3D (struct mtk_vcodec_ctx *)data; + struct mtk_vcodec_ctx *ctx =3D priv; struct device *dev =3D &ctx->dev->plat_dev->dev; =20 if (!mem->va) { diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_util.h b/dri= vers/media/platform/mediatek/vcodec/mtk_vcodec_util.h index 587aa817e7f4..ecb0bdf3a4f4 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_util.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_util.h @@ -68,12 +68,9 @@ extern int mtk_vcodec_dbg; #define mtk_vcodec_debug_enter(h) mtk_vcodec_debug(h, "+") #define mtk_vcodec_debug_leave(h) mtk_vcodec_debug(h, "-") =20 -void __iomem *mtk_vcodec_get_reg_addr(struct mtk_vcodec_ctx *data, - unsigned int reg_idx); -int mtk_vcodec_mem_alloc(struct mtk_vcodec_ctx *data, - struct mtk_vcodec_mem *mem); -void mtk_vcodec_mem_free(struct mtk_vcodec_ctx *data, - struct mtk_vcodec_mem *mem); +void __iomem *mtk_vcodec_get_reg_addr(void __iomem **reg_base, unsigned in= t reg_idx); +int mtk_vcodec_mem_alloc(void *priv, struct mtk_vcodec_mem *mem); +void mtk_vcodec_mem_free(void *priv, struct mtk_vcodec_mem *mem); void mtk_vcodec_set_curr_ctx(struct mtk_vcodec_dev *vdec_dev, struct mtk_vcodec_ctx *ctx, int hw_idx); struct mtk_vcodec_ctx *mtk_vcodec_get_curr_ctx(struct mtk_vcodec_dev *vdec= _dev, diff --git a/drivers/media/platform/mediatek/vcodec/vdec/vdec_vp8_if.c b/dr= ivers/media/platform/mediatek/vcodec/vdec/vdec_vp8_if.c index 88c046731754..5edbccc9ae68 100644 --- a/drivers/media/platform/mediatek/vcodec/vdec/vdec_vp8_if.c +++ b/drivers/media/platform/mediatek/vcodec/vdec/vdec_vp8_if.c @@ -167,13 +167,13 @@ struct vdec_vp8_inst { =20 static void get_hw_reg_base(struct vdec_vp8_inst *inst) { - inst->reg_base.top =3D mtk_vcodec_get_reg_addr(inst->ctx, VDEC_TOP); - inst->reg_base.cm =3D mtk_vcodec_get_reg_addr(inst->ctx, VDEC_CM); - inst->reg_base.hwd =3D mtk_vcodec_get_reg_addr(inst->ctx, VDEC_HWD); - inst->reg_base.sys =3D mtk_vcodec_get_reg_addr(inst->ctx, VDEC_SYS); - inst->reg_base.misc =3D mtk_vcodec_get_reg_addr(inst->ctx, VDEC_MISC); - inst->reg_base.ld =3D mtk_vcodec_get_reg_addr(inst->ctx, VDEC_LD); - inst->reg_base.hwb =3D mtk_vcodec_get_reg_addr(inst->ctx, VDEC_HWB); + inst->reg_base.top =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base, = VDEC_TOP); + inst->reg_base.cm =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base, V= DEC_CM); + inst->reg_base.hwd =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base, = VDEC_HWD); + inst->reg_base.sys =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base, = VDEC_SYS); + inst->reg_base.misc =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base,= VDEC_MISC); + inst->reg_base.ld =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base, V= DEC_LD); + inst->reg_base.hwb =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base, = VDEC_HWB); } =20 static void write_hw_segmentation_data(struct vdec_vp8_inst *inst) diff --git a/drivers/media/platform/mediatek/vcodec/venc/venc_h264_if.c b/d= rivers/media/platform/mediatek/vcodec/venc/venc_h264_if.c index 60fd165c0d94..10365c95ebbe 100644 --- a/drivers/media/platform/mediatek/vcodec/venc/venc_h264_if.c +++ b/drivers/media/platform/mediatek/vcodec/venc/venc_h264_if.c @@ -612,7 +612,7 @@ static int h264_enc_init(struct mtk_vcodec_ctx *ctx) inst->ctx =3D ctx; inst->vpu_inst.ctx =3D ctx; inst->vpu_inst.id =3D is_ext ? SCP_IPI_VENC_H264 : IPI_VENC_H264; - inst->hw_base =3D mtk_vcodec_get_reg_addr(inst->ctx, VENC_SYS); + inst->hw_base =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base, VENC_= SYS); =20 mtk_vcodec_debug_enter(inst); =20 diff --git a/drivers/media/platform/mediatek/vcodec/venc/venc_vp8_if.c b/dr= ivers/media/platform/mediatek/vcodec/venc/venc_vp8_if.c index 56ce58f761f1..73ebc35d7c99 100644 --- a/drivers/media/platform/mediatek/vcodec/venc/venc_vp8_if.c +++ b/drivers/media/platform/mediatek/vcodec/venc/venc_vp8_if.c @@ -336,7 +336,7 @@ static int vp8_enc_init(struct mtk_vcodec_ctx *ctx) inst->ctx =3D ctx; inst->vpu_inst.ctx =3D ctx; inst->vpu_inst.id =3D IPI_VENC_VP8; - inst->hw_base =3D mtk_vcodec_get_reg_addr(inst->ctx, VENC_LT_SYS); + inst->hw_base =3D mtk_vcodec_get_reg_addr(inst->ctx->dev->reg_base, VENC_= LT_SYS); =20 mtk_vcodec_debug_enter(inst); =20 --=20 2.25.1